UCC2817A, UCC2818A
UCC3817A, UCC3818A
SLUS577B − SEPTEMBER, 2003 − REVISED FEBRUARY 2006
PIN ASSIGNMENTS
TERMINAL
NAME
CAI
CAOUT
CT
DRVOUT
GND
IAC
MOUT
OVP/EN
PKLMT
RT
SS
VAOUT
VCC
VFF
VSENSE
VREF
NO.
4
3
14
16
1
6
5
10
2
12
13
7
15
8
11
9
I/O
I
O
I
O
−
I
I/O
I
I
I
I
O
I
I
I
O
Current amplifier noninverting input
Current amplifier output
Oscillator timing capacitor
Gate drive
Ground
Current proportional to input voltage
Multiplier output and current amplifier inverting input
Over-voltage/enable
PFC peak current limit
Oscillator charging current
Soft-start
Voltage amplifier output
Positive supply voltage
Feed-forward voltage
Voltage amplifier inverting input
Voltage reference output
DESCRIPTION
Pin Descriptions
CAI:
Place a resistor between this pin and the GND side of current sense resistor. This input and the inverting
input (MOUT) remain functional down to and below GND.
CAOUT:
This is the output of a wide bandwidth operational amplifier that senses line current and commands
the PFC pulse-width modulator (PWM) to force the correct duty cycle. Compensation components are placed
between CAOUT and MOUT.
CT:
A capacitor from CT to GND sets the PWM oscillator frequency according to:
f
[
0.6
RT
CT
The lead from the oscillator timing capacitor to GND should be as short and direct as possible.
DRVOUT:
The output drive for the boost switch is a totem-pole MOSFET gate driver on DRVOUT. To avoid the
excessive overshoot of the DRVOUT while driving a capacitive load, a series gate current-limiting/damping
resistor is recommended to prevent interaction between the gate impedance and the output driver. The value
of the series gate resistor is based on the pulldown resistance (R
pulldown
which is 4
Ω
typical), the maximum
VCC voltage (VCC), and the required maximum gate drive current (I
MAX
). Using the equation below, a series
gate resistance of resistance 11
Ω
would be required for a maximum VCC voltage of 18 V and for 1.2 A of
maximum sink current. The source current will be limited to approximately 900 mA (based on the R
pullup
of 9-Ω
typical).
R
GATE
+
VCC
*
I
MAX
I
MAX
R
pulldown
GND:
All voltages measured with respect to ground. VCC and REF should be bypassed directly to GND with
a 0.1-µF or larger ceramic capacitor.
6
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