UCC2897
SLUS591A − NOVEMBER 2003 − REVISED MARCH 2004
DETAILED PIN DESCRIPTIONS (continued)
VREF (pin 6)
The controller’s internal, 5-V bias rail is connected to this pin. The internal bias regulator requires a good quality
ceramic bypass capacitor (C
VREF
) to GND (pin 6) for noise filtering and to provide compensation to the regulator
circuitry. The recommended C
VREF
value is 0.22-µF. The minimum bypass capacitor value is 0.022-µF limited
by stability considerations of the bias regulator, while the maximum is approximately 22-µF.
The VREF pin is internally current limited and can supply approximately 5-mA to external circuits. The 5-V bias
is only available when the undervoltage lock out (UVLO) circuit enables the operation of UCC2897 controller.
For the detailed functional description of the undervoltage lock out (UVLO) circuit refer to the
Functional
Description
section of this datasheet.
SYNC (pin 7)
This pin is a bi-directioanl synchonization terminal.
This pin provides an input for an external clock signal which can be used to synchronize the internal oscillator
of the UCC2897 controller. The synchronizing frequency must be higher than the free running frequency of the
onboard oscillator T
SYNC
t
T
SW
. The acceptable minimum pulse width of the synchronization signal is
approximately 50 ns (positive logic), and it should remain shorter than 1
*
D
MAX
T
SYNC
where D
MAX
is set
by R
ON
and R
OFF
. If the pulse width of the synchronization signal stays within these limits, the maximum
operating duty ratio remains valid as defined by the ratio of R
ON
and R
OFF
, and D
MAX
is the same in free running
and in synchronized modes of operation. If the pulse width of the synchronization signal would exceed the
1
*
D
MAX
T
SYNC
limit, the maximum operating duty cycle is defined by the synchronization pulse width.
In the stand-along mode, the sync pin is driven by the internal oscillator which provides output pulses of
approximately TBD-ns wide TBD-V amplitude square wave. This signal can be use to synchronize other PWM
controllers or circuits needing a constant frequency time base.
For more information on synchronization of the UCC2897 refer to the
Functional Description
section of this
datasheet.
GND (pin 8)
This pin provides a reference potential for all small signal control and programming circuitry inside the
UCC2897.
8
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