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UCC3818DW 参数 Datasheet PDF下载

UCC3818DW图片预览
型号: UCC3818DW
PDF下载: 下载PDF文件 查看货源
内容描述: BiCMOS功率因数前置稳压器 [BiCMOS POWER FACTOR PREREGULATOR]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管信息通信管理
文件页数/大小: 32 页 / 948 K
品牌: TI [ TEXAS INSTRUMENTS ]
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UCC2817, UCC2818, UCC3817, UCC3818
BiCMOS POWER FACTOR PREREGULATOR
SLUS395J - FEBRUARY 2000 - REVISED MARCH 2009
electrical characteristics
, T
A
= 0°C to 70°C for the UCC3817 and T
A
= −40°C to 85°C for the UCC2817, T
A
= T
J,
VCC = 12 V, R
T
= 22 kΩ, C
T
= 270 pF, (unless otherwise noted)
feed-forward section
PARAMETER
VFF output current
IAC = 300
µA
TEST CONDITIONS
MIN
−140
TYP
−150
MAX
−160
UNITS
µA
soft start section
PARAMETER
SS charge current
TEST CONDITIONS
MIN
−6
TYP
−10
MAX
−16
UNITS
µA
gate driver section
PARAMETER
Pullup resistance
Pulldown resistance
Output rise time
Output fall time
Maximum duty cycle
Minimum controlled duty cycle
At 100 kHz
TEST CONDITIONS
IO = –100 mA to −200 mA
IO = 100 mA
CL = 1 nF,
CL = 1 nF,
RL = 10
Ω,
RL = 10
Ω,
VDRVOUT = 0.7 V to 9.0 V
VDRVOUT = 9.0 V to 0.7 V
93
MIN
TYP
5
2
25
10
95
MAX
12
10
50
50
99
2
UNITS
ns
ns
%
%
zero power section
PARAMETER
Zero power comparator threshold
TEST CONDITIONS
Measured on VAOUT
MIN
0.20
TYP
0.33
MAX
0.50
UNITS
V
pin descriptions
CAI:
(current amplifier noninverting input) Place a resistor between this pin and the GND side of current sense
resistor. This input and the inverting input (MOUT) remain functional down to and below GND.
CAOUT:
(current amplifier output) This is the output of a wide bandwidth operational amplifier that senses line
current and commands the PFC pulse-width modulator (PWM) to force the correct duty cycle. Compensation
components are placed between CAOUT and MOUT.
CT:
(oscillator timing capacitor) A capacitor from CT to GND sets the PWM oscillator frequency according to:
f
[
0.6
RT
CT
The lead from the oscillator timing capacitor to GND should be as short and direct as possible.
DRVOUT:
(gate drive) The output drive for the boost switch is a totem-pole MOSFET gate driver on DRVOUT.
Use a series gate resistor to prevent interaction between the gate impedance and the output driver that might
cause the DRVOUT to overshoot excessively. See characteristic curve (Figure 13) to determine minimum
required gate resister value. Some overshoot of the DRVOUT output is always expected when driving a
capacitive load.
GND:
(ground) All voltages measured with respect to ground. VCC and REF should be bypassed directly to
GND with a 0.1-µF or larger ceramic capacitor.
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