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SLUS651C – MARCH 2005 – REVISED MAY 2010
APPLICATION INFORMATION
The UCD7100 is part of a family of digital compatible drivers targeting applications utilizing digital control
techniques or applications that require local fast peak current limit protection.
Supply
The UCD7K devices accept an input range of 4.5 V to 15 V. The device has an internal precision linear regulator
that produces the 3V3 output from this VDD input. A separate pin, PVDD, not connected internally to the VDD
supply rail provides power for the output drivers. In all applications the same bus voltage supplies the two pins. It
is recommended that a low value of resistance be placed between the two pins so that the local capacitance on
each pin forms low pass filters to attenuate any switching noise that may be on the bus.
Although quiescent VDD current is low, total supply current will be higher, depending on the gate drive output
current required by the switching frequency. Total V
DD
current is the sum of quiescent V
DD
current and the
average OUT current. Knowing the operating frequency and the MOSFET gate charge (Q
G
), average OUT
current can be calculated from:
I
OUT
= Q
G
x f, where f is frequency.
For high-speed circuit performance, a V
DD
bypass capacitor is recommended to prevent noise problems. A
4.7-µF ceramic capacitor should be located close to the V
DD
to ground connection. A larger capacitor with
relatively low ESR should be connected to the PVDD pin, to help deliver the high current peaks to the load. The
capacitors should present a low impedance characteristic for the expected current levels in the driver application.
The use of surface mount components for all bypass capacitors is highly recommended.
Reference / External Bias Supply
All devices in the UCD7K family are capable of supplying a regulated 3.3-V rail to power various types of external
loads such as a microcontroller or an ASIC. The onboard linear voltage regulator is capable of sourcing up to 10
mA of current. For normal operation, place a minimum of 0.22 µF of ceramic capacitance from the reference pin
to ground.
Input
The IN pin is a high impedance digital input capable of accepting 3.3-V logic level signals up to 2 MHz. There is
an internal Schmitt Trigger comparator which isolates the internal circuitry from any external noise.
If limiting the rise or fall times to the power device is desired, then an external resistance can be added between
the output of the driver and the load device, which is generally a power MOSFET gate. The external resistor may
also help remove power dissipation from the package.
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