TC554161AFT-85L 参数 Datasheet PDF下载

TC554161AFT-70,-85,-10,-70L,-85L,-10L

TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS

262,144-WORD BY 16-BIT STATIC RAM

DESCRIPTION

The TC554161AFT is a 4,194,304-bit static random access memory (SRAM) organized as 262,144 words by 16bits.

Fabricated using Toshiba's CMOS Silicon gate process technology, this device operates from a single 5V

±

10%

power supply. Advanced circuit technology provides both high speed and low power at an operating current of 10

mA/MHz (typ) and a minimum cycle time of 70 ns. It is automatically placed in low-power mode at 2

mA

standby

current (typ) when chip enable (

CE

) is asserted high. There are two control inputs.

CE

is used to select the device

and for data retention control, and output enable (

OE

) provides fast memory access. Data byte control pin (

LB

,

UB

) provides lower and upper byte access. This device is well suited to various microprocessor system applications

where high speed, low power and battery backup are required. The TC554161AFT is available in a plastic 54-pin

thin-small-outline package (TSOP).

FEATURES

·

·

·

·

·

·

Low-power dissipation

Operating: 55 mW/MHz (typical)

Single power supply voltage of 5 V

±

10%

Power down features using

CE

.

Data retention supply voltage of 2 to 5.5 V

Direct TTL compatibility for all inputs and outputs

Standby Current (maximum):

TC554161AFT

-70,-85,-10

5.5 V

3.0 V

100

mA

50

mA

-70L,-85L,-10L

50

mA

25

mA

·

Access Times (maximum):

TC554161AFT

-70,-70L

Access Time

CE

Access Time

OE

Access Time

-85,-85L

85 ns

85 ns

45 ns

-10,-10L

100 ns

100 ns

50 ns

70 ns

70 ns

35 ns

·

Package:

TSOP II54-P-400-0.80 (AFT) (Weight: 0.57 g typ)

PIN ASSIGNMENT

(TOP VIEW)

NC

A3

A2

A1

A0

I/O16

I/O15

V

DD

GND

I/O14

I/O13

UB

CE

OP

R/W

I/O12

I/O11

GND

V

DD

I/O10

I/O9

NC

A17

A16

A15

A14

A13

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

28

A4

A5

A6

A7

NC

I/O1

I/O2

V

DD

GND

I/O3

I/O4

LB

OE

OP

NC

I/O5

I/O6

GND

V

DD

I/O7

I/O8

A8

A9

A10

A11

A12

NC

PIN NAMES

A0~A17

I/O1~I/O16

CE

Address Inputs

Data Inputs/Outputs

Chip Enable

Read/Write Control

Output Enable

Data Byte Control

Power (+5 V)

Ground

No Connection

Option

R/W

OE

LB

,

UB

V

DD

GND

NC

OP*

*:

OP pin must be open of connected to GND.

(Normal pinout)

2001-08-17

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