TC74VHC175F/FN/FT/FK
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74VHC175F,TC74VHC175FN,TC74VHC175FT,TC74VHC175FK
Quad D-Type Flip Flop with Clear
Note:
The TC74VHC175 is an advanced high speed CMOS QUAD
D-TYPE FLIP FLOP fabricated with silicon gate C
2
MOS
technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
These four flip-flops are controlled by a clock input (CK) and a
clear input (
CLR
).
The information data applied to the D inputs (D1 thru D4) are
transferred to the outputs (Q1 thru Q4 and Q1 thru Q4 ) on the
positive-going edge of the clock pulse.
When the
CLR
input is held low, the Q outputs are at the low
logic level and the Q outputs are at the high logic level,
regardless of other input conditions.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
xxxFN (JEDEC SOP) is not available in
Japan.
TC74VHC175F
TC74VHC175FN
Features
•
•
•
•
•
•
•
•
High speed: f
max
=
210 MHz (typ.) at V
CC
=
5 V
Low power dissipation: I
CC
=
4
μA
(max) at Ta
=
25°C
High noise immunity: V
NIH
=
V
NIL
=
28% V
CC
(min)
Power down protection is provided on all inputs.
Balanced propagation delays: t
pLH
∼
t
pHL
−
Wide operating voltage range: V
CC (opr)
=
2 to 5.5 V
Low noise: V
OLP
=
0.8 V (max)
Pin and function compatible with 74ALS175
TC74VHC175FT
TC74VHC175FK
Weight
SOP16-P-300-1.27A
SOL16-P-150-1.27
TSSOP16-P-0044-0.65A
VSSOP16-P-0030-0.50
: 0.18 g (typ.)
: 0.13 g (typ.)
: 0.06 g (typ.)
: 0.02 g (typ.)
1
2007-10-01
TOSHIBA [ TOSHIBA SEMICONDUCTOR ]
