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TH58NVG1S3AFT05 参数 Datasheet PDF下载

TH58NVG1S3AFT05图片预览
型号: TH58NVG1S3AFT05
PDF下载: 下载PDF文件 查看货源
内容描述: 东芝MOS数字集成电路硅栅CMOS [TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS]
分类和应用: 内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 32 页 / 365 K
品牌: TOSHIBA [ TOSHIBA SEMICONDUCTOR ]
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TH58NVG1S3AFT05
TENTATIVE
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
2GBIT (256M
DESCRIPTION
8BITS) CMOS NAND E
2
PROM
The TH58NVG1S3A is a single 3.3-V 2G-bit (2,214,592,512 bits) NAND Electrically Erasable and
Programmable Read-Only Memory (NAND E
2
PROM) organized as (2048+64) bytes x 64 pages x 2048 blocks.
The device has a 2112-byte static registers which allow program and read data to be transferred
between the register and the memory cell array in 2112-byte increments. The Erase operation is
implemented in a single block unit (128 Kbytes + 4Kbytes: 2112 bytes x 64 pages).
The TH58NVG1S3A is a serial-type memory device which utilizes the I/O pins for both address and data
input / output as well as for command inputs. The Erase and Program operations are automatically
executed making the device most suitable for applications such as solid-state file storage, voice
recording, image file memory for still cameras and other systems which require high-density non-
volatile memory data storage.
FEATURES
Organization
Memory cell allay 2112 64K 8 2
Register
2112 8
Page size
2112bytes
Block size
(128K 4K) bytes
Modes
Read Reset Auto Page Program
Auto Block Erase Status Read
Mode control
Serial input output
Command control
Powersupply
V
CC
2.7 V to 3.6 V
Program/Erase Cycles
1E5 Cycles(With ECC)
Access time
Cell array to register
25
s
max
Serial Read Cycle
50 ns min
Operating current
Read (50 ns cycle)
10 mA typ.
Program (avg.)
10 mA typ.
Erase (avg.)
10 mA typ.
Standby
50 A max
Package
TSOP I 48-P-1220-0.50
(Weight : 0.53 g typ.)
PIN ASSIGNMENT
(TOP VIEW)
NC
NC
NC
NC
NC
GND
RY/BY
RE
CE
NC
NC
V
CC
V
SS
NC
NC
CLE
ALE
WE
WP
NC
NC
NC
NC
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
NC
NC
NC
NC
I/O8
I/O7
I/O6
I/O5
NC
NC
NC
V
CC
V
SS
NC
NC
NC
I/O4
I/O3
I/O2
I/O1
NC
NC
NC
NC
PIN NAMES
I/O1 to I/O8
I/O port
CE
WE
RE
CLE
ALE
WP
RY / BY
GND
V
CC
V
SS
Chip enable
Write enable
Read enable
Command latch enable
Address latch enable
Write protect
Ready / Busy
Ground Input
Power supply
Ground
000707EBA1
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general
can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid
situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to
property.
In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most
recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the “Handling Guide for
Semiconductor Devices,” or “TOSHIBA Semiconductor Reliability Handbook” etc..
The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal
equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are
neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or
failure of which may cause loss of human life or bodily injury (“Unintended Usage”). Unintended Usage include atomic energy control
instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments,
medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at
the customer’s own risk.
2003-05-19A
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