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TMC2100-LA_17 参数 Datasheet PDF下载

TMC2100-LA_17图片预览
型号: TMC2100-LA_17
PDF下载: 下载PDF文件 查看货源
内容描述: [POWER DRIVER FOR STEPPER MOTORS]
分类和应用: 驱动
文件页数/大小: 48 页 / 1547 K
品牌: TRINAMIC [ TRINAMIC MOTION CONTROL GMBH & CO. KG. ]
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TMC2100 DATASHEET (Rev. 1.07 / 2017-MAY-15)  
10  
CFG4: SETS CHOPPER HYSTERESIS (TUNING OF ZERO CROSSING PRECISION)  
CFG4  
Hysteresis Setting  
GND  
5 (recommended most universal choice): low hysteresis with 4% of full scale  
current.  
VCC_IO  
open  
9: medium setting with 5% of the full scale current at sense resistor.  
13: high setting with 6% of full scale current at sense resistor.  
CFG5 selects the comparator blank time. This time needs to safely cover the switching event and the  
duration of the ringing on the sense resistor. For most applications, a setting of 24 clock cycles is  
good. For higher capacitive loads, e.g. when filter networks are used, a setting 36 clock cycles will be  
required.  
CFG5: SETS CHOPPER BLANK TIME (DURATION OF BLANKING OF SWITCHING SPIKE)  
CFG5  
GND  
VCC_IO  
open  
Blank time (in number of clock cycles)  
16 (best performance for stealthChop)  
24 (recommended, most universal choice)  
low setting  
medium setting  
36 (may be necessary with high capacitive loads on motor high setting  
outputs)  
EXAMPLE 1  
It is desired to do slow motions in smooth and noiseless stealthChop mode. For quick motions,  
spreadCycle is to be used. The controller can deliver 1/16 microstep step signals. Leave open CFG2 and  
drive CFG1 with a three state driver. Switch CFG1 to GND to operate in spreadCycle, switch it to hi-Z  
(open) state for a motion in stealthChop. Be sure to switch during standstill only, because when  
switching from a fixed level to an open input, a different mode may be passed for a short time.  
EXAMPLE 2  
CFG0  
Low slow decay time  
CFG1  
16 microstep step input with  
CFG2  
stealthChop  
Use sense resistors  
Configuration  
interface  
with TRISTATE  
detection  
CFG3  
CFG4  
Low hysteresis  
CFG5  
Medium blank time  
B.Dwersteg, ©  
TRINAMIC 2014  
DRV_ENN_CFG6  
Use stand still current reduction  
CLK_IN  
VCC_IO  
Use internal clock  
+VIO  
3.3V or 5V  
I/O voltage  
100n  
Figure 3.2 TMC2100 example configuration for stealthChop  
Attention  
Pin open detection will fail, when paralleling CFG pins of different ICs!  
www.trinamic.com