SMD Type
Product specification
NDS352P
General Description
These P-Channel logic level enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process is especially tailored to
minimize on-state resistance. These devices are
particularly suited for low voltage applications such as
notebook computer power management, portable
electronics, and other battery powered circuits where fast
high-side switching, and low in-line power loss are
needed in a very small outline surface mount package.
Features
-0.85A, -20V. R
DS(ON)
= 0.5
Ω
@ V
GS
= -4.5V.
Proprietary package design using copper lead frame for
superior thermal and electrical capabilities.
High density cell design for extremely low R
DS(ON)
.
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface mount
package.
____________________________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
T
J
,T
STG
Parameter
Drain-Source Voltage
T
A
= 25°C unless otherwise noted
NDS352P
-20
±12
(Note 1a)
Units
V
V
A
Gate-Source Voltage - Continuous
Maximum Drain Current - Continuous
- Pulsed
Maximum Power Dissipation
(Note 1a)
(Note 1b)
±0.85
±10
0.5
0.46
-55 to 150
W
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
(Note 1a)
250
(Note 1)
°C/W
°C/W
Thermal Resistance, Junction-to-Case
75
http://www.twtysemi.com
sales@twtysemi.com
4008-318-123
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TYSEMI [ TY Semiconductor Co., Ltd ]
