4053
DYNAMIC ELECTRICAL CHARACTERISTICS
(C
L
= 50pF, T
a
=25°C, V
EE
≦V
SS
, unless otherwise specified)
PARAMETER
Propagation Delay Times
Switch Input to Switch
Output (R
L
= 10 kΩ)
Inhibit to Output
SYMBOL
t
PLH,
t
PHL
V
DD
–V
EE
TEST CONDITIONS
Vdc
t
PLH
, t
PHL
=(0.17 ns/pF)C
L
+ 16.5ns
5
10
t
PLH
, t
PHL
=(0.08 ns/pF)C
L
+ 4.0ns
15
t
PLH
, t
PHL
=(0.06 ns/pF)C
L
+ 3.0ns
5
10
15
5
10
15
10
(R
L
=10kΩ, V
EE
=V
SS
)
Output “1” or “0” to High Impedance,
or High Impedance to “1” or “0” Level
R
L
= 10 kΩ, V
EE
= V
SS
MIN
TYP
25
8.0
6.0
275
140
110
300
120
80
0.07
CMOS IC
MAX
65
20
15
550
280
220
600
240
160
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
t
PHZ,
t
PLZ
t
PZH,
t
PZL
t
PLH,
t
PHL
THD
Control Input to Output
Total Harmonic Distortion
R
L
= 10KΩ, f = 1 kHz, Vin = 5 V
PP
R
L
= 1kΩ, V
IN
= 1/2 (V
DD
–V
EE
) p–p,
Bandwidth
BW
10
17
MHz
C
L
= 50pF, 20 Log (Vout/Vin) = -3dB)
R
L
=1KΩ, V
IN
= 1/2 (V
DD
–V
EE
) p–p
Off Channel Feedthrough
10
-50
dB
Attenuation
f
IN
= 55MHz
R
L
= 1kΩ, V
IN
= 1/2 (V
DD
–V
EE
) p–p
Channel Separation
10
-50
dB
f
IN
= 3MHz
Crosstalk, Control Input to
R
1
= 1kΩ, R
L
= 10kΩ Control
10
75
mV
Common O/I
t
TLH
= t
THL
= 20ns, Inhibit = V
SS
Note 1. Data of “TYP” is intended as an indication of the IC’s potential performance.
2. For voltage drops across the switch(ΔVsw)>600mV (>300mV at high temperature), excessive V
DD
current
may be drawn, i.e. the current out of the switch may contain both V
DD
and switch input components. The
reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
4 of 6
QW-R502-036.C
UTC-IC [ UNISONIC TECHNOLOGIES ]
