VIS
2.4 Operative Command Table Notes 1
Current state
Idle
CS
H
L
L
L
L
L
L
L
Row active
H
L
L
L
L
L
L
L
Read
H
L
L
L
L
L
L
L
L
Write
H
L
L
L
L
L
L
L
L
RAS
X
H
H
H
L
L
L
L
X
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
CAS
X
H
L
L
H
H
L
L
X
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
WE
X
X
H
L
H
L
H
L
X
X
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
X
BA,CA,A10
BA,CA,A10
BR,RA
BA,A10
X
Op-Code
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
Op-Code
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
Op-Code
X
X
X
BA,CA,A10
BA,CA,A10
BA,RA
BA,A10
X
Op-Code
Address
Command
DESL
NOP or BST
VG3617801CT
16Mb CMOS Synchronous Dynamic RAM
(1/3)
Action
Nop or Power down
Nop or Power down
ILLEGAL
ILLEGAL
Row active
Nop
Refresh or Self refresh
Mode register access
Nop
Nop
Begin read:Determine AP
Begin write:Determine AP
ILLEGAL
Precharge
ILLEGAL
ILLEGAL
Continue burst to end
→
Row active
Continue burst to end
→
Row active
Burst stop
→
Row active
Term burst, new read:Determine AP
Term burst, start write:Determine AP
ILLEGAL
Term burst,precharging
ILLEGAL
ILLEGAL
Continue burst to end
→
write recovering
Continue burst to end
→
Write recovering
Burst stop
→
Row active
Term burst, start read: determine AP
Term burst, new write:Determine AP
ILLEGAL
Term burst precharging
ILLEGAL
ILLEGAL
Notes
2
2
3
3
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MPS
DESL
NOP or BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
4
5
5
3
6
7
7,8
3
7,8
7
3
9
Document:1G5-0133
Rev.1
Page 9
VML [ VANGUARD INTERNATIONAL SEMICONDUCTOR ]
