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W83194BR-97 参数 Datasheet PDF下载

W83194BR-97图片预览
型号: W83194BR-97
PDF下载: 下载PDF文件 查看货源
内容描述: 200MHZ时钟CAMINO CHIPSET [200MHZ CLOCK FOR CAMINO CHIPSET]
分类和应用: 时钟
文件页数/大小: 11 页 / 206 K
品牌: WINBOND [ WINBOND ]
 浏览型号W83194BR-97的Datasheet PDF文件第1页浏览型号W83194BR-97的Datasheet PDF文件第2页浏览型号W83194BR-97的Datasheet PDF文件第3页浏览型号W83194BR-97的Datasheet PDF文件第5页浏览型号W83194BR-97的Datasheet PDF文件第6页浏览型号W83194BR-97的Datasheet PDF文件第7页浏览型号W83194BR-97的Datasheet PDF文件第8页浏览型号W83194BR-97的Datasheet PDF文件第9页  
W83194BR-97
PRELIMINARY
The Pin column lists the affected pin number and the @PowerUp column gives the state at true
power up. Registers are set to the values shown only on true power up. "Command Code" byte and
"Byte Count" byte must be sent following the acknowledge of the Address Byte. Although the data
(bits) in these two bytes are considered "don't care", they must be sent and will be acknowledge.
After that, the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and
acknowledged.
Frequency Selection BY I2C
SSEL5 SSEL4 SSEL3 SSEL2 SSEL1 SSEL0
CPU CPU/2 3V66/
(MHz)
CPU
103.00
105.00
100.30
100.90
107.00
109.00
112.00
114.00
116.10
118.00
133.30
120.00
122.00
125.10
128.20
130.00
133.00
133.90
138.00
142.00
146.00
150.00
153.00
156.00
159.10
162.00
165.00
168.00
171.00
174.00
177.00
180.00
51.50
52.50
50.15
50.45
53.50
54.50
56.00
57.00
58.05
59.00
66.65
60.00
61.00
62.55
64.10
65.00
66.50
66.95
69.00
71.00
73.00
75.00
76.50
78.00
79.55
81.00
82.50
84.00
85.50
87.00
88.50
90.00
0.67
0.67
0.67
0.67
0.67
0.67
0.67
0.67
0.67
0.67
0.50
0.67
0.67
0.67
0.67
0.67
0.67
0.50
0.50
0.50
0.50
0.50
0.50
0.50
0.50
0.50
0.50
0.50
0.50
0.50
0.50
0.50
3V66
(MHz)
68.67
70.00
66.87
67.27
71.33
72.67
74.67
76.00
77.40
78.67
66.65
80.00
81.33
83.40
85.47
86.67
88.67
66.95
69.00
71.00
73.00
75.00
76.50
78.00
79.55
81.00
82.50
84.00
85.50
87.00
88.50
90.00
3V66
(MHz)
PCI
(MHz)
34.33
35.00
33.43
33.63
35.67
36.33
37.33
38.00
38.70
39.33
33.33
40.00
40.67
41.70
42.73
43.33
44.33
33.48
34.50
35.50
36.50
37.50
38.25
39.00
39.78
40.50
41.25
42.00
42.75
43.50
44.25
45.00
PCI
(MHz)
IOAPIC (MHz)
FREQ_APIC=1
IOAPIC (MHz)
FREQ_APIC=0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
17.17
17.50
16.72
16.82
17.83
18.17
18.67
19.00
19.35
19.67
16.66
20.00
20.33
20.85
21.37
21.67
22.17
16.74
17.25
17.75
18.25
18.75
19.13
19.50
19.89
20.25
20.63
21.00
21.38
21.75
22.13
22.50
IOAPIC (MHz)
FREQ_APIC=1
34.33
35.00
33.43
33.63
35.67
36.33
37.33
38.00
38.70
39.33
33.33
40.00
40.67
41.70
42.73
43.33
44.33
33.48
34.50
35.50
36.50
37.50
38.25
39.00
39.78
40.50
41.25
42.00
42.75
43.50
44.25
45.00
IOAPIC (MHz)
FREQ_APIC=0
SSEL5 SSEL4 SSEL3 SSEL2 SSEL1 SSEL0
CPU CPU/2 3V66/
(MHz)
CPU
-4-
Publication Release Date: Dec. 1999
Revision 0.35