W83301R
Preliminary
5. Application Circuit
5VSB
C1
0.1u
3.3Vdual
5V
U1
6
C2
0.1u
20
Q1
MOSFET N
5VSB
STRdrv1
Q2
MOSFET N
16
5VDRV
STRsen1
19
3.3Vdual
C3
1000u
2.5V
Q3
MOSFET N
15
5VDLSB
STRdrv2
1
Q4
MOSFET N
C4
0.1u
5VDUAL
C5
1000u
17
10
12
PWOK
5VDLEN
S3
SLP_S5#
(chipset)
14
13
11
PWOK
5VDLEN
S3
S5
STRsen2
2
C6
1000u
Q5
MOSFET N
1.25V
STRdrv3
3
VSET0
GND
VSET1
ChrPmp
STRsen3
SS
C1
C2
4
R1
5VSB
1.5k
VSET1
18
5
7
8
Connect VSET0 and VSET1 as following table to
set operation mode and output voltage
C7
0.1u
C8
0.1u
9
C9
0.1u
Figure 2. Mode A (DDR Mode) Application Circuit
Mode
VSET0
0V
VSET1
0V
NC
5V
STR1
2.5V
DUAL
2.6V
DUAL
2.7V
DUAL
Bus Termination Controller
1.25V
DUAL
1.30V
DUAL
1.35V
DUAL
DDR
0V
0V
Confidential
Revision 0.6
4
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