W83697HG 参数 Datasheet PDF下载

W83697HF/ HG

7.1

7.2

Plug and Play Configuration ......................................................................................... 62

Compatible PnP............................................................................................................ 62

7.2.1

7.2.2

7.2.3

Extended Function Registers..........................................................................................62

Extended Functions Enable Registers (EFERs) .............................................................63

Extended Function Index Registers (EFIRs), Extended Function Data Registers(EFDRs)

63

Enter the extended function mode..................................................................................63

Configurate the configuration registers ...........................................................................63

Exit the extended function mode ....................................................................................63

Software programming example .....................................................................................64

7.3

Configuration Sequence ............................................................................................... 63

7.3.1

7.3.2

7.3.3

7.3.4

7.4

7.5

7.6

7.7

7.8

7.9

7.10

7.11

7.12

7.13

7.14

8.

8.1

8.2

9.

9.1

9.2

9.3

10.

11.

12.

13.

14.

Chip (Global) Control Register ..................................................................................... 65

Logical Device 0 (FDC)................................................................................................. 70

Logical Device 1 (Parallel Port) .................................................................................... 73

Logical Device 2 (UART A)........................................................................................... 74

Logical Device 3 (UART B)........................................................................................... 75

Logical Device 6 (CIR).................................................................................................. 76

Logical Device 7 (Game Port GPIO Port 1).................................................................. 77

Logical Device 8 (MIDI Port and GPIO Port 5) ............................................................. 78

Logical Device 9 (GPIO Port 2 ~ GPIO Port 4 ) ........................................................... 80

Logical Device A (ACPI) ............................................................................................... 82

Logical Device B (Hardware Monitor)........................................................................... 87

Absolute Maximum Ratings .......................................................................................... 88

DC CHARACTERISTICS.............................................................................................. 88

Parallel Port Extension FDD ......................................................................................... 96

Parallel Port Extension 2FDD ....................................................................................... 97

Four FDD Mode ............................................................................................................ 97

SPECIFICATIONS .................................................................................................................... 88

APPLICATION CIRCUITS ........................................................................................................ 96

ORDERING INSTRUNCTION .................................................................................................. 98

HOW TO READ THE TOP MARKING...................................................................................... 98

PACKAGE DIMENSIONS ......................................................................................................... 99

APPENDIX A : DEMO CIRCUIT ............................................................................................. 100

REVISION HISTORY .............................................................................................................. 105

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Publication Release Date: May 30, 2005

Revision A1