X24C00PI-2.7 参数 Datasheet PDF下载

X24C00

Bus Timing

tF

SCL

tSU:STA

SDA IN

tAA

SDA OUT

3836 FHD F10

tHIGH

tLOW

tR

tHD:STA

tHD:DAT

tSU:DAT

tSU:STO

tDH

tBUF

WRITE CYCLE LIMITS

Symbol

t

WR(4)

Parameter

Write Cycle Time

Min.

Max.

5

Units

ms

3836 PGM T09

Write Cycle Timing

SCL

SDA

D0

tWR

START

CONDTION

X24C00

ADDRESS

3836 ILL F11.1

Note:

(4) The write cycle time is the time from the initiation of a write sequence to the end of the internal erase/program cycle. During the

write cycle, the X24C00 bus interface circuits are disabled, SDA is high impedance, and the device does not respond to start

conditions.

7