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X5083P 参数 Datasheet PDF下载

X5083P图片预览
型号: X5083P
PDF下载: 下载PDF文件 查看货源
内容描述: CPU监控与8Kbit SPI EEPROM [CPU Supervisor with 8Kbit SPI EEPROM]
分类和应用: 光电二极管监控可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 21 页 / 116 K
品牌: XICOR [ XICOR INC. ]
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X5083
Resetting the V
TRIP
Voltage
This procedure is used to set the V
TRIP
to a “native”
voltage level. For example, if the current V
TRIP
is 4.4V
and the new V
TRIP
must be 4.0V, then the V
TRIP
must
be reset. When V
TRIP
is reset, the new V
TRIP
is some-
thing less than 1.7V. This procedure must be used to
set the voltage to a lower value.
To reset the new V
TRIP
voltage, apply the desired
V
TRIP
threshold voltage to the Vcc pin and tie the WP
pin to the programming voltage V
P
. Then send a WREN
command, followed by a write of data 00h to address
03h. CS going HIGH on the write operation initiates the
V
TRIP
programming sequence. Bring WP LOW to com-
plete the operation.
Note:
This operation also writes 00h to array address
03h.
Figure 2. Reset V
TRIP
Level Sequence (V
CC
> 3V. WP = 15–18V)
WP
V
P
= 15-18V
CS
0 1 2 3 4 5 6 7
SCK
16 Bits
SI
06h
WREN
02h
Write
0003h
Address
00h
Data
0 1 2 3 4 5 6 7 8 9 10
20 21 22 23
Figure 3. Sample V
TRIP
Reset Circuit
4.7K
V
P
Adjust
V
TRIP
Adj.
1
2
3
4
X5083
8
7
6
5
RESET
µC
SCK
SI
SO
CS
Run
REV 1.1.6 6/25/02
www.xicor.com
Characteristics subject to change without notice.
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