QDC10 - Multiplex Data on Battery Power Lines
Byte from QDC10 to Host
DataIn
DataOut
ClockIn
Data sampling
Figure 4.3 - QDC10 to Host byte transfer
4.1.2.2
Host to QDC10 data transfer
Host to QDC10 byte transfer starts when DataIn goes high and ClockIn goes high too (within 100uS).
When QDC10 is ready to accept the data, its DataOut signal goes high. The Host sets DataIn signal
according to the data bits to be transferred, then ClockIn goes Low. The QDC10 samples the data on
the falling edge of ClockIn. Eight bits are transferred this way. After 8 bits transfer, ClockIn goes low.
DataIn goes low only when the Host is ready to accept data from QDC10. Otherwise it should be left
high. The QDC10 DataOut signal goes low to indicate reception of a byte and ready to receive another
byte. If QDC10 does not raise its DataOut in response to the first DataIn rise within 2mS, the Host has to
assume that the QDC10 is receiving a message. In this case Host shall wait 3mS for QDC10 response
(RxData or RxError) then the Host has to lower the DataIn signal and may try to send its data again
later.
Figure 4.4 - Host to QDC10 byte transfer
Figure 4.5 - Example for two bytes transfer
© 2002-2010 YAMAR Electronics Ltd.
7
DS-QDC10 R1.5
www.yamar.com
Shimon Hatarsi Tel Aviv, Israel. Tel (972) 3 5445294 Fax (972) 3 5445279
YAMAR [ YAMAR ELECTRONICS LTD. ]
