Proprietary and Confidential Information of YAMAR Electronics Ltd.
3
SIG40 SIGNALS
The SIG40 Signals are divided into three main functions:
•
Host input / output
•
Line interface
•
Sleep mechanism
Figure 3.1 describes the interconnections between SIG40 its host, the ceramic filters and the DC line.
Ceramic
Filter
TxOn
DTxO
MF0nF1
RxOn
DRxP
DC-Line
UART
HOST
LIN Controller
HDI
HDO
HDC
Wake
~Data/Control
nSleep
INH
InterfHop
SIG40
Line
Interface
Ceramic
Filter II
Crystal
Figure 3.1 - Interfacing the SIG40
Device signals are defined in table 3.1.
Table 3.1 - Device signals
Host I/O
signals
HDO
INH
HDI
nSleep
HDC
nReset
Wake
InterfHop
Line Interface
signals
MF0nF1
OscOut
OscIn
RxN
RxP
DTxO
TxOn
RxOn
Power signals
Vcc
Gnd
GndPLL
VccPLL
Data Output
Inhibit operation Output
Data Input
Sleep Input
Data/Command Input
Reset Input
Wakeup Input
Allow Interference hopping Input
1
2
3
4
5
6
7
8
F0/F1 selected Output
Crystal Output
Crystal Input
Rx Analog - Input
Rx Analog + Input
Transmit data Output
Transmit On Output
Receive On Output
10
12
13
15
16
18
19
20
Power
Power
Ground for PLL
Vcc for PLL
14
17
11
9
3.1
Host interface
Three lines are dedicated for Host data input / output and for command.
3.1.1
HDI
Data input signal to the SIG40. Transfer data from host to SIG40. When not in use should be pulled Up.
3.1.2
HDO
Data output signal from SIG40. Transfers received data to host.
3.1.3
HDC
Data/Command mode. When Low, enables read and write to internal registers. When not in use should
be pulled Up.
@ 2007 Yamar Electronics Ltd.
3
DS-SIG40 R1.8
YAMAR [ YAMAR ELECTRONICS LTD. ]
