Preliminary and proprietary Information of YAMAR Electronics Ltd. Subject to change without notice.
3 SIG61 SIGNALS
Device signals are described in table 3.1.
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
INH
nSleep
AutoSleep
nReset
Out0
Out1
Wake
Out2
Out3
MF1nF0
Out4
Out5
TxOn
Out6
Out7
RxOn
F0F1-0
F0F1-1
Gnd
OscO
OscIn
AGnd
F0F1-2
F0F1-3
Vcc
F1B
F0B
AVdd
RxP
Mode3
Mode4
AutoFreqCh
Gnd
Vdd
HDO
In7
In6
F1nF0
In5
In4
In3_HDC
In2_HDI
Vdd
In1
DTxO
Gnd
In0
Mode2_LBD
SIG61
Id0
Test
Id1
Id2
Id3
Vdd
RxIn
RxN
TxO
Gnd
Gnd
NC
Vdd
InterHope
BitRate1
BitRate0
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
EXP
EXP
Pin name
HDO
INH
Pin# Pin type
35
32
Output
8mA
Output
8mA
Input
Input
nSleep
Wake
31
26
Control Signals
Digital data output signal. Output the received data from the
powerline to the host.
Inhibit output for enabling the host or an external voltage regulator
powering the host. This signal is HIGH in the normal and standby
modes and LOW in sleep mode.
Sleep control input. Pulling this signal to LOW puts the SIG61 in
sleep mode. Should be pulled to Vdd.
Local wakeup input. Negative or positive edge triggered. This pin can
be connected to an external switch in the application. When the pin is
triggered the device will wake up and send a wake up message to all
the devices on the network. When not in use, this pin should be
pulled Up or Down.
is detected on the DC line. When HIGH, detection of interference
switches the operating frequency between F0 and F1. If at the new
frequency, no reception occurred for 2 sec, the operating frequency is
switched back. For designs with a single channel this pin should be
tied to ground.
nReset
InterfHop
29
3
Input, PU Reset Input
Input, PD
Allows automatic frequency hoping whenever an interference signal
Test
MF1nF0
15
23
OscO
52
Input, PD Should be connected to Gnd
Output
Output indicating the operating frequency. F1 when HIGH and F0
12mA
when LOW.
Line Interface signals
Analog Crystal Output
Output
© 2010 Yamar Electronics Ltd.
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Figure 3.1 - SIG61 Pin-out
Description
3
DS-SIG61 R0.932
YAMAR [ YAMAR ELECTRONICS LTD. ]
