eZ80F91 ASSP
Product Specification
237
Note: In ZDI single-byte read operations, after each read operation, the Program Counter (PC)
address is incremented by two bytes. For example, if the current PC address is 0x00, then
a read operation at 0x00increments the PC to 0x02. To read the next byte, the PC must be
decremented by one.
ZDI Block Read
A block read operation is initiated in the same manner as a single-byte read; however, the
ZDI master continues to clock in the next byte from the ZDI slave as the ZDI slave contin-
ues to output data. The ZDI register address counter increments with each read. If the ZDI
register address reaches the end of the read-only ZDI register address space (20h), the
address stops incrementing. Figure 56 shows the ZDI’s block read timing.
ZDI Data Bytes
ZCL
ZDA
7
8
9
1
2
3
7
8
9
1
2
9
A0
Read
0/1
D7
D6
D5
D1
D0
0/1
D7
D6
1
msb
of DATA
Byte 1
lsb
of DATA
Byte 1
msb
of DATA
Byte 2
lsb of
Single-Bit
Single-Bit
Byte Separator
ZDI Address Byte Separator
Figure 56. ZDI Block Data Read Timing
Operation of the eZ80F91 Device During ZDI Break Points
If the ZDI forces the CPU to break, only the CPU suspends operation. The system clock
continues to operate and drive other peripherals. Those peripherals that operate autono-
mously from the CPU continues to operate, if so enabled. For example, the Watchdog
Timer and Programmable Reload Timers continue to count during a ZDI break point.
When using the ZDI interface, any write or read operations of peripheral registers in the I/
O address space produces the same effect as read or write operations using the CPU. As
many register read/write operations exhibit secondary effects, such as clearing flags or
causing operations to commence, the effects of the read/write operations during a ZDI
break must be taken into consideration.
PS027004-0613
P R E L I M I N A R Y
Zilog Debug Interface
ZILOG [ ZILOG, INC. ]
