Z02205
Modem Controller
ZiLOG
Additional Timing Table (SCLK/TCLK = XTAL/2)
Note
[3]
V
CC
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
5.5V
T
A
= 0°C to +70°C
16 MHz
Min
62.5
250
31
125
70
5TpC
8TpC
100
70
5TpC
5TpC
12
5TpC
Max
DC
DC
15
Units
ns
ns
ns
ns
ns
ns
Notes
1,7
1,8
1
1
1,8
1
1
1
1
1,2
1,3
1,2
4
D1, D0
[Note]
0, 0 [5]
0, 1 [5]
1, 0 [5]
1, 1 [5]
No
1
2
3
4
5
6
7
8A
8B
9
10
11
Symbol
TpC
TrC,TfC
TwC
TwTinL
TwTinH
TpTin
TrTin, TfTin
TwIL
TwIL
TwIH
Twsm
Tost
Parameter
Input Clock Period
Clock Input Rise & Fall Times
Input Clock Width
Timer Input Low Width
Timer Input High Width
Timer Input Period
Timer Input Rise & Fall Timer
Int. Request Low Time
Int. Request Low Time
Int. Request Input High Time
Stop-Mode Recovery Width Spec
Oscillator Startup Time
ns
ns
ns
12
Twdt
Watch-Dog Timer Delay Time
before time-out
13
T
POR
Power-On Reset Delay
5.5V
5.5V
5.5V
5.5V
5.5V
3.5
7
14
56
1.5
13
ms
ms
ms
ms
ms
Notes::
1. Timing Reference uses 0.7 V
CC
for a logic 1 and 0.2 V
CC
for a logic 0.
2. Interrupt request via Port 3 (P31–P33).
3. Interrupt request via Port 3 (P30).
4. SMR–D5 = 0.
5. Reg. WDTMR.
6. The V
DD
voltage specification of 5.5V guarantees 5.0V ± 0.5V.
7. Standard Oscillator mode, Pcon RegD7=1.
8. Maximum frequency for external XTAL Clock is 4MHz when using low EMI oscillator mode, Pcon Reg D7=0.
8
PS001000-MOD0599
ZILOG [ ZILOG, INC. ]
