Z
ILOG
Z5380 SCSI
P
RODUCT
S
PECIFICATION
Z5380 SCSI
S
MALL
C
OMPUTER
S
YSTEM
I
NTERFACE
(SCSI)
FEATURES
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s
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s
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Pin Compatible with the Industry Standard 5380
40-Pin DIP or 44-Pin PLCC Package Styles
Low-Power CMOS
Asynchronous Interface (Supports 1.5 MB/s)
Direct SCSI Bus Interface with On-Board 48 mA Drivers
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s
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Supports Target and Initiator Roles
Arbitration Support
DMA or Programmed I/O Data Transfers
Supports Normal or Block Mode DMA
Memory or I/O Mapped CPU Interface
GENERAL DESCRIPTION
The Z5380 SCSI (Small Computer System Interface) con-
troller is designed to implement the SCSI protocol as
defined by the ANSI X3.131-1986 standard, and is fully
compatible with the industry standard 5380. It is capable
of operating both as a Target and as an Initiator. Special
high-current open-drain outputs enable the Z5380 to di-
rectly interface to, and drive, the SCSI bus. The Z5380 has
the necessary interface hook-ups which allows the system
CPU to communicate with it like any other peripheral
device. The CPU can read from, or write to, the SCSI
registers which are addressed as standard or memory-
mapped I/Os (Figure 1).
The Z5380 increases the system performance by minimiz-
ing the CPU intervention in DMA operations which the SCSI
controls. The CPU is interrupted by the SCSI when it
detects a bus condition that requires attention. It also
supports arbitration and reselection. The Z5380 has the
proper hand-shake signals to support normal and block
mode DMA operations with most DMA controllers avail-
able (Figure 2).
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Power
Ground
Circuit
V
CC
GND
Device
V
DD
V
SS
PS97SCC0100
PS009101-0201
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ZILOG [ ZILOG, INC. ]
