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产品型号ACPL-782T-300E的概述

芯片 ACPL-782T-300E 概述 ACPL-782T-300E 是一款高性能的光耦合器,主要用于数据和控制信号的隔离传输。随着电子设备的日益普及,尤其是在自动化控制、计算机网络和消费电子等领域,光耦合器的应用愈发广泛。该芯片通过采用先进的光电技术,实现信号的高效隔离,确保了在复杂电气环境中系统的安全性和可靠性。 芯片 ACPL-782T-300E 的详细参数 ACPL-782T-300E 的主要参数包括: - 光源类型:发光二极管(LED) - 接收器类型:光电二极管 - 传输增益:较高的电流增益 - 最大接收电流:通常在几十毫安范围内 - 工作电压:一般为 5V 至 15V - 隔离电压:通常为 2500 Vrms(有效隔离电压) - 工作温度范围:一般在 -40°C 到 +85°C - 传播延迟:在适当配置下,传播延迟可低至 30 ns 这些参数使 ACPL-782T-30...

产品型号ACPL-782T-300E的Datasheet PDF文件预览

ACPL-782T  
Automotive Isolation Amplifier  
2
with R Coupler™ Isolation  
Data Sheet  
Lead (Pb) Free  
RoHS 6 fully  
compliant  
RoHS 6 fully compliant options available;  
-xxxE denotes a lead-free product  
Description  
Features  
2ꢀ ꢁain Tolerance @ 25°C  
The ACPL-782T isolation amplifier was designed for  
voltage and current sensing in electronic motor drives  
and battery system monitoring. In a typical implementa-  
tion, and motor currents flow through an external resistor  
and the resulting analog voltage drop is sensed by the  
ACPL-782T. A differential output voltage is created on the  
other side of the ACPL-782T optical isolation barrier. This  
differential output voltage is proportional to the motor  
current and can be converted to a single-ended signal  
by using an op-amp as shown in the recommended ap-  
plication circuit. Since common-mode voltage swings  
of several hundred volts in tens of nanoseconds are  
common in modern switching inverter motor drives, the  
ACPL-782T was designed to ignore very high common-  
mode transient slew rates (of at least 10 kV/s).  
15 kV/s Common-Mode Rejection at V = 1000V  
30ppm/°C ꢁain Drift vs. Temperature  
0.3 mV Input Offset Voltage  
100 kHz Bandwidth  
0.004ꢀ Nonlinearity  
CM  
Compact, Auto-Insertable Standard 8-pin DIP Package  
Worldwide Safety Approval:  
– UL 1577 (3750 V /1 min.) and  
RMS  
– CSA  
– IEC 60747-5-5, DIN EN 60747-5-2(VDE 0884 Teil 2)  
Qualified to AEC-Q100 Test ꢁuidelines  
Automotive Operating Temperature -40 to 125°C  
Advanced Sigma-Delta (ꢁꢂꢃ) A/D Converter Technology  
Fully Differential Circuit Topology  
The high CMR capability of the ACPL-782T isolation  
amplifier provides the precision and stability needed to ac-  
curately monitor motor current and DC rail voltage in high  
noise motor control environments, providing for smoother  
control(less“torqueripple”)invarioustypesofmotorcontrol  
applications.  
Applications  
Automotive Motor Inverter Current/Voltage Sensing  
Automotive AC/DC and DC/DC converter Current/  
Voltage sensing  
The product can also be used for general analog signal  
isolation applications requiring high accuracy, stability,  
and linearity under similarly severe noise conditions. The  
ACPL-782T utilizes sigma delta (ꢁꢂꢃ) analog-to-digital  
converter technology, chopper stabilized amplifiers, and  
a fully differential circuit topology.  
Automotive Battery ECU  
Automotive Motor Phase Current Sensing  
Isolation Interface for Temperature Sensing  
ꢁeneral Purpose Current Sensing and Monitoring  
Functional Diagram  
Together, these features deliver unequaled isolation-  
mode noise rejection, as well as excellent offset and  
gain accuracy and stability over time and temperature.  
This performance is delivered in a compact, auto-insert-  
able, industry standard 8-pin DIP package that meets  
worldwide regulatory safety standards. (A gull-wing  
surface mount option -300E is also available).  
IDD1  
IDD2  
VDD1  
VIN+  
VIN-  
8
7
VDD2  
1
2
VOUT+  
+
-
+
-
3
4
6
5
VOUT-  
GND1  
GND2  
2
Avago R Coupler isolation products provide the rein-  
SHIELD  
forced insulation and reliability needed for critical in auto-  
motive and high temperature industrial applications.  
The connection of a 0.1 F bypass capacitor between  
pins 1 and 4, pins 5 and 8 is recommended.  
CAUTION: It is advised that normal static precautions be taken in handling and assembly  
of this component to prevent damage and/or degradation which may be induced by ESD.  
Option  
(RoHS Compliant)  
Part Number  
Package  
Surface Mount  
Gullwing  
Tape & Reel  
-000E  
-300E  
-500E  
ACPL-782T  
300mil DIP-8  
X
X
X
X
X
To order, choose a part number from the part number column and combine with the desired option from the option  
column to form an order entry.  
Example:  
ACPL-782T-500E to order product of gullwing SMT DIP-8 package in Tape and Reel packaging with RoHS compliant.  
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.  
Package Outline Drawings  
ACPL-782T-000E Standard DIP Package  
9.80 0.25  
(0.386 0.010ꢀ  
Dimensions in millimeters and (inches).  
8
7
6
5
Note:  
Floating lead protrusion is 0.5 mm (20 mils) max.  
DATE CODE  
A 782T  
YYWW  
EE  
EXTENDED DATE CODE  
1
2
3
4
7.62 0.25  
(0.300 0.010ꢀ  
1.78 (0.070ꢀ MAX.  
1.19 (0.047ꢀ MAX.  
6.35 0.25  
(0.250 0.010ꢀ  
3.56 0.13  
(0.140 0.005ꢀ  
4.70 (0.185ꢀ MAX.  
0.51 (0.020ꢀ MIN.  
2.92 (0.115ꢀ MIN.  
0.20 (0.008ꢀ  
0.33 (0.013ꢀ  
5° TYP.  
1.080 0.320  
(0.043 0.013ꢀ  
0.65 (0.025ꢀ MAX.  
2.54 0.25  
(0.100 0.010ꢀ  
2
Gull Wing Surface Mount Option 300E and 500E  
LAND PATTERN RECOMMENDATION  
1.016 (0.040ꢀ  
9.80 0.25  
(0.386 0.010ꢀ  
6
8
7
5
A 782T  
6.350 0.25  
(0.250 0.010ꢀ  
10.9 (0.430ꢀ  
2.0 (0.080ꢀ  
YYWW  
EE  
1
3
2
4
1.27 (0.050ꢀ  
9.65 0.25  
1.780  
(0.380 0.010ꢀ  
(0.070ꢀ  
1.19  
(0.047ꢀ  
MAX.  
MAX.  
7.62 0.25  
(0.300 0.010ꢀ  
0.20 (0.008ꢀ  
0.33 (0.013ꢀ  
3.56 0.13  
(0.140 0.005ꢀ  
1.080 0.320  
(0.043 0.013ꢀ  
0.635 0.25  
(0.025 0.010ꢀ  
12° NOM.  
0.635 0.130  
(0.025 0.005ꢀ  
2.54  
(0.100ꢀ  
BSC  
Dimensions in millimeters (inches).  
Tolerances (unless otherwise specified): xx.xx = 0.01  
xx.xxx = 0.005  
LEAD COPLANARITY  
MAXIMUM: 0.102 (0.004ꢀ  
Note: Floating lead protrusion is 0.5 mm (20 mils) max.  
Recommended Pb-Free IR Profile  
Recommended reflow condition as per JEDEC Standard, J-STD-020 (latest revision). Non-Halide Flux should be used.  
Regulatory Information  
The ACPL-782T-000E is approved by the following organizations:  
IEC/DIN  
UL  
IEC 60747-5-5  
UL 1577, component recognition program up to V  
=
ISO  
3750 V  
RMS  
DIN EN 60747-5-2(VDE 0884 Teil 2)  
CSA  
Approved under CSA Component AcceptanceNotice #5,  
File CA 88324.  
3
IEC 60747-5-5, DIN EN 60747-5-2(VDE 0884 Teil 2) Insulation Characteristics  
Description  
Symbol  
Characteristic  
Unit  
Installation classification per DIN VDE 0110/1.89, Table 1  
ꢅꢅꢅꢅfor rated mains voltage 300 Vrms  
ꢅꢅꢅꢅꢅfor rated mains voltage 450 Vrms  
I-IV  
I-III  
I-II  
ꢅꢅꢅꢅꢅfor rated mains voltage 600 Vrms  
Climatic Classification  
55/125/21  
Pollution Degree (DIN VDE 0110/1.89)  
Maximum Working Insulation Voltage  
Input to Output Test Voltage, Method b[2] VIORM x 1.875 = VPR  
100ꢀ Production Test with tm = 1 sec, Partial discharge < 5 pC  
Input to Output Test Voltage, Method a[2] VIORM x 1.6 = VPR  
2
VIORM  
VPR  
891  
1670  
VPEAK  
VPEAK  
,
,
VPR  
1426  
6000  
VPEAK  
VPEAK  
Type and Sample Test, tm = 60 sec, Partial discharge < 5 pC  
Highest Allowable Overvoltage (Transient Overvoltage tini = 60 sec)  
VIOTM  
Safety-limiting values—maximum values allowed in the event of a failure.  
ꢅꢅꢅꢅꢅCase Temperature  
ꢅꢅꢅꢅꢅInput Current[3]  
ꢅꢅꢅꢅꢅOutput Power[3]  
TS  
175  
400  
600  
°C  
mA  
mW  
IS,INPUT  
PS,OUTPUT  
Insulation Resistance at TS , VIO = 500 V  
RS  
>109  
Notes:  
1. Insulation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits within the  
application. Surface Mount Classification is Class A in accordance with CECC00802.  
2. Refer to the optocoupler section of the Isolation and Control Components Designer’s Catalog, under Product Safety Regulations section, (IEC  
60747-5-5/DIN EN 60747-5-2) for a detailed description of Method a and Method b partial discharge test profiles.  
3. Refer to the following figure for dependence of PS and IS on ambient temperature.  
800  
PS (mWꢀ  
IS (mAꢀ  
700  
600  
500  
400  
300  
200  
100  
0
0
25  
50  
75  
100 125 150 175 200  
TA - CASE TEMPERATURE - °C  
4
Insulation and Safety Related Specifications  
Parameter  
Symbol  
Value  
Units  
Conditions  
Minimum External  
Air ꢁap (Clearance)  
L(101)  
7.4  
mm  
Measured from input terminals to output terminals,  
shortest distance through air.  
Minimum External  
Tracking (Creepage)  
L(102)  
CTI  
8.0  
0.5  
mm  
mm  
Measured from input terminals to output terminals,  
shortest distance path along body.  
Minimum Internal  
Plastic ꢁap  
(Internal Clearance)  
Through insulation distance conductor to conductor,  
usually the straight line distance thickness between  
the emitter and detector.  
Tracking Resistance  
(Comparative  
Tracking Index)  
>175  
IIIa  
Volts  
DIN IEC 112/VDE 0303 Part 1  
Isolation ꢁroup  
(DIN VDE0109)  
Material ꢁroup (DIN VDE 0110)  
Absolute Maximum Ratings  
Parameter  
Symbol  
TS  
Min.  
-55  
-40  
0
Max.  
130  
Units  
°C  
Storage Temperature  
Operating Temperature  
Supply Voltage  
TA  
125  
°C  
VDD1, VDD2  
VIN+, VIN-  
5.5  
Volts  
Volts  
Volts  
Volts  
Steady-state Input Voltage  
-2.0  
-6.0  
-0.5  
VDD1 + 0.5  
2 second Transient Input Voltage  
Output Voltage  
VOUT  
VDD2 + 0.5  
Solder Reflow Temperature Profile  
See Package Outline Drawings Section  
Recommended Operating Conditions  
Parameter  
Symbol  
TA  
Min.  
-40  
4.5  
Max.  
125  
5.5  
200  
2
Units  
°C  
Notes  
Ambient Operating Temperature  
Power Supply Voltage  
VDD1, VDD2  
VIN+, VIN-  
VIN+, VIN-  
Volts  
mV  
V
Input Voltage (Accurate & Linear)  
Input Voltage (Functional)  
-200  
-2  
1
5
DC Electrical Specifications  
Unless otherwise noted, all typical and figures are at the nominal operating conditions of V = 0, V = 0 V, V  
= V  
DD2  
IN+  
IN-  
DD1  
= 5 V and T = 25°C; all Min. /Max. Specifications are within the Recommended Operating Conditions.  
A
Parameter  
Symbol  
Min.  
-2.0  
-4.0  
Typ.*  
Max.  
2.0  
Units  
mV  
Test Conditions  
Fig.  
Note  
Input Offset Voltage  
VOS  
0.3  
TA=25°C  
1,2  
4.0  
mV  
-40°C < TA < +125°C,  
-4.5V < (VDD1, VDD2) < 5.5V  
Magnitude of Input  
Offset Change vs.  
Temperature  
|VOS/TA|  
3.0  
10.0  
8.16  
V/°C  
3
2
ꢁain  
7.84  
8.00  
30  
V/V  
-200 mV < VIN+ < 200 mV, 4,5,6  
TA = 25°C,  
3
4
Magnitude of VOUT  
ꢁain Change vs.  
Temperature  
|ꢁ/  
ꢁ/TA|  
PPM/°C  
V
OUT 200 mV  
NL200  
0.0037 0.35  
0.0002  
-200 mV < VIN+ < 200 mV  
-100 mV < VIN+ < 100mV  
7,8  
5
Nonlinearity  
Magnitude of VOUT  
200mV Nonlinearity  
Change vs. Temperature  
|NL200/T|  
ꢀ/°C  
VOUT 100 mV  
NL100  
0.0027 0.2  
308.0  
6
Nonlinearity  
Maximum Input  
Voltage before  
|VIN+|MAX  
mV  
9
VOUT Clipping  
Input Supply Current  
Output Supply Current  
Input Current  
IDD1  
10.86  
11.56  
-0.5  
16.0  
20.0  
mA  
VIN+ = 400 mV  
VIN+ = -400 mV  
10  
11  
7
8
9
IDD2  
mA  
IIN+  
-5  
A  
Magnitude of Input  
Bias Current vs.  
|IIN/T|  
0.45  
nA/°C  
Temperature coefficient  
Output Low Voltage  
Output High Voltage  
VOL  
1.29  
3.80  
2.545  
V
V
V
10  
11  
VOH  
VOCM  
Output Common-Mode  
Voltage  
2.2  
2.8  
Output Short-Circuit  
Current  
|IOSC  
RIN  
ROUT  
|
18.6  
500  
mA  
Equivalent Input Imped-  
ance  
kꢆ  
VOUT Output Resistance  
15  
76  
Input DC Common-Mode CMRRIN  
Rejection Ratio  
dB  
12  
6
AC Electrical Specifications  
Unless otherwise noted, all typicals and figures are at the nominal operating conditions of V = 0, V = 0 V, V =  
DD1  
IN+  
IN-  
V
DD2  
= 5 V and T = 25°C; all Min./Max. specifications are within the Recommended Operating Conditions.  
A
Parameter  
Symbol  
Min.  
Typ.*  
Max.  
Units  
Test Conditions  
Fig.  
Note  
VOUT Bandwidth  
(-3 dB) sine wave.  
BW  
50  
100  
kHz  
VIN+ = 200mVpk-pk  
12,13  
VOUT Noise  
NOUT  
tPD10  
6
mVRMS  
VIN+ = 0.0 V  
13  
VIN to VOUT Signal  
Delay (50 – 10ꢀ)  
2.03  
3.3  
5.6  
9.9  
6.6  
s  
Measured at output of  
MC34081on Figure 15.  
4,15  
VIN to VOUT Signal  
Delay (50 – 50ꢀ)  
tPD50  
tPD90  
tR/F  
3.47  
4.99  
2.96  
15.0  
170  
s  
VIN+ = 0 mV to 150mV step.  
VIN to VOUT Signal  
Delay (50 – 90ꢀ)  
s  
VOUT Rise/ Fall Time  
(10 – 90ꢀ)  
s  
Common Mode  
Transient Immunity  
CMTI  
PSR  
10.0  
kV/s  
mVRMS  
VCM = 1 kV, TA = 25°C  
16  
14  
15  
Power Supply  
Rejection  
With recommended  
application circuit.  
Package Characteristics  
Parameter  
Symbol  
Min.  
Typ.*  
Max.  
Units  
Test Conditions  
Fig.  
Note  
Input-Output  
Momentary Withstand  
Voltage  
VISO  
3750  
VRMS  
RH < 50ꢀ,  
t = 1 min. TA = 25°C  
16,17  
Resistance  
(Input-Output)  
RI-O  
CI-O  
>109  
1.2  
V
I-O = 500 VDC  
18  
18  
Capacitance  
pF  
ƒ = 1 MHz  
(Input-Output)  
7
Notes:  
ꢁeneral Note: Typical values represent the mean value of all  
characterization units at the nominal operating conditions. Typical drift  
specifications are determined by calculating the rate of change of the  
specified parameter versus the drift parameter (at nominal operating  
conditions) for each characterization unit, and then averaging the  
individual unit rates. The corresponding drift figures are normalized to  
the nominal operating conditions and show how much drift occurs as  
the par-ticular drift parameter is varied from its nominal value, with all  
other parameters held at their nominal operating values. Note that the  
typical drift specifications in the tables below may differ from the slopes  
of the mean curves shown in the corresponding figures.  
12. CMRR is defined as the ratio of the differential signal gain (signal  
applied differentially between pins 2 and 3) to the common-mode  
gain (input pins tied together and the signal applied to both inputs  
at the same time), expressed in dB.  
13. Output noise comes from two primary sources: chopper noise and  
sigma-delta quantization noise. Chopper noise results from chopper  
stabilization of the output op-amps. It occurs at a specific frequency  
(typically 400 kHz at room temperature), and is not attenuated by  
the internal output filter. A filter circuit can be easily added to the  
external post-amplifier to reduce the total RMS output noise. The  
internal output filter does eliminate most, but not all, of the sigma-  
delta quantization noise. The magnitude of the output quantization  
noise is very small at lower frequencies (below 10kHz) and increases  
with increasing frequency.  
1. Avago Technologies recommends operation with V = 0 V (tied to  
IN-  
ꢁND1). Limiting V  
nonlinearity drift. If V is brought above V  
to 100 mV will improve DC nonlinearity and  
IN+  
– 2 V, an internal test  
IN-  
DD1  
mode may be activated. This test mode is for testing LED coupling  
and is not intended for customer use.  
2. This is the Absolute Value of Input Offset Change vs. Temperature.  
3. ꢁain is defined as the slope of the best-fit line of differential output  
14. CMTI (Common Mode Transient Immunity or CMR, Common Mode  
Rejection) is tested by applying an exponentially rising/falling  
voltage step on pin 4 (ꢁND1) with respect to pin 5 (ꢁND2). The  
rise time of the test waveform is set to approximately 50 ns. The  
voltage (V  
–V  
) vs. differential input voltage (V –V ) over  
amplitude of the step is adjusted until the differential output (V  
OUT+  
OUT+ OUT- IN+ IN-  
the specified input range.  
V ) exhibits more than a 200 mV deviation from the average  
OUT-  
4. This is the Absolute Value of ꢁain Change vs. Temperature in PPM  
level.  
5. Nonlinearity is defined as half of the peak-to-peak output deviation  
from the best-fit gain line, expressed as a percentage of the full-scale  
differential output voltage.  
output voltage for more than 1s. The ACPL-782T will continue to  
function if more than 10 kV/s common mode slopes are applied, as  
long as the breakdown voltage limitations are observed.  
15. Datasheet value is the differential amplitude of the transient at the  
output of the ACPL-782T when a 1 V  
, 1 MHz square wave with 40  
pk-pk  
6. NL100 is the nonlinearity specified over an input voltage range of  
100 mV.  
7. The input supply current decreases as the differential input voltage  
ns rise and fall times is applied to both V  
16. In accordance with UL 1577, each optocoupler is proof tested by  
applying an insulation test voltage ≥4500 V for 1 second (leakage  
and V  
.
DD1  
DD2  
RMS  
(V –V ) decreases.  
8. The maximum specified output supply current occurs when the  
detection current limit, II-O ≤ 5 A). This test is performed before the  
100ꢀ production test for partial discharge (method b) shown in IEC  
60747-5-5/DIN EN 60747-5-2 Insulation Characteristic Table.  
17. The Input-Output Momentary Withstand Voltage is a dielectric  
voltage rating that should not be interpreted as an input-output  
continuous voltage rating. For the continuous voltage rating refers to  
the IEC 60747-5-5/DIN EN 60747-5-2 insulation characteristics table  
and your equipment level safety specification.  
IN+ IN-  
differential input voltage (V –V ) = -200 mV, the maximum  
IN+ IN-  
recommended operating input voltage. However, the output supply  
current will continue to rise for differential input voltages up to  
approximately -300 mV, beyond which the output supply current  
remains constant.  
9. Because of the switched-capacitor nature of the input sigma-delta  
converter, time-averaged values are shown.  
10. When the differential input signal exceeds approximately 308 mV,  
the outputs will limit at the typical values shown.  
18. This is a two-terminal measurement: pins 1–4 are shorted together  
and pins 5–8 are shorted together.  
11. Short circuit current is the amount of output current generated when  
either output is shorted to V  
or ground.  
DD2  
8
VDD1  
VDD2  
+15 V  
0.1 F  
1
2
8
7
0.1 F  
10 K  
+
VOUT  
ACPL-782T  
0.1 F  
10 K  
-
6
5
3
4
AD624CD  
GAIN = 100  
0.1 F  
0.47  
F  
0.47  
F  
-15 V  
Figure 1. Input Offset Voltage Test Circuit.  
0.8  
0.7  
0.39  
0.38  
0.37  
0.36  
0.35  
vs. VDD1  
vs. VDD2  
0.6  
0.5  
0.4  
0.34  
0.33  
0.3  
0.2  
4.5  
4.75  
5.0  
VDD - SUPPLY VOLTAGE - V  
5.25  
5.5  
-55  
-25  
5
35  
65  
95  
125  
TA - TEMPERATURE - °C  
Figure 2. Input Offset Voltage vs. Temperature.  
Figure 3. Input Offset Voltage vs. Supply.  
8.035  
8.03  
8.025  
8.02  
8.015  
8.01  
-55 -35 -15  
5
25  
45 65  
85 105 125  
TA - TEMPERATURE - °C  
Figure 4. Gain vs. Temperature.  
9
VDD1  
VDD2  
+15 V  
+15 V  
0.1 F  
0.1 F  
1
2
8
7
0.1 F  
0.1 F  
10 K  
404  
VIN  
+
+
VOUT  
ACPL-782T  
13.2  
10 K  
-
-
6
5
3
4
AD624CD  
GAIN = 4  
AD624CD  
GAIN = 10  
0.01 F  
0.1 F  
0.1 F  
0.47  
F  
0.47  
F  
-15 V  
-15 V  
10 K  
0.47  
F  
Figure 5. Gain and Nonlinearity Test Circuit.  
8.032  
8.03  
0.03  
0.025  
0.02  
0.015  
0.01  
8.028  
8.026  
8.024  
vs. VDD1  
0.005  
vs. VDD2  
0
4.5  
4.75  
5.0  
5.25  
5.5  
-55  
-25  
5
35  
65  
95  
125  
VDD - SUPPLY VOLTAGE - V  
TA - TEMPERATURE - °C  
Figure 6. Gain vs. Supply.  
Figure 7. Nonlinearity vs. Temperature.  
0.005  
4.2  
3.4  
0.004  
0.003  
0.002  
2.6  
1.8  
1.0  
vs. VDD1  
vs. VDD2  
VOP  
VOR  
4.5  
4.75  
5.0  
5.25  
5.5  
-0.5  
-0.3  
-0.1  
0.1  
0.3  
0.5  
VDD - SUPPLY VOLTAGE - V  
VIN - INPUT VOLTAGE - V  
Figure 8. Nonlinearity vs. Supply.  
Figure 9. Output Voltage vs. Input Voltage.  
10  
13  
0
-1  
-2  
-3  
10  
7
4
IDD1  
IDD2  
-4  
-5  
-0.5  
-0.3  
-0.1  
0.1  
0.3  
0.5  
-0.6  
-0.4  
-0.2  
0
0.2  
0.4  
0.6  
VIN - INPUT VOLTAGE - V  
VIN - INPUT VOLTAGE - V  
Figure 10. Supply Current vs. Input Voltage.  
Figure 11. Input Current vs. Input Voltage.  
50  
0
1
0
-50  
-1  
-2  
-100  
-150  
-200  
-3  
-4  
-250  
-300  
10  
100  
1000  
10000  
100000  
10  
100  
1000  
10000  
100000  
FREQUENCY (Hzꢀ  
FREQUENCY (Hzꢀ  
Figure 12. Gain vs. Frequency.  
Figure 13. Phase vs. Frequency.  
5.5  
4.7  
3.9  
3.1  
Tpd 10  
Tpd 50  
Tpd 90  
Trise  
2.3  
1.5  
-55  
-25  
5
35  
65  
95  
125  
TA - TEMPERATURE - °C  
Figure 14. Propagation Delay vs. Temperature.  
11  
10 K  
VDD1  
VDD2  
+15 V  
0.1 F  
1
2
8
7
0.1 F  
0.1 F  
2 K  
2 K  
VIN  
-
VOUT  
ACPL-782T  
+
6
5
3
4
MC34081  
0.1 F  
0.01 F  
10 K  
-15 V  
VIN IMPEDANCE LESS THAN 10 W.  
Figure 15. Propagation Delay Test Circuits.  
10 K  
150 pF  
+15 V  
VDD2  
78L05  
IN OUT  
0.1 F  
1
2
8
7
0.1  
F  
0.1  
F  
0.1 F  
2 K  
2 K  
-
VOUT  
ACPL-782T  
9 V  
+
6
5
3
4
MC34081  
0.1 F  
10 K  
150  
pF  
PULSE GEN.  
-15 V  
-
+
VCM  
Figure 16. CMTI Test Circuits.  
12  
Application Information  
Power Supplies and Bypassing  
The recommended supply connections are shown in  
An inexpensive 78L05 three-terminal regulator can also  
Figure 17. A floating power supply (which in many be used to reduce the floating supply voltage to 5 V. To  
applications could be the same supply that is used to drive  
help attenuate high-frequency power supply noise or  
the high-side power transistor) is regulated to 5 V using a ripple, a resistor or inductor can be used in series with the  
simple zener diode (D1); the value of resistor R4 should input of the regulator to form a low-pass filter with the  
be chosen to supply sufficient current from the existing regulator’s input bypass capacitor.  
floating supply. The voltage from the current sensing  
As shown in Figure 18, 0.1 F bypass capacitors (C1, C2)  
resistor (Rsense) is applied to the input of the ACPL-782T  
should be located as close as possible to the pins of the  
through an RC anti-aliasing filter (R2 and C2). Although the  
ACPL-782T. The bypass capacitors are required because  
application circuit is relatively simple, a few recommenda-  
of the high-speed digital nature of the signals inside the  
tions should be followed to ensure optimal performance.  
ACPL-782T. A 0.01μF bypass capacitor (C2) is also rec-  
ThepowersupplyfortheACPL-782Tismostoftenobtained  
ommended at the input due to the switched-capacitor  
from the same supply used to power the power transis- nature of the input circuit. The input bypass capacitor  
tor gate drive circuit. If a dedicated supply is required, in also forms part of the anti-aliasing filter, which is recom-  
many cases it is possible to add an additional winding on mended to prevent high-frequency noise from aliasing  
an existing transformer. Otherwise, some sort of simple down to lower frequencies and interfering with the  
isolated supply can be used, such as a line powered trans- input signal. The input filter also performs an important  
former or a high-frequency DC-DC converter.  
reliability function—it reduces transient spikes from ESD  
events flowing through the current sensing resistor.  
+
HV+  
FLOATING  
POWER  
SUPPLY  
GATE DRIVE  
CIRCUIT  
* * *  
-
D1  
5.1 V  
C1  
0.1 μF  
R2  
39  
C2  
0.01 μF  
ACPL-782T  
MOTOR  
R1  
+
R
-
* * *  
SENSE  
* * *  
HV-  
Figure 17. Recommended Supply and Sense Resistor Connections.  
13  
POSITIVE  
FLOATING  
SUPPLY  
C5  
150 pF  
HV+  
GATE DRIVE  
CIRCUIT  
R3  
* * *  
10.0 K  
U1  
78L05  
+5 V  
+15 V  
C8  
IN OUT  
0.1 μF  
C1  
C2  
1
2
8
7
C4  
0.1  
μF  
0.1  
μF  
0.1 μF  
R5  
68  
R1  
-
2.00 K  
R2  
C3  
U3  
V
U2  
OUT  
0.01  
μF  
+
6
5
3
4
MC34081  
2.00 K  
MOTOR  
C7  
+
-
* * *  
C6  
150 pF  
R4  
10.0 K  
RSENSE  
0.1 μF  
ACPL-782T  
-15 V  
* * *  
HV-  
Figure 18. Recommended Application Circuit.  
PC Board Layout  
The design of the printed circuit board (PCB) should follow  
good layout practices, such as keeping bypass capacitors  
close to the supply pins, keeping output signals away from  
input signals, the use of ground and power planes, etc. In  
addition, the layout of the PCB can also affect the isolation  
transient immunity (CMTI) of the ACPL-782T, due primarily  
to stray capacitive coupling between the input and the  
output circuits. To obtain optimal CMTI performance, the  
layout of the PC board should minimize any stray coupling  
by maintaining the maximum possible distance between  
the input and output sides of the circuit and ensuring that  
any ground or power plane on the PC board does not pass  
directly below or extend much wider than the body of the  
ACPL-782T.  
C4  
C2  
R5  
C3  
TO VDD1  
TO VDD2  
VOUT+  
VOUT-  
TO RSENSE+  
TO RSENSE-  
Figure 19. Example Printed Circuit Board Layout.  
14  
Current Sensing Resistors  
ments of the design. As the resistance value is reduced,  
the output voltage across the resistor is also reduced,  
which means that the offset and noise, which are fixed,  
become a larger percentage of the signal amplitude. The  
selected value of the sense resistor will fall somewhere  
between the minimum and maximum values, depending  
on the particular requirements of a specific design.  
The current sensing resistor should have low resistance (to  
minimize power dissipation), low inductance (to minimize  
di/dt induced voltage spikes which could adversely  
affect operation), and reasonable tolerance (to maintain  
overall circuit accuracy). Choosing a particular value for  
the resistor is usually a compromise between minimiz-  
ing power dissipation and maximizing accuracy. Smaller  
sense resistance decreases power dissipation, while larger  
sense resistance can improve circuit accuracy by utilizing  
the full input range of the ACPL -782T.  
When sensing currents large enough to cause significant  
heating of the sense resistor, the temperature coefficient  
(tempco) of the resistor can introduce nonlinearity due to  
the signal dependent temperature rise of the resistor. The  
effect increases as the resistor-to-ambient thermal resis-  
tance increases. This effect can be minimized by reducing  
the thermal resistance of the current sensing resistor or  
by using a resistor with a lower tempco. Lowering the  
thermal resistance can be accomplished by reposition-  
ing the current sensing resistor on the PC board, by using  
larger PC board traces to carry away more heat, or by  
using a heat sink.  
The first step in selecting a sense resistor is determining  
how much current the resistor will be sensing.The graph in  
Figure 20 shows the RMS current in each phase of a three-  
phase induction motor as a function of average motor  
output power (in horsepower, hp) and motor drive supply  
voltage. The maximum value of the sense resistor is deter-  
mined by the current being measured and the maximum  
recommended input voltage of the isolation amplifier. The  
maximum sense resistance can be calculated by taking  
the maximum recommended input voltage and dividing  
by the peak current that the sense resistor should see  
during normal operation. For example, if a motor will have  
a maximum RMS current of 10 A and can experience up  
to 50ꢀ overloads during normal operation, then the peak  
current is 21.1 A (=10 x 1.414 x 1.5). Assuming a maximum  
input voltage of 200 mV, the maximum value of sense re-  
sistance in this case would be about 10 m.  
For a two-terminal current sensing resistor, as the value of  
resistance decreases, the resistance of the leads become a  
significant percentage of the total resistance. This has two  
primary effects on resistor accuracy. First, the effective  
resistance of the sense resistor can become dependent  
on factors such as how long the leads are, how they are  
bent, how far they are inserted into the board, and how far  
solder wicks up the leads during assembly (these issues  
will be discussed in more detail shortly). Second, the leads  
are typically made from a material, such as copper, which  
has a much higher tempco than the material from which  
the resistive element itself is made, resulting in a higher  
tempco overall.  
The maximum average power dissipation in the sense  
resistor can also be easily calculated by multiplying the  
sense resistance times the square of the maximum RMS  
current, which is about 1 W in the previous example. If the  
power dissipation in the sense resistor is too high, the re-  
sistance can be decreased below the maximum value to  
decrease power dissipation. The minimum value of the  
sense resistor is limited by precision and accuracy require-  
Both of these effects are eliminated when a four-terminal  
current sensing resistor is used. A four- terminal resistor  
has two additional terminals that are Kelvin-connected  
directly across the resistive element itself; these two  
terminals are used to monitor the voltage across the  
resistive element while the other two terminals are used  
to carry the load current. Because of the Kelvin connec-  
tion, any voltage drops across the leads carrying the load  
current should have no impact on the measured voltage.  
40  
440 V  
380 V  
35  
220 V  
120 V  
30  
25  
20  
15  
10  
WhenlayingoutaPCboardforthecurrentsensingresistors,  
a couple of points should be kept in mind. The Kelvin con-  
nections to the resistor should be brought together under  
the body of the resistor and then run very close to each  
other to the input of the ACPL-782T; this minimizes the  
loop area of the connection and reduces the possibility of  
stray magnetic fields from interfering with the measured  
signal. If the sense resistor is not located on the same PC  
board as the ACPL-782T circuit, a tightly twisted pair of  
wires can accomplish the same thing.  
5
0
0
5
10  
15  
20  
25  
30  
35  
MOTOR PHASE CURRENT - A (rmsꢀ  
Figure 20. Motor Output Horsepower vs. Motor Phase Current and Supply  
Voltage.  
15  
Also, multiple layers of the PC board can be used to supply current to the gate drive power supply in order to  
increase current carrying capacity. Numerous plated-  
through vias should surround each non-Kelvin terminal of  
the sense resistor to help distribute the current between  
the layers of the PC board. The PC board should use 2 or  
4 oz. copper for the layers, resulting in a current carrying  
capacity in excess of 20 A.  
eliminate potential ground loop problems. The only direct  
connection between the ACPL-782T circuit and the gate  
drive circuit should be the positive power supply line.  
Output Side  
The op-amp used in the external post-amplifier circuit  
should be of sufficiently high precision so that it does not  
contribute a significant amount of offset or offset drift  
relative to the contribution from the isolation amplifier.  
ꢁenerally, op-amps with bipolar input stages exhibit  
better offset performance than op-amps with JFET or  
MOSFET input stages.  
Note: Please refer to Avago Technologies Application Note 1078 for  
additional information on using Isolation Amplifiers.  
Sense Resistor Connections  
The recommended method for connecting the ACPL-782T  
to the current sensing resistor is shown in Figure 18. V  
IN+  
(pin 2 of the APCL-782T) is connected to the positive  
terminal of the sense resistor, while VIN- (pin 3) is shorted  
to ꢁND1 (pin 4), with the power-supply return path func-  
tioning as the sense line to the negative terminal of the  
current sense resistor. This allows a single pair of wires  
or PC board traces to connect the ACPL-782T circuit to  
the sense resistor. By referencing the input circuit to  
the negative side of the sense resistor, any load current  
induced noise transients on the resistor are seen as a  
common-mode signal and will not interfere with the cur-  
rent-sense signal. This is important because the large load  
currents flowing through the motor drive, along with the  
parasitic inductances inherent in the wiring of the circuit,  
can generate both noise spikes and offsets that are rela-  
tively large compared to the small voltages that are being  
measured across the current sensing resistor.  
In addition, the op-amp should also have enough  
bandwidth and slew rate so that it does not adversely  
affect the response speed of the overall circuit. The post-  
amplifier circuit includes a pair of capacitors (C5 and C6)  
that form a single-pole low-pass filter; these capacitors  
allow the bandwidth of the post-amp to be adjusted  
independently of the gain and are useful for reducing  
the output noise from the isolation amplifier. Many  
different op-amps could be used in the circuit, including:  
TL032A, TL052A, and TLC277 (Texas Instruments), LF412A  
(National Semiconductor).  
The gain-setting resistors in the post-amp should have a  
tolerance of 1ꢀ or better to ensure adequate CMRR and  
adequate gain tolerance for the overall circuit. Resistor  
networks can be used that have much better ratio  
tolerances than can be achieved using discrete resistors.  
A resistor network also reduces the total number of  
components for the circuit as well as the required board  
space.  
If the same power supply is used both for the gate  
drive circuit and for the current sensing circuit, it is  
very important that the connection from ꢁND1 of the  
ACPL-782T to the sense resistor be the only return path for  
150 pF  
Note for the Voltage Divider:  
V (Lineꢀ x [ Rb / (Ra+Rbꢀ ] <= 200 mV  
Line 1  
+ SUPPLY  
78L05  
10.0 kꢆ  
+5 V  
+15 V  
+5 V  
IN  
OUT  
0.1 F  
ACPL-782T  
0.1 F  
0.1 F  
Ra  
Rb  
8
1
2
0.1 F  
2.0 kꢆ  
8
4
6
5
7
6
5
-
7
0.01  
F  
3
4
39 ꢆ  
+
VOUT  
TL032A  
2.00 kꢆ  
0.1 F  
10.0 kꢆ  
150 pF  
-15 V  
Line 2  
Figure 21. Recommended circuit for voltage sensing application.  
16  
Voltage sensing for DC rail measurement  
Dividing error when 1% resistors are used(%ꢀ  
2
1.5  
1
ACPL-782T is a suitable device to measure the DC rail  
voltage over different potentials. In a DC rail voltage  
sensing application, the Line1 and Line2 in Figure 21 are  
the DC lines to be measured.  
Dividing ratio error due to the tolerances of the resistors  
From a differential calculation, the error in the voltage  
divider of Ra and Rb is expressed as  
0.5  
0
A/A = Ra/(Ra + Rb) * (Rb/Rb – Ra/Ra)  
(1)  
Where A is the ratio of the resistor divider consisting of Ra  
and Rb.  
0.5  
0.6  
0.7  
0.8  
0.9  
1.0  
Ra/(Ra+Rbꢀ  
Since the errors of the resistors, Rb/Rb and Ra/Ra are  
independent to each other, we need to take absolute  
values in equation (1) to know the maximum possible  
gain error of the divider and it gives  
Figure 22: Divider Error % Vs Resistors Divider  
A/A = Ra/(Ra + Rb) * ( |Rb/Rb| + |Ra/Ra|) (2)  
Figure 22 is the plot of the equation (2) when the resistors  
have 1ꢀ tolerance expressing the relationship between  
the ratio of Ra to (Ra+Rb) and the possible maximum error  
of the dividing ratio.  
150 pF  
+ SUPPLY  
78L05  
10.0 kꢆ  
+15 V  
+5 V  
Semitec  
TH  
+5 V  
IN  
OUT  
EC2F103A2-40113  
Thermistor  
0.1 F  
ACPL-782T  
0.1 F  
0.1 F  
0.1 F  
8
1
2
IGBT attaching type  
6
5
2.0 kꢆ  
2.0  
8
7
6
5
-
7
3
4
+
4
39ꢆ  
VOUT  
TL032A  
0.1 F  
R2  
R3  
kꢆ  
R1  
1 F  
RL = R1//(R2+R3ꢀ  
150 pF  
10.0 kꢆ  
-15 V  
Note on the thermistor and the RL:  
x [RL/(Rth + RL)] x [ R3/(R2 + R3)] <= 200 mV, assuming R2+R3 >> R1  
V
dd  
Rth: Resistance of thermistor  
RL: Linearizing resistor value = R1//(R2+R3)  
Figure 23. Recommended circuit for temperature sensing application.  
17  
Isolated Temperature Sensing using Thermistor  
If R2+R3 >> R1, RL ~ R1  
Dividing ratio ~ R3/(R2+R3)  
Thermistor is widely used to measure temperatures in  
most systems application. A galvanic isolation between  
the potential of the Thermistor and that of the analog-  
to-digital is often required when they are mounted in  
locations such as high voltage potential, electrically noisy  
environments, poorly grounded environments, where  
lack of isolation causes either safety or EMI issues.  
As can be seen from the circuit, one might eliminate R1  
and RL~(R2+R3) in this case.  
An application example with a Thermistor designed for  
measuring IꢁBT’s surface temperatures is shown in Figure  
23. Where TH is the thermistor and the RL is a resistor for  
linearization. Suitable RL value is determined from the  
Thermistor characteristic and the temperature range to  
measure. Please note that the RL value is the compound  
value of R1, R2 and R3.  
RL = R1//(R2+R3)=R1(R2+R3)/(R1+R2+R3)  
R2 and R3 divides the voltage across RL so that the voltage  
fed into ACPL-782T does not exceed +200 mV. The high  
impedance characteristic of the input terminals of ACPL-  
782T helps in determining those resistors value since one  
can select relatively high resistance of R2 and R3 and R1  
can be determined easily.  
For product information and a complete list of distributors, please go to our web site: www.avagotech.com  
Avago, Avago Technologies, the A logo and R2Coupler™ are trademarks of Avago Technologies in the United States and other countries.  
Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved.  
AV02-1565EN - March 23, 2011  
配单直通车
ACPL-782T-300E产品参数
型号:ACPL-782T-300E
是否Rohs认证: 符合
生命周期:Active
包装说明:SOP, GWDIP8,.4
Reach Compliance Code:compliant
ECCN代码:EAR99
HTS代码:8541.40.80.00
Factory Lead Time:17 weeks
风险等级:2.24
放大器类型:ISOLATION AMPLIFIER
标称带宽 (3dB):100 MHz
最大共模电压:2.8 V
最小绝缘电压:3750 V
JESD-30 代码:R-PDSO-G8
JESD-609代码:e3
长度:9.8 mm
湿度敏感等级:1
功能数量:1
端子数量:8
最高工作温度:125 °C
最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY
封装代码:SOP
封装等效代码:GWDIP8,.4
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
电源:5 V
认证状态:Not Qualified
筛选级别:AEC-Q100
座面最大高度:4.455 mm
子类别:Isolation Amplifier
最大压摆率:16 mA
供电电压上限:5.5 V
标称供电电压 (Vsup):5 V
表面贴装:YES
温度等级:AUTOMOTIVE
端子面层:Tin (Sn)
端子形式:GULL WING
端子节距:2.54 mm
端子位置:DUAL
最大电压增益:8.16
最小电压增益:7.84
宽度:6.35 mm
Base Number Matches:1
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