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  • AD8042ARZ图
  • 深圳市宏捷佳电子科技有限公司

     该会员已使用本站12年以上
  • AD8042ARZ 现货库存
  • 数量60030 
  • 厂家ADI/亚德诺 
  • 封装SOP-8 
  • 批号2023+ 
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  • 集好芯城

     该会员已使用本站13年以上
  • AD8042ARZ 现货库存
  • 数量18204 
  • 厂家ADI(亚德诺) 
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  • AD8042ARZ图
  • 深圳市恒达亿科技有限公司

     该会员已使用本站16年以上
  • AD8042ARZ 现货库存
  • 数量8000 
  • 厂家ADI 
  • 封装SOIC-8 
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  • 深圳市羿芯诚电子有限公司

     该会员已使用本站7年以上
  • AD8042ARZ 现货库存
  • 数量8500 
  • 厂家ADI(亚德诺)/LINEAR 
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  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • AD8042ARZ 现货库存
  • 数量12500 
  • 厂家ADI/亚德诺 
  • 封装SOIC-8 
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  • 深圳市科庆电子有限公司

     该会员已使用本站16年以上
  • AD8042ARZ-REEL7 现货库存
  • 数量2000 
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  • 封装SMD 
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  • 深圳市富科达科技有限公司

     该会员已使用本站13年以上
  • AD8042ARZ-REEL7 现货库存
  • 数量21688 
  • 厂家ADI 
  • 封装SOP8 
  • 批号22+ 
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  • AD8042ARZ图
  • 深圳市恒达亿科技有限公司

     该会员已使用本站12年以上
  • AD8042ARZ 现货库存
  • 数量4200 
  • 厂家AD 
  • 封装SOP8 
  • 批号23+ 
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  • 深圳市宗天技术开发有限公司

     该会员已使用本站10年以上
  • AD8042ARZ 现货库存
  • 数量8000 
  • 厂家ADI(亚德诺) 
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  • 深圳市励创源科技有限公司

     该会员已使用本站2年以上
  • AD8042ARZ 现货库存
  • 数量35600 
  • 厂家AD 
  • 封装SOP-8 
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  • AD8042ARZ图
  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • AD8042ARZ 现货库存
  • 数量26980 
  • 厂家ADI 
  • 封装SOP8 
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  • AD8042ARZ【特价现货】图
  • 齐创科技(上海北京青岛)有限公司

     该会员已使用本站14年以上
  • AD8042ARZ【特价现货】 现货库存
  • 数量26000 
  • 厂家ADI代理 
  • 封装SOP8 
  • 批号24+热销 
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  • 深圳市勤思达科技有限公司

     该会员已使用本站14年以上
  • AD8042ARZ-REEL7 现货库存
  • 数量6000 
  • 厂家ADI/亚德诺 
  • 封装SOP8 
  • 批号2021+ 
  • ▉十二年专注▉ 100%全新原装正品 正规渠道订货 长期现货供应
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  • 深圳市广百利电子有限公司

     该会员已使用本站6年以上
  • AD8042ARZ 现货库存
  • 数量18500 
  • 厂家ADI(亚德诺) 
  • 封装SOIC-8 
  • 批号23+ 
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  • AD8042ARZ图
  • 深圳市力拓辉电子有限公司

     该会员已使用本站13年以上
  • AD8042ARZ 优势库存
  • 数量90000 
  • 厂家AD 
  • 封装SOP8 
  • 批号15+ 
  • 全新原装正品现货.
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  • 深圳市富科达科技有限公司

     该会员已使用本站13年以上
  • AD8042ARZ-REEL7 热卖库存
  • 数量21688 
  • 厂家ADI 
  • 封装SOP8 
  • 批号22+ 
  • 全新进口原装
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  • 深圳市拓森弘电子有限公司

     该会员已使用本站1年以上
  • AD8042ARZ
  • 数量5300 
  • 厂家ADI(亚德诺) 
  • 封装SOIC-8 
  • 批号21+ 
  • 全新原装正品,现货库存欢迎咨询
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  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • AD8042ARZ
  • 数量85000 
  • 厂家ADI/亚德诺 
  • 封装SOIC-8 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
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  • AD8042ARZ图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • AD8042ARZ
  • 数量36000 
  • 厂家ADI 
  • 封装SOP8 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
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  • 深圳市龙腾新业科技有限公司

     该会员已使用本站17年以上
  • AD8042ARZ
  • 数量15083 
  • 厂家ADI/亚德诺 
  • 封装SOP8 
  • 批号24+ 
  • 原装原厂 现货现卖
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  • AD8042ARZ图
  • 深圳市恒达亿科技有限公司

     该会员已使用本站12年以上
  • AD8042ARZ
  • 数量4200 
  • 厂家AD 
  • 封装SOP8 
  • 批号23+ 
  • 全新原装公司现货销售!
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  • AD8042ARZ图
  • 深圳市能元时代电子有限公司

     该会员已使用本站10年以上
  • AD8042ARZ
  • 数量92000 
  • 厂家ADI/亚德诺 
  • 封装SOP8 
  • 批号24+ 
  • 原装现货假一罚十!可含税长期供货
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  • 深圳市昌和盛利电子有限公司

     该会员已使用本站11年以上
  • AD8042ARZ
  • 数量21098 
  • 厂家【原装正品价格最低】 
  • 封装原厂封装 
  • 批号▊New ▊▊ 
  • ▊▊▊【专注原装正品现货】★价格最低★!量大可定!长期供应!欢迎惠顾!(长期高价回收全新原装正品电子
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  • 深圳市高捷芯城科技有限公司

     该会员已使用本站11年以上
  • AD8042ARZ
  • 数量7862 
  • 厂家ADI(亚德诺) 
  • 封装SOIC-8 
  • 批号23+ 
  • 支持大陆交货,美金交易。原装现货库存。
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  • AD8042ARZ图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站15年以上
  • AD8042ARZ
  • 数量65800 
  • 厂家ADI/亚德诺 
  • 封装SOP-8 
  • 批号24+ 
  • 假一罚十,原装进口正品现货供应,价格优势。
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  • 0755-82865294 QQ:198857245
  • AD8042ARZ图
  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • AD8042ARZ
  • 数量3321 
  • 厂家ADI/亚德诺 
  • 封装NA/ 
  • 批号23+ 
  • 原装现货,当天可交货,原型号开票
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  • 0755-82546830 QQ:3007977934QQ:3007947087
  • AD8042ARZ图
  • 集好芯城

     该会员已使用本站13年以上
  • AD8042ARZ
  • 数量15083 
  • 厂家ADI/亚德诺 
  • 封装SOP8 
  • 批号最新批次 
  • 原装原厂 现货现卖
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  • AD8042ARZ图
  • 深圳市拓亿芯电子有限公司

     该会员已使用本站12年以上
  • AD8042ARZ
  • 数量30000 
  • 厂家ADI/亚德诺 
  • 封装SOP-8 
  • 批号23+ 
  • 只做原装现货假一罚十
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  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • AD8042ARZ-REEL7
  • 数量22648 
  • 厂家ADI(亚德诺) 
  • 封装SOIC-8 
  • 批号23+ 
  • 原厂可订货,技术支持,直接渠道。可签保供合同
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  • 深圳市恒佳微电子有限公司

     该会员已使用本站12年以上
  • AD8042ARZ-REEL7
  • 数量
  • 厂家210106 
  • 封装SOP8 
  • 批号 
  • 正品原装 支持最低价
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  • 绿盛电子(香港)有限公司

     该会员已使用本站12年以上
  • AD8042ARZ
  • 数量2015 
  • 厂家ADI 
  • 封装SOP/DIP 
  • 批号18998 
  • ★一级代理AD原装现货,特价热卖!★
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  • 深圳市恒达亿科技有限公司

     该会员已使用本站16年以上
  • AD8042ARZ
  • 数量3500 
  • 厂家AD 
  • 封装8-SOIC 
  • 批号23+ 
  • 全新原装现货特价销售!
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  • AD8042ARZ图
  • 深圳市羿芯诚电子有限公司

     该会员已使用本站7年以上
  • AD8042ARZ
  • 数量8500 
  • 厂家ADI(亚德诺)/LINEAR 
  • 封装SOIC-8 
  • 批号新年份 
  • 羿芯诚只做原装,原厂渠道,价格优势可谈!
  • QQ:2853992132QQ:2853992132 复制
  • 0755-82570683 QQ:2853992132
  • AD8042ARZ图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • AD8042ARZ
  • 数量12500 
  • 厂家ADI/亚德诺 
  • 封装SOIC-8 
  • 批号2023+ 
  • 绝对原装正品全新深圳进口现货,优质渠道供应商!
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  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • AD8042ARZ
  • 数量12500 
  • 厂家ADI/亚德诺 
  • 封装SOIC-8 
  • 批号2023+ 
  • 绝对原装正品全新深圳进口现货,优质渠道供应商!
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  • 美驻深办0755-83777708“进口原装正品专供” QQ:1002316308QQ:515102657
  • AD8042ARZ-REEL7.图
  • 深圳市集创讯科技有限公司

     该会员已使用本站5年以上
  • AD8042ARZ-REEL7.
  • 数量15000 
  • 厂家专营ADI 
  • 封装 
  • 批号24+ 
  • 原装进口正品现货,假一罚十价格优势
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  • 0755-83244680 QQ:2885393494QQ:2885393495

产品型号AD8042ARZ的概述

AD8042ARZ芯片概述 AD8042ARZ是一款高性能的运算放大器,专为高速应用设计。它由著名的模拟设备公司Analog Devices推出,具有极低的噪声和失真特性,非常适合用于信号处理和精密放大。该芯片能够在高速条件下工作,提供非常优异的频率响应和相位裕度,这使得AD8042ARZ在许多高频和宽带信号处理应用中扮演着重要角色。 AD8042ARZ具有低功耗和宽电源电压范围的特点,尤其在需要高带宽和较高增益的应用中表现出色。此外,该芯片的失真度极低,使其在音频和其他对信号质量要求很高的领域变得尤为重要。 详细参数 AD8042ARZ的主要技术参数如下: - 工作电源电压:±2V 至 ±15V,支持单电源和双电源配置。 - 带宽:在增益为1时,增益带宽积可达到80MHz,适合高频信号处理。 - 增益:通常增益值可设计,从1倍到高达100倍以上,灵活适应不同的放大需求。 - 输入偏置...

产品型号AD8042ARZ的Datasheet PDF文件预览

Dual 160 MHz  
Rail-to-Rail Amplifier  
AD8042  
FEATURES  
CONNECTION DIAGRAM  
8-Lead Plastic DIP and SOIC  
Single AD8041 and Quad AD8044 also Available  
Fully Specified at +3 V, +5 V, and ؎5 V Supplies  
Output Swings to Within 30 mV of Either Rail  
Input Voltage Range Extends 200 mV Below Ground  
No Phase Reversal with Inputs 0.5 V Beyond Supplies  
Low Power of 5.2 mA per Amplifier  
High Speed and Fast Settling on 5 V:  
160 MHz –3 dB Bandwidth (G = +1)  
200 V/s Slew Rate  
+V  
1
2
3
4
8
7
6
5
OUT1  
–IN1  
+IN1  
S
OUT2  
–IN2  
+IN2  
–V  
S
AD8042  
39 ns Settling Time to 0.1%  
Good Video Specifications (RL = 150 , G = +2)  
Gain Flatness of 0.1 dB to 14 MHz  
0.02% Differential Gain Error  
0.04؇ Differential Phase Error  
Low Distortion  
The output voltage swing extends to within 30 mV of each rail,  
providing the maximum output dynamic range. Additionally, it  
features gain flatness of 0.1 dB to 14 MHz while offering differ-  
ential gain and phase error of 0.04% and 0.06on a single 5 V  
supply. This makes the AD8042 useful for professional video  
electronics such as cameras, video switchers, or any high speed  
portable equipment. The AD8042’s low distortion and fast  
settling make it ideal for buffering single supply, high speed  
A/D converters.  
–64 dBc Worst Harmonic @ 10 MHz  
Drives 50 mA 0.5 V from Supply Rails  
APPLICATIONS  
Video Switchers  
Distribution Amplifiers  
A/D Driver  
The AD8042 offers low power supply current of 12 mA max  
and can run on a single 3.3 V power supply. These features are  
ideally suited for portable and battery-powered applications  
where size and power are critical.  
Professional Cameras  
CCD Imaging Systems  
Ultrasound Equipment (Multichannel)  
The wide bandwidth of 160 MHz along with 200 V/ms of slew rate  
on a single 5 V supply make the AD8042 useful in many general-  
purpose, high speed applications where single supplies from  
3.3 V to 12 V and dual power supplies of up to ±6 V are needed.  
The AD8042 is available in 8-lead plastic DIP and SOIC.  
PRODUCT DESCRIPTION  
The AD8042 is a low power voltage feedback, high speed am-  
plifier designed to operate on +3 V, +5 V, or ±5 V supplies. It  
has true single supply capability with an input voltage range  
extending 200 mV below the negative rail and within 1 V of the  
positive rail.  
15  
VS = 5V  
12  
G = +1  
CL = 5pF  
9
RL = 2kTO 2.5V  
G = 1  
6
3
R
= 2kTO +2.5V  
L
5V  
0
2.5V  
0V  
–3  
–6  
–9  
–12  
–15  
1V  
1s  
1
10  
100  
500  
FREQUENCY (MHz)  
Figure 1. Output Swing: Gain = –1, VS = +5 V  
REV. C  
Figure 2. Frequency Response  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  
(@T = 25؇C, V = 5 V, R = 2 kto 2.5 V, unless otherwise noted.)  
AD8042–SPECIFICATIONS  
A
S
L
AD8042  
Typ  
Parameter  
Conditions  
Min  
Max Unit  
DYNAMIC PERFORMANCE  
–3 dB Small Signal Bandwidth, VO < 0.5 V p-p G = +1  
125  
130  
160  
14  
200  
30  
26  
39  
MHz  
MHz  
V/ms  
MHz  
ns  
Bandwidth for 0.1 dB Flatness  
Slew Rate  
G = +2, RL = 150 W, RF = 200 W  
G = –1, VO = 2 V Step  
Full Power Response  
Settling Time to 1%  
Settling Time to 0.1%  
VO = 2 V p-p  
G = –1, VO = 2 V Step  
ns  
NOISE/DISTORTION PERFORMANCE  
Total Harmonic Distortion  
Input Voltage Noise  
Input Current Noise  
Differential Gain Error (NTSC, 100 IRE)  
fC = 5 MHz, VO = 2 V p-p, G = +2, RL = 1 kW  
f = 10 kHz  
f = 10 kHz  
G = +2, RL = 150 W to 2.5 V  
G = +2, RL = 75 W to 2.5 V  
G = +2, RL = 150 W to 2.5 V  
G = +2, RL = 75 W to 2.5 V  
f = 5 MHz, RL = 150 W to 2.5 V  
–73  
15  
dB  
nV/÷Hz  
fA/÷Hz  
%
%
Degrees  
Degrees  
dB  
700  
0.04  
0.04  
0.06  
0.24  
–63  
0.06  
0.12  
Differential Phase Error (NTSC, 100 IRE)  
Worst-Case Crosstalk  
DC PERFORMANCE  
Input Offset Voltage  
3
9
12  
mV  
mV  
mV/C  
mA  
TMIN to TMAX  
Offset Drift  
Input Bias Current  
12  
1.2  
3.2  
4.8  
0.5  
TMIN to TMAX  
mA  
Input Offset Current  
Open-Loop Gain  
0.2  
100  
90  
mA  
dB  
dB  
RL = 1 kW  
TMIN to TMAX  
90  
68  
INPUT CHARACTERISTICS  
Input Resistance  
Input Capacitance  
Input Common-Mode Voltage Range  
Common-Mode Rejection Ratio  
300  
1.5  
–0.2 to +4  
74  
kW  
pF  
V
VCM = 0 V to 3.5 V  
dB  
OUTPUT CHARACTERISTICS  
Output Voltage Swing  
Output Voltage Swing:  
Output Voltage Swing:  
Output Current  
RL = 10 kW to 2.5 V  
RL = 1 kW to 2.5 V  
RL = 50 W to 2.5 V  
TMIN to TMAX, VOUT = 0.5 V to 4.5 V  
Sourcing  
0.03 to 4.97  
0.10 to 4.9 0.05 to 4.95  
0.4 to 4.4 0.36 to 4.45  
V
V
V
mA  
mA  
mA  
pF  
50  
90  
100  
20  
Short-Circuit Current  
Sinking  
G = +1  
Capacitive Load Drive  
POWER SUPPLY  
Operating Range  
3
12  
V
Quiescent Current (Per Amplifier)  
Power Supply Rejection Ratio  
5.5  
80  
6.4  
mA  
dB  
VS– = 0 V to –1 V, or VS+ = +5 V to +6 V  
72  
OPERATING TEMPERATURE RANGE  
Specifications subject to change without notice.  
–40  
+85  
C  
–2–  
REV. C  
AD8042  
(@T = 25؇C, V = 5 V, R = 2 kto 1.5 V, unless otherwise noted.)  
SPECIFICATIONS  
A
S
L
AD8042  
Typ  
Parameter  
Conditions  
Min  
Max Unit  
DYNAMIC PERFORMANCE  
–3 dB Small Signal Bandwidth, VO < 0.5 V p-p G = +1  
120  
120  
140  
11  
170  
25  
30  
45  
MHz  
MHz  
V/ms  
MHz  
ns  
Bandwidth for 0.1 dB Flatness  
Slew Rate  
Full Power Response  
Settling Time to 1%  
Settling Time to 0.1%  
G = +2, RL = 150 W, RF = 200 W  
G = –1, VO = 2 V Step  
O = 2 V p-p  
V
G = –1, VO = 1 V Step  
ns  
NOISE/DISTORTION PERFORMANCE  
Total Harmonic Distortion  
Input Voltage Noise  
Input Current Noise  
Differential Gain Error (NTSC, 100 IRE)  
fC = 5 MHz, VO = 2 V p-p, G = –1, RL = 100 W  
f = 10 kHz  
f = 10 kHz  
G = +2, RL = 150 W to 1.5 V, Input VCM = 1 V  
RL = 75 W to 1.5 V, Input VCM = 1 V  
G = +2, RL = 150 W to 1.5 V, Input VCM = 1 V  
RL = 75 W to 1.5 V, Input VCM = 1 V  
f = 5 MHz, RL = 1 kW to 1.5 V  
–56  
16  
dB  
nV/÷Hz  
fA/÷Hz  
%
500  
0.10  
0.10  
0.12  
0.27  
–68  
%
Differential Phase Error (NTSC, 100 IRE)  
Worst-Case Crosstalk  
Degrees  
Degrees  
dB  
DC PERFORMANCE  
Input Offset Voltage  
3
9
12  
mV  
mV  
mV/C  
mA  
TMIN to TMAX  
Offset Drift  
Input Bias Current  
12  
1.2  
3.2  
4.8  
0.6  
TMIN to TMAX  
mA  
Input Offset Current  
Open-Loop Gain  
0.2  
100  
90  
mA  
dB  
dB  
RL = 1 kW  
TMIN to TMAX  
90  
66  
INPUT CHARACTERISTICS  
Input Resistance  
Input Capacitance  
Input Common-Mode Voltage Range  
Common-Mode Rejection Ratio  
300  
1.5  
–0.2 to +2  
74  
kW  
pF  
V
VCM = 0 V to 1.5 V  
dB  
OUTPUT CHARACTERISTICS  
Output Voltage Swing  
Output Voltage Swing:  
Output Voltage Swing:  
Output Current  
RL = 10 kW to 1.5 V  
RL = 1 kW to 1.5 V  
RL = 50 W to 1.5 V  
TMIN to TMAX, VOUT = 0.5 V to 2.5 V  
Sourcing  
0.03 to 2.97  
0.1 to 2.9 0.05 to 2.95  
0.3 to 2.6 0.25 to 2.65  
V
V
V
mA  
mA  
mA  
pF  
50  
50  
70  
17  
Short-Circuit Current  
Sinking  
G = +1  
Capacitive Load Drive  
POWER SUPPLY  
Operating Range  
3
12  
V
Quiescent Current (Per Amplifier)  
Power Supply Rejection Ratio  
5.5  
80  
6.4  
mA  
dB  
VS– = 0 V to –1 V, or VS+ = +3 V to +4 V  
68  
0
OPERATING TEMPERATURE RANGE  
Specifications subject to change without notice.  
70  
C  
REV. C  
–3–  
AD8042  
(@T = 25؇C, V = ؎5 V, R = 2 kto 0 V, unless otherwise noted.)  
SPECIFICATIONS  
A
S
L
AD8042  
Typ  
Parameter  
Conditions  
Min  
Max Unit  
DYNAMIC PERFORMANCE  
–3 dB Small Signal Bandwidth, VO < 0.5 V p-p G = +1  
125  
145  
170  
18  
225  
35  
22  
32  
MHz  
MHz  
V/ms  
MHz  
ns  
Bandwidth for 0.1 dB Flatness  
Slew Rate  
Full Power Response  
Settling Time to 1%  
Settling Time to 0.1%  
G = +2, RL = 150 W, RF = 200 W  
G = –1, VO = 2 V Step  
VO = 2 V p-p  
G = –1, VO = 2 V Step  
ns  
NOISE/DISTORTION PERFORMANCE  
Total Harmonic Distortion  
Input Voltage Noise  
Input Current Noise  
Differential Gain Error (NTSC, 100 IRE)  
fC = 5 MHz, VO = 2 V p-p, G = +2, RL = 1 kW  
f = 10 kHz  
f = 10 kHz  
G = +2, RL = 150 W  
G = +2, RL = 75 W  
G = +2, RL = 150 W  
G = +2, RL = 75 W  
f = 5 MHz, RL = 150 W  
–78  
15  
dB  
nV/÷Hz  
fA/÷Hz  
%
%
Degrees  
Degrees  
dB  
700  
0.02  
0.02  
0.04  
0.12  
–63  
0.05  
0.10  
Differential Phase Error (NTSC, 100 IRE)  
Worst-Case Crosstalk  
DC PERFORMANCE  
Input Offset Voltage  
3
9.8  
14  
mV  
mV  
mV/C  
mA  
TMIN to TMAX  
Offset Drift  
Input Bias Current  
12  
1.2  
3.2  
4.8  
0.6  
TMIN to TMAX  
mA  
Input Offset Current  
Open-Loop Gain  
0.2  
94  
86  
mA  
dB  
dB  
RL = 1 kW  
TMIN to TMAX  
90  
66  
INPUT CHARACTERISTICS  
Input Resistance  
Input Capacitance  
Input Common-Mode Voltage Range  
Common-Mode Rejection Ratio  
300  
1.5  
–5.2 to +4  
74  
kW  
pF  
V
VCM = –5 V to +3.5 V  
dB  
OUTPUT CHARACTERISTICS  
Output Voltage Swing  
Output Voltage Swing  
Output Voltage Swing  
Output Current  
RL = 10 kW  
–4.97 to +4.97  
–4.8 to +4.8 –4.9 to +4.9  
–4 to +3.2 –4.2 to +3.5  
V
V
V
mA  
mA  
mA  
pF  
RL = 1 kW  
RL = 50 W  
TMIN to TMAX, VOUT = –4.5 V to +4.5 V  
Sourcing  
Sinking  
G = +1  
50  
Short-Circuit Current  
100  
100  
25  
Capacitive Load Drive  
POWER SUPPLY  
Operating Range  
Quiescent Current (Per Amplifier)  
Power Supply Rejection Ratio  
3
12  
7
V
mA  
dB  
6
80  
VS– = –5 V to –6 V, or VS+ = +5 V to +6 V  
68  
OPERATING TEMPERATURE RANGE  
Specifications subject to change without notice.  
–40  
+85  
C  
–4–  
REV. C  
AD8042  
ABSOLUTE MAXIMUM RATINGS1  
While the AD8042 is internally short-circuit protected, this may  
not be sufficient to guarantee that the maximum junction  
temperature (150C) is not exceeded under all conditions. To  
ensure proper operation, it is necessary to observe the maximum  
power derating curves.  
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6 V  
Internal Power Dissipation2  
Plastic DIP Package (N) . . . . . . . . . . . . . . . . . . . . . . 1.3 W  
Small Outline Package (R) . . . . . . . . . . . . . . . . . . . . . 0.9 W  
Input Voltage (Common Mode) . . . . . . . . . . . . . ±VS ± 0.5 V  
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . ±3.4 V  
Output Short-Circuit Duration  
2.0  
8-LEAD PLASTIC-DIP PACKAGE  
T
= 150؇C  
J
Observe Power Derating Curves  
Storage Temperature Range (N, R) . . . . . . . –65C to +125C  
Lead Temperature Range (Soldering 10 sec) . . . . . . . . . 300C  
1.5  
NOTES  
1.0  
0.5  
0
1 Stresses above those listed under Absolute Maximum Ratings may cause perma-  
nent damage to the device. This is a stress rating only; functional operation of the  
device at these or any other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute maximum rating  
conditions for extended periods may affect device reliability.  
2 Specification is for the device in free air:  
8-LEAD SOIC PACKAGE  
8-Lead Plastic DIP Package: qJA = 90C/W  
8-Lead SOIC Package: qJA = 155C/W  
–50 –40 –30 –20 –10  
0
10 20 30 40 50 60 70 80 90  
C)  
AMBIENT TEMPERATURE (  
؇
MAXIMUM POWER DISSIPATION  
Figure 3. Maximum Power Dissipation vs. Temperature  
The maximum power that can be safely dissipated by the AD8042  
is limited by the associated rise in junction temperature. The  
maximum safe junction temperature for plastic encapsulated  
devices is determined by the glass transition temperature of the  
plastic—approximately 150C. Exceeding this limit temporarily  
may cause a shift in parametric performance due to a change in  
the stresses exerted on the die by the package.  
Exceeding a junction temperature of 175C for an extended  
period can result in device failure.  
ORDERING GUIDE  
Temperature  
Range  
Package  
Description  
Package  
Option  
Model  
AD8042AN  
AD8042AR  
–40C to +85C  
–40C to +85C  
–40C to +85C  
–40C to +85C  
–40C to +85C  
–40C to +85C  
–40C to +85C  
8-Lead DIP  
8-Lead SOIC  
N-8  
SO-8  
SO-8  
SO-8  
SO-8  
SO-8  
SO-8  
AD8042AR-REEL  
AD8042AR-REEL7  
AD8042ARZ*  
AD8042ARZ-REEL*  
AD8042ARZ-REEL7*  
AD8042ACHIPS  
8-Lead SOIC 13" REEL  
8-Lead SOIC 7" REEL  
8-Lead SOIC  
8-Lead SOIC 13" REEL  
8-Lead SOIC 7" REEL  
DIE  
*Z = Pb-free part  
CAUTION  
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4,000 V readily  
accumulate on the human body and test equipment and can discharge without detection. Although the  
AD8042 features proprietary ESD protection circuitry, permanent damage may occur on devices  
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended  
to avoid performance degradation or loss of functionality.  
REV. C  
–5–  
AD8042–Typical Performance Characteristics  
100  
100  
95  
V
= 5V  
S
90  
80  
T = 25؇C  
140 PARTS, SIDE A & B  
MEAN = –1.52mV  
STD DEVIATION = 1.15  
SAMPLE SIZE = 280  
(140 AD8042S)  
70  
60  
90  
85  
80  
75  
70  
50  
40  
30  
20  
10  
0
V
= 5V  
S
T = 25؇C  
–6 –5 –4 –3 –2 –1  
V
0
(mV)  
1
2
3
4
5
6
0
250  
500  
750  
1000 1250  
1500 1750  
2000  
LOAD RESISTANCE ()  
OS  
TPC 1. Typical Distribution of VOS  
TPC 4. Open-Loop Gain vs. RL to 2.5 V  
30  
25  
20  
100  
V
= 5V  
S
98  
MEAN = –12.6V/؇C  
STD DEV = 2.02V/؇C  
SAMPLE SIZE = 60  
V
R
= 5V  
= 1k⍀  
S
L
96  
94  
15  
10  
5
92  
90  
88  
86  
0
–18 –16 –14 –12 –10  
–8  
–6  
–4  
–2  
0
–40  
–20  
0
20  
40  
60  
80  
V
DRIFT(V/؇C)  
OS  
TEMPERATURE (؇C)  
TPC 2. VOS Drift Over –40C to +85C  
TPC 5. Open-Loop Gain vs. Temperature  
0
100  
90  
V
V
= 5V  
S
V = 5V  
S
–0.2  
R
= 500TO 2.5V  
= 50TO 2.5V  
= 0V  
L
CM  
–0.4  
–0.6  
80  
–0.8  
–1  
R
L
70  
60  
50  
40  
–1.2  
–1.4  
–1.6  
–1.8  
–2  
–40 –30 –20 –10  
0
10 20 30 40 50 60 70 80 90  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
OUTPUT VOLTAGE (V)  
TEMPERATURE(؇C)  
TPC 6. Open-Loop Gain vs. Output Voltage  
TPC 3. IB vs. Temperature  
–6–  
REV. C  
AD8042  
0.04  
0.03  
NTSC Subcarrier (3.579 MHz)  
V
= 5V  
S
G = +2  
= 150TO 2.5V  
300  
100  
30  
10  
3
R
L
0.02  
0.01  
0.00  
V
= ؎5V  
S
G = +2  
R
= 150⍀  
L
–0.01  
0.05  
V
= 5V  
S
0.04  
0.03  
0.02  
0.01  
G = +2  
= 150TO 2.5V  
R
L
V
= ؎5V  
S
1
G = +2  
R
= 150⍀  
L
0
–0.01  
10  
100  
1M  
FREQUENCY (Hz)  
10M 100M  
1G  
1k  
10k  
100k  
20  
0
10  
30  
40  
50  
60  
70  
80  
90 100  
MODULATING RAMP LEVEL (IRE)  
TPC 7. Input Voltage Noise vs. Frequency  
TPC 10. Differential Gain and Phase Errors  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
–30  
–40  
–50  
–60  
V
= 5V  
S
V
R
= 3V, A = –1,  
V
= 100TO 1.5V  
S
G = +2  
R
R
= 200⍀  
= 150TO 2.5V  
L
F
L
V
R
= 5V, A = 2,  
V
= 100TO 2.5V  
S
L
V
R
= 5V, A = 1,  
V
= 100TO 2.5V  
S
L
–70  
–80  
–90  
0
14MHz  
–0.1  
V
R
= 5V, A = 2,  
= 1kTO 2.5V  
S
V
L
–0.2  
–0.3  
–0.4  
V
R
= 5V, A = 1,  
V
= 1kTO 2.5V  
S
L
–100  
1
2
3
4
5
6
7
8
9 10  
1
10  
FREQUENCY (MHz)  
100  
500  
FUNDAMENTAL FREQUENCY (MHz)  
TPC 8. Total Harmonic Distortion  
TPC 11. 0.1 dB Gain Flatness  
–30  
–40  
120  
100  
80  
V
= 5V  
S
G = +2  
R
R
= 200  
= 150TO 2.5V  
F
10MHz  
–50  
L
GAIN  
60  
45  
–60  
40  
0
5MHz  
–70  
20  
–45  
–90  
–135  
–180  
0
–80  
PHASE  
1MHz  
–20  
–90  
–40  
–60  
–80  
V
R
= 5V, G = +2,  
= 1kTO 2.5V  
S
–100  
–110  
L
–225  
–270  
0.0  
0.5 1.0  
1.5  
2.0  
2.5  
3.0  
3.5 4.0  
4.5 5.0  
100  
0.01  
0.1  
1
10  
500  
FREQUENCY (MHz)  
OUTPUT VOLTAGE (V p-p)  
TPC 9. Worst Harmonic vs. Output Voltage  
TPC 12. Open-Loop Gain and Phase  
vs. Frequency  
REV. C  
–7–  
AD8042  
10  
60  
G = –1  
V
= 3V, 0.1%  
V
= 5V  
S
S
8
R
C
= 2kTO MIDPOINT  
= 5pF  
55  
50  
45  
40  
35  
30  
G = +1  
C
R
L
L
= 5pF  
= 2kTO 2.5V  
L
6
T = +85؇C  
T = +25؇C  
L
4
2
V
= 3V, 1%  
S
T = –40؇C  
0
V
V
= +5V, 0.1%  
S
–2  
–4  
= ؎5V, 0.1%  
S
–6  
–8  
V
V
= +5V, 1%  
S
25  
20  
= ؎5V, 1%  
S
–10  
1
10  
FREQUENCY (MHz)  
100  
500  
0.5  
1
1.5  
2
BIPOLAR INPUT STEP (V)  
TPC 16. Settling Time  
TPC 13. Closed-Loop Frequency Response  
vs. Temperature  
12  
10  
8
V
s
= 5V  
V
R
= 3V  
S
TEST CIRCUIT:  
G = +1  
1.02k⍀  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
AND C TO 1.5V  
L
C
= 5pF  
L
L
L
1.02k⍀  
R
= 2k⍀  
OUT  
V
= 5V  
AND C TO 2.5V  
L
IN  
CM  
S
R
L
6
1.02k⍀  
1.02k⍀  
V
= ؎5V  
S
4
2
0
–2  
–4  
–6  
–8  
1
10  
FREQUENCY (MHz)  
100  
500  
10k  
1M  
10M  
100M  
500M  
100k  
FREQUENCY (Hz)  
TPC 17. CMRR vs. Frequency  
TPC 14. Closed-Loop Frequency Response vs. Supply  
0.80  
0.70  
0.60  
0.50  
0.40  
0.30  
0.20  
V
= +5V  
S
100  
+5V – V (+125؇C)  
OH  
R
= 50⍀  
BT  
+5V – V (+25؇C)  
OH  
V
= 5V  
S
10  
1
+5V – V (–55؇C)  
G = +1  
OH  
R
= 0  
BT  
R
BT  
V
OUT  
0.1  
+V (+125؇C)  
OL  
+V (+25؇C)  
OL  
0.10  
0
0.01  
+V (–55؇C)  
OL  
0
5
10  
15  
20  
25  
30  
35  
40  
45  
50  
100  
0.01  
0.1  
1
10  
500  
LOAD CURRENT (mA)  
FREQUENCY (MHz)  
TPC 18. Output Saturation Voltage vs. Load Current  
TPC 15. Output Resistance vs. Frequency  
–8–  
REV. C  
AD8042  
50  
40  
30  
20  
10  
0
12.0  
11.5  
11.0  
10.5  
10.0  
9.5  
V
V
= ؎5V  
S
V
= +5V  
S
V
= 100mV STEP  
OUT  
G = +2  
= +5V  
= +3V  
S
V
S
G = +3  
9.0  
8.5  
8.0  
–40 –30 –20 –10  
0
10 20 30 40 50 60 70 80 90  
0
20  
40  
60  
80 100 120  
140 160 180 200  
TEMPERATURE (؇C)  
LOAD CAPACITANCE (pF)  
TPC 19. Supply Current vs. Temperature  
TPC 22. % Overshoot vs. Load Capacitance  
6
V
= +5V  
S
V
= +5V  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
5
4
S
R
R
= 2k⍀  
= 2kTO +2.5V  
F
L
3
G = +2  
2
1
0
–PSRR  
G = +2  
= 200⍀  
R
F
–1  
–2  
–3  
–4  
+PSRR  
G = +10  
G = +5  
1
10  
FREQUENCY (MHz)  
100  
500  
10k  
100k  
1M  
10M  
100M  
500M  
FREQUENCY (Hz)  
TPC 20. PSRR vs. Frequency  
TPC 23. Frequency Response vs. Closed-Loop Gain  
–10  
10  
9
8
7
6
5
4
3
2
1
0
V
V
= +5V  
S
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–110  
= 0.6V p-p  
IN  
V
R
= ؎5V  
= 2k⍀  
S
G = +2  
L
R
= 1k⍀  
F
G = –1  
V
V
1
2
OUT  
, R = 1kTO +2.5V  
L
OUT  
V
V
1
OUT  
, R = 150TO +2.5V  
L
2
OUT  
V
V
2
1
OUT  
, R = 150TO +2.5V  
L
OUT  
V
V
2
1
OUT  
, R = 1kTO +2.5V  
L
OUT  
0.1  
1
10  
100 200  
0.1  
1.0  
10.0  
100.0  
FREQUENCY (MHz)  
FREQUENCY (MHz)  
TPC 21. Output Voltage Swing vs. Frequency  
TPC 24. Crosstalk (Output-to-Output) vs. Frequency  
REV. C  
–9–  
AD8042  
5V  
4V  
3V  
2V  
1V  
0V  
4.770V  
A
V
= +1  
V
V
= +5V  
S
+2.6V  
= +5V  
G = –1  
= 150TO +2.5V  
S
R
V
= 100mV p-p  
= 1kTO 2.5V  
= 5pF  
L
IN  
R
C
L
L
+2.5V  
+2.4V  
0.160V  
25mV  
10ns  
200s  
0.5V  
TPC 27. 100 mV Pulse Response, VS = +5 V  
TPC 25a. Output Swing with Load Reference to  
Supply Midpoint  
5V  
G = –1  
R
= 2kTO +1.5V  
L
V = +5V  
S
4V  
3V  
2V  
1V  
0V  
4.59V  
3V  
1.5V  
0V  
G = –1  
R = 150TO GND  
L
0.035V  
0.5V  
1s  
0.5V  
200s  
TPC 28. Rail-to-Rail Output Swing, VS = +3 V  
TPC 25b. Output Swing with Load Reference to  
Negative to Supply  
4.5V  
V
= 100mV p-p  
= 1kTO 1.5V  
= +3V  
A
V
= +2  
= +5V  
= 5pF  
= 1kTO +2.5V  
IN  
V
+1.6V  
R
S
L
C
L
V
S
R
L
3.5V  
2.5V  
C
= 5pF  
L
V
= 1V p-p  
IN  
A
= +1V  
V
+1.5V  
+1.4V  
1.5V  
0.5V  
25mV  
10ns  
0.5V  
10ns  
TPC 29. 100 mV Pulse Response, VS = +3 V  
TPC 26. One Volt Pulse Response, VS = +5 V  
–10–  
REV. C  
AD8042  
OVERDRIVE RECOVERY  
Biasing of Q8 and Q36 is accomplished by I8 and I5, along with  
a common-mode feedback loop (not shown). This circuit topol-  
ogy allows the AD8042 to drive 40 mA of output current with  
the outputs within 0.5 V of the supply rails.  
Overdrive of an amplifier occurs when the output and/or input  
range are exceeded. The amplifier must recover from this over-  
drive condition. As shown in Figure 4, the AD8042 recovers  
within 30 ns from negative overdrive and within 25 ns from  
positive overdrive.  
On the input side, the device can handle voltages from 0.2 V  
below the negative rail to within 1.2 V of the positive rail.  
Exceeding these values will not cause phase reversal; however,  
the input ESD devices will begin to conduct if the input volt-  
ages exceed the rails by greater than 0.5 V.  
+5V  
DRIVING CAPACITIVE LOADS  
The capacitive load drive of the AD8042 can be increased by  
adding a low valued resistor in series with the load. Figure 6  
shows the effects of a series resistor on capacitive drive for vary-  
ing voltage gains. As the closed-loop gain is increased, the larger  
phase margin allows for larger capacitive loads with less over-  
shoot. Adding a series resistor with lower closed-loop gains  
accomplishes this same effect. For large capacitive loads, the  
frequency response of the amplifier will be dominated by the  
roll-off of the series resistor and capacitive load.  
+2.5V  
V
V
= +5V  
S
0V  
= +5V p-p  
IN  
G = +2  
= 1k  
R
TO +2.5V  
L
50ns  
1V  
Figure 4. Overdrive Recovery  
1000  
V
= 5V  
S
CIRCUIT DESCRIPTION  
200mV STEP WITH 30% OVERSHOOT  
The AD8042 is fabricated on Analog Devices’ proprietary  
eXtra-Fast Complementary Bipolar (XFCB) process which  
enables the construction of PNP and NPN transistors with  
similar fTs in the 2 GHz to 4 GHz region. The process is dielec-  
trically isolated to eliminate the parasitic and latch-up problems  
caused by junction isolation. These features allow the construc-  
tion of high frequency, low distortion amplifiers with low supply  
currents. This design uses a differential output input stage to  
maximize bandwidth and headroom (see Figure 5). The smaller  
signal swings required on the first stage outputs (nodes S1P,  
S1N) reduce the effect of nonlinear currents due to junction  
capacitances and improve the distortion performance. With this  
design harmonic distortion of better than –77 dB @ 1 MHz into  
100 W with VOUT = 2 V p-p (Gain = +2) on a single 5 V supply  
is achieved.  
R
= 5⍀  
S
R
S
C
L
R
= 0  
S
100  
R
= 20⍀  
S
10  
1
2
3
4
5
CLOSED-LOOP GAIN (V/V)  
Figure 6. Capacitive Load Drive vs. Closed-Loop Gain  
Single-Supply Composite Video Line Driver  
The two op amps of an AD8042 can be configured as a single-  
supply dual line driver for composite video. The wide signal  
swing of the AD8042 enables this function to be performed  
without using any type of clamping or dc restore circuit which  
can cause signal distortion.  
V
CC  
I1  
I10  
I2  
I 3  
I9  
Q50  
Q39  
Q25  
Q51  
R26  
Q4  
R39  
Q5  
Q36  
I5  
Q23  
V
Q40  
EE  
R15 R2  
Q22  
R27  
R23  
Q21  
V
EE  
Figure 7 shows a schematic for a circuit that is driven by a  
single composite video source that is ac coupled, level shifted  
and applied to both + inputs of the two amplifiers. Each op amp  
provides a separate 75 W composite video output. To obtain  
single-supply operation, ac coupling is used throughout. The  
large capacitor values are required to ensure that there is minimal  
tilting of the video signals due to their low frequency (30 Hz)  
signal content. The circuit shown was measured to have a differ-  
ential gain of 0.06% and a differential phase of 0.06.  
C3  
C9  
Q31  
Q7  
Q17  
V
P
Q13  
V
IN  
OUT  
Q27  
V
N
IN  
SIN  
SIP  
Q2  
Q11  
R3  
Q8  
I8  
Q3  
Q24  
I7  
Q47  
V
CC  
C7  
R5  
R21  
V
EE  
Figure 5. AD8042 Simplified Schematic  
The AD8042’s rail-to-rail output range is provided by a  
complementary common-emitter output stage. High output drive  
capability is provided by injecting all output stage predriver cur-  
rents directly into the bases of the output devices Q8 and Q36.  
The input is terminated in 75 W and ac coupled via CIN to a  
voltage divider that provides the dc bias point to the input.  
Setting the optimal bias point requires some understanding of  
the nature of composite video signals and the video performance  
of the AD8042.  
REV. C  
–11–  
AD8042  
+5V  
To test this, the differential gain and differential phase were  
measured for the AD8042 while the supplies were varied. As the  
lower supply is raised to approach the video signal, the first  
effect to be observed is that the sync tips become compressed  
before the differential gain and differential phase are adversely  
affected. Thus, there must be adequate swing in the negative  
direction to pass the sync tips without compression.  
4.99k  
10F  
10F  
0.1µF  
1000F  
75⍀  
COAX  
4.99k⍀  
3
8
1
V
COMPOSITE  
VIDEO  
IN  
2
OUT  
R
T
75⍀  
R
R
L
F
75⍀  
1k⍀  
0.1F  
75⍀  
R
1k⍀  
G
10k⍀  
As the upper supply is lowered to approach the video, the differ-  
ential gain and differential phase were not significantly adversely  
affected until the difference between the peak video output and  
the supply reached 0.6 V. Thus, the highest video level should  
be kept at least 0.6 V below the positive supply rail.  
220F  
5
6
1000F  
0.1F  
7
V
OUT  
R
T
75⍀  
R
L
4
75⍀  
Taking the above into account, it was found that the optimal  
point to bias the noninverting input is at 2.2 V dc. Operating at  
this point, the worst-case differential gain is measured at 0.06%  
and the worst-case differential phase is 0.06.  
R
R
G
F
1k⍀  
1k⍀  
220F  
The ac-coupling capacitors used in the circuit at first glance  
appear quite large. A composite video signal has a lower fre-  
quency band edge of 30 Hz. The resistances at the various ac  
coupling points—especially at the output—are quite small. In  
order to minimize phase shifts and baseline tilt, the large value  
capacitors are required. For video system performance that is  
not to be of the highest quality, the value of these capacitors can  
be reduced by a factor of up to five with only a slightly observ-  
able change in the picture quality.  
Figure 7. Single-Supply Composite Video Line  
Driver Using AD8042  
Signals of bounded peak-to-peak amplitude that vary in duty  
cycle require larger dynamic swing capability than their peak-to-  
peak amplitude after ac coupling. As a worst case, the dynamic  
signal swing required will approach twice the peak-to-peak value.  
The two bounding cases are for a duty cycle that is mostly low,  
but occasionally goes high at a fraction of a percent duty cycle  
and vice versa.  
Single-Ended-to-Differential Driver  
Composite video is not quite this demanding. One bounding  
extreme is for a signal that is mostly black for an entire frame,  
but has a white (full intensity), minimum width spike at least  
once per frame.  
Using a cross-coupled single-ended-to-differential converter, the  
AD8042 makes a good general purpose differential line driver.  
This can be used for applications such as driving category 5 twisted  
pair wire which is becoming common for data communications  
in buildings. Figure 8 shows a configuration for a circuit that  
performs this function that can be used for video transmission  
over a differential pair or various data communication purposes.  
The other extreme is for a video signal that is full white every-  
where. The blanking intervals and sync tips of such a signal will  
have negative going excursions in compliance with composite  
video specifications. The combination of horizontal and vertical  
blanking intervals limit such a signal to being at its highest level  
(white) for only about 75% of the time.  
+5V  
10F  
0.1F  
As a result of the duty cycle variations between the two ex-  
tremes presented above, a 1 V p-p composite video signal that is  
multiplied by a gain of two requires about 3.2 V p-p of dynamic  
voltage swing at the output for an op amp to pass a composite  
video signal of arbitrary duty cycle without distortion.  
R
IN  
R
F
1k⍀  
1k⍀  
3
2
8
V
IN  
60.4⍀  
1
AMP1  
49.9⍀  
R
A
1k⍀  
50m  
R
1k⍀  
Some circuits use a sync tip clamp along with ac coupling to  
hold the sync tips at a relatively constant level in order to lower  
the amount of dynamic signal swing required. However, these  
circuits can have artifacts like sync tip compression unless they  
are driven by sources with very low output impedance.  
B
R
B
V
121⍀  
OUT  
AD8042  
1k⍀  
R
A
1k⍀  
6
5
60.4⍀  
10F  
7
AMP2  
4
The AD8042 not only has ample signal swing capability to  
handle the dynamic range required without using a sync tip  
clamp, but also has good video specifications like differential  
gain and differential phase when buffering these signals in an  
ac-coupled configuration.  
100⍀  
0.1F  
–5V  
Figure 8. Single-Ended-to-Differential Twisted  
Pair Line Driver  
–12–  
REV. C  
AD8042  
+5V  
Each of the AD8042’s op amps is configured as a unity gain  
follower by the feedback resistors (RA). Each op amp output  
also drives the other as a unity gain inverter via the two RBS,  
creating a totally symmetrical circuit.  
+5V  
0.1F  
1k⍀  
0.1F  
1k⍀  
3
2
8
V
If the + input to Amp 2 is grounded and a small positive signal  
is applied to the + input of Amp 1, the output of Amp 1 will be  
driven to saturation in the positive direction and the input of  
Amp 2 driven to saturation in the negative direction. This is  
similar to the way a conventional op amp behaves without any  
feedback.  
IN  
1
+5V  
+5V  
0.1F  
+5V  
0.1F  
0.1F  
1k⍀  
1k⍀  
26  
AV  
15  
AV  
28  
DV  
1k⍀  
1k⍀  
AD8042  
DD  
DD  
DD  
14  
13  
+5V  
OTR  
BIT1  
V
A
B
IN  
6
5
If a resistor (RF) is connected from the output of Amp 2 to the  
+ input of Amp 1, negative feedback is provided which closes  
the loop. An input resistor (RI) will make the circuit look like a  
conventional inverting op amp configuration with differential  
outputs.  
7
12  
2.49k⍀  
V
BIT2  
BIT3  
IN  
11  
10  
4
2.49k⍀  
0.1F  
CAPT  
CAPB  
BIT4  
9
0.1F  
BIT5  
BIT6  
AD9220  
10/16  
8
7
0.1F  
18  
17  
22  
BIT7  
The gain of this circuit from input to either output will be ±RF/  
RI. Or the single-ended-to-differential gain will be 2 ¥ RF/RI.  
This gives the circuit the advantage of being able to adjust its  
gain by changing a single resistor.  
0.1F  
6
5
V
REF  
BIT8  
BIT9  
SENSE  
4
BIT10  
BIT11  
CML  
3
2
0.1F  
1
BIT12  
CLOCK  
The cable has a characteristic impedance of about 120 W. Each  
driver output is back terminated with a pair of 60.4 W resistors  
to make the source look like 120 W. The receive end is termi-  
nated with 121 W, and the signal is measured differentially with  
a pair of scope probes. One channel on the oscilloscope is  
inverted and then the signals are added.  
CLK  
REFCOM  
19  
DV  
AV  
AV  
SS SS  
SS  
25  
27  
16  
Figure 10. AD8042 Differential Driver for  
the AD9220 12-Bit, 10-MSPS A/D Converter  
The scope photo in Figure 9 shows a 10 MHz, 2 V p-p input signal  
driving the circuit with 50 m of category 5 twisted pair wire.  
The circuit was tested with a 1 MHz input signal and clocked at  
10 MHz. An FFT response of the digital output is shown in  
Figure 11.  
Pin 5 is biased at 2.5 V by the voltage divider and bypassed. This  
biases each output at 2.5 V. VIN is ac coupled such that VIN going  
positive makes VINA go positive and VINB go in the negative  
direction. The opposite happens for a negative going VIN.  
50ns  
200mV  
1V  
100  
90  
V
IN  
1
V
OUT  
10  
0%  
200mV  
3
7
2
8
6
4
9
5
Figure 9. Differential Driver Frequency Response  
Single-Supply Differential A/D Driver  
The single-ended-to-differential converter circuit is also useful  
as a differential driver for video speed, single-ended, differential  
input A/D converters. Figure 10 is a schematic that shows such  
a circuit differentially driving an AD9220, a 12-bit, 10-MSPS  
A/D converter.  
HARMONICS (dBc)  
2nd –88.34 6th –99.47  
3rd –86.74 7th –91.16  
4th –99.26 8th –97.25  
5th –90.67 9th –91.61  
FUND FRQ 1000977 THD –82.00  
SNR 71.13  
SMPL FRQ 10000000  
SINAD 70.79  
SFDR –86.74  
Figure 11. FFT of AD9220 Output When Driven by AD8042  
REV. C  
–13–  
AD8042  
HDSL Line Driver  
LAYOUT CONSIDERATIONS  
HDSL or high-bit-rate digital subscriber line is becoming popu-  
lar as a means to provide data communication at DS1 rates  
(1.544 MBPS) over moderate distances via conventional tele-  
phone twisted pair wires. In these systems, the transceiver at the  
customer’s end is sometimes powered via the twisted pair from  
a power source at the central office. It is sometimes required to  
raise the dc voltage of the power source to compensate for IR  
drops in long lines or lines with narrow gauge wires.  
The specified high speed performance of the AD8042 requires  
careful attention to board layout and component selection.  
Proper RF design techniques and low-pass parasitic component  
selection are necessary.  
The PCB should have a ground plane covering all unused  
portions of the component side of the board to provide a low  
impedance path. The ground plane should be removed from the  
area near the input pins to reduce the stray capacitance.  
Because of this, it is highly desirable to keep the power consump-  
tion of the customer’s transceiver as low as possible. One means  
to realize significant power savings is to run the transceiver from  
a ±5 V supply instead of the more conventional ±12 V.  
Chip capacitors should be used for the supply bypassing. One  
end should be connected to the ground plane and the other  
within 1/8 inch of each power pin. An additional large  
(0.47 mF–10 mF) tantalum electrolytic capacitor should be  
connected in parallel, but not necessarily so close, to supply  
current for fast, large signal changes at the output.  
The high output swing and current drive capability of the  
AD8042 make it ideally suited to this application. Figure 12  
shows a circuit for the analog portion of an HDSL transceiver  
using the AD8042 as the line driver.  
The feedback resistor should be located close to the inverting  
input pin in order to keep the stray capacitance at this node to a  
minimum. Capacitance variations of less than 1 pF at the  
inverting input will significantly affect high speed performance.  
2k⍀  
3k⍀  
ATT  
2718AF  
93DJ39  
6
5
Stripline design techniques should be used for long signal traces  
(greater than about one inch). These should be designed with a  
characteristic impedance of 50 W or 75 W and be properly termi-  
nated at each end.  
7
V
232⍀  
OUT  
V
IN  
1/2  
AD8042  
1
4
2k⍀  
3k⍀  
10  
5
2
3
1
1/2  
2
9
7
6
0.001F  
AD8042  
912⍀  
0.0027F  
34⍀  
2k⍀  
2k⍀  
2
3
249⍀  
1
V
2k⍀  
REC  
1/4  
AD8044  
2k⍀  
2k⍀  
0.001F  
Figure 12. HDSL Line Driver  
–14–  
REV. C  
AD8042  
OUTLINE DIMENSIONS  
8-Lead Plastic Dual In-Line Package [PDIP]  
(N-8)  
Dimensions shown in inches and (millimeters)  
0.375 (9.53)  
0.365 (9.27)  
0.355 (9.02)  
8
1
5
0.295 (7.49)  
0.285 (7.24)  
0.275 (6.98)  
4
0.325 (8.26)  
0.310 (7.87)  
0.300 (7.62)  
0.100 (2.54)  
BSC  
0.150 (3.81)  
0.135 (3.43)  
0.120 (3.05)  
0.015  
(0.38)  
MIN  
0.180  
(4.57)  
MAX  
0.015 (0.38)  
0.010 (0.25)  
0.008 (0.20)  
0.150 (3.81)  
0.130 (3.30)  
0.110 (2.79)  
0.022 (0.56)  
0.018 (0.46)  
0.014 (0.36)  
SEATING  
PLANE  
0.060 (1.52)  
0.050 (1.27)  
0.045 (1.14)  
COMPLIANT TO JEDEC STANDARDS MO-095AA  
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN  
8-Lead Standard Small Outline Package [SOIC]  
(R-8)  
Dimensions shown in millimeters and (inches)  
5.00 (0.1968)  
4.80 (0.1890)  
8
1
5
4
6.20 (0.2440)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
0.50 (0.0196)  
0.25 (0.0099)  
1.27 (0.0500)  
BSC  
؋
 45؇  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
8؇  
0.51 (0.0201)  
0.31 (0.0122)  
0؇ 1.27 (0.0500)  
COPLANARITY  
0.10  
0.25 (0.0098)  
0.17 (0.0067)  
SEATING  
PLANE  
0.40 (0.0157)  
COMPLIANT TO JEDEC STANDARDS MS-012AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN  
Revision History  
Location  
Page  
8/04—Data Sheet changed from REV. B to REV. C.  
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Changes to OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
7/02—Data Sheet changed from REV. A to REV. B.  
Changes to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2  
REV. C  
–15–  
–16–  
配单直通车
AD8042ARZ产品参数
型号:AD8042ARZ
Brand Name:Analog Devices Inc
是否无铅: 含铅
是否Rohs认证: 符合
生命周期:Active
零件包装代码:SOIC
包装说明:SOIC-8
针数:8
制造商包装代码:R-8
Reach Compliance Code:compliant
ECCN代码:EAR99
HTS代码:8542.31.00.01
风险等级:1.65
放大器类型:OPERATIONAL AMPLIFIER
最大平均偏置电流 (IIB):4.8 µA
标称共模抑制比:74 dB
最大输入失调电压:12000 µV
JESD-30 代码:R-PDSO-G8
JESD-609代码:e3
长度:4.9 mm
湿度敏感等级:1
功能数量:2
端子数量:8
最高工作温度:85 °C
最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY
封装代码:SOP
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260
认证状态:Not Qualified
座面最大高度:1.75 mm
标称压摆率:200 V/us
子类别:Operational Amplifier
供电电压上限:12.6 V
标称供电电压 (Vsup):5 V
表面贴装:YES
技术:BIPOLAR
温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)
端子形式:GULL WING
端子节距:1.27 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:30
宽度:3.9 mm
Base Number Matches:1
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