AD8092ARMZ原理图各脚功能电路原理芯片引脚定义引脚图及功能-中国IC网-芯三七

Low Cost, High Speed

Rail-to-Rail Amplifiers

AD8091/AD8092

FEATURES

CONNECTION DIAGRAMS

Low cost single (AD8091), dual (AD8092) amplifiers

Fully specified at +3 V, +5 V, and 5 V supplies

Single-supply operation

Output swings to within 25 mV of either rail

High-speed and fast settling on 5 V

110 MHz, −3 dB bandwidth (G = +1)

145 V/µs slew rate

NC

–IN

+IN

1

2

3

4

8

7

6

5

NC

AD8091

+V

S

V

OUT

–V

S

NC

NC = NO CONNECT

Figure 1. SOIC-8 (R-8)

AD8091

50 ns settling time to 0.1%

V

1

2

3

5

+V

S

OUT

Good video specifications (G = +2)

Gain flatness of 0.1 dB to 20 MHz; R_L= 150 Ω

0.03% differential gain error; R_L= 1 kΩ

0.03° differential phase error; R_L= 1 kΩ

Low distortion

−80 dBc total harmonic @ 1 MHz; R_L= 100 Ω

Outstanding load drive capability

Drives 45 mA, 0.5 V from supply rails

Drives 50 pF capacitive load (G = +1)

Low power of 4.4 mA/Amplifier

–V

S

+IN

4

–IN

Figure 2. SOT23-5 (RT-5)

AD8092

OUT1

–IN1

+IN1

1

2

3

4

8

7

6

5

+V

S

OUT

–IN2

+IN2

–V

S

NC = NO CONNECT

APPLICATIONS

Figure 3. MSOP-8 and SOIC-8 (RM-8, R-8)

Coaxial cable drivers

Active filters

Video switchers

Professional cameras

CCD imaging systems

CDs/DVDs

GENERAL DESCRIPTION

The AD8091 (single) and AD8092 (dual) are low cost, voltage

feedback, high speed amplifiers designed to operate on +3 V,

+5 V, or ±5 V supplies. They have true single-supply capability,

with an input voltage range extending 200 mV below the

negative rail and within 1 V of the positive rail.

The AD8091/AD8092 offer a low power supply current and can

operate on a single 3 V power supply. These features are ideally

suited for portable and battery-powered applications where size

and power are critical.

The wide bandwidth and fast slew rate make these amplifiers

useful in many general-purpose, high speed applications where

dual power supplies of up to ±± V and single supplies from +3

V to +12 V are needed.

Despite their low cost, the AD8091/AD8092 provide excellent

overall performance and versatility. The output voltage swing

extends to within 25 mV of each rail, providing the maximum

output dynamic range with excellent overdrive recovery. This

makes the AD8091/AD8092 useful for video electronics, such

as cameras, video switchers, or any high speed portable

equipment. Low distortion and fast settling make them ideal for

active filter applications.

This low cost performance is offered in an 8-lead SOIC

(AD8091/AD8092), along with a tiny SOT23-5 (AD8091) and a

MSOP (AD8092).

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

A8091/AD8092

TABLE OF CONTENTS

Specifications..................................................................................... 3

Input-to-Output Coupling........................................................ 13

Driving Capacitive Loads.............................................................. 14

Overdrive Recovery ................................................................... 14

Active Filters ............................................................................... 14

Sync Stripper............................................................................... 15

Single-Supply Composite Video Line Driver ......................... 15

Outline Dimensions....................................................................... 17

Ordering Guide .......................................................................... 18

Absolute Maximum Ratings............................................................ 7

Maximum Power Dissipation ..................................................... 7

ESD Caution.................................................................................. 7

Typical Performance Characteristics ............................................. 9

Layout, Grounding, and Bypassing Considerations .................. 13

Power Supply Bypassing ............................................................ 13

Grounding ................................................................................... 13

Input Capacitance....................................................................... 13

REVISION HISTORY

3/05—Rev. A to Rev. B

Changes to Format .............................................................Universal

Changes to Features.......................................................................... 1

Updated Outline Dimensions....................................................... 17

Changes to Ordering Guide .......................................................... 18

5/02–Rev. 0 to Rev. A

Edits to Product Description ...........................................................1

Edit to TPC ± .....................................................................................7

Edits to TPCs 21–24........................................................................10

Edits to Figure 3...............................................................................11

2/02—Revision 0: Initial Version

Rev. B | Page 2 of 20

AD8091/AD8092

SPECIFICATIONS

T_A= 25°C, V_S= 5 V, R_L= 2 kΩ to 2.5 V, unless otherwise noted.

Table 1.

AD8091A/AD8092A

Parameter

Conditions

Min

Typ

Max

Unit

DYNAMIC PERFORMANCE

−3 dB Small Signal Bandwidth

G = +1, V_O= 0.2 V p-p

G = −1, +2, V_O= 0.2 V p-p

G = +2, V_O= 0.2 V p-p,

70

110

50

20

MHz

Bandwidth for 0.1 dB Flatness

R_L= 150 Ω to 2.5 V, R_F= 806 Ω

Slew Rate

G = −1, V_O= 2 V step

G = +1, V_O= 2 V p-p

G = −1, V_O= 2 V step

100

145

35

50

V/µs

MHz

ns

Full Power Response

Settling Time to 0.1%

NOISE/DISTORTION PERFORMANCE

Total Harmonic Distortion (See Figure 11) f_C= 5 MHz, V_O= 2 V p-p, G = +2

−67

16

dB

Input Voltage Noise

f = 10 kHz

nV/√Hz

fA/√Hz

%

Input Current Noise

f = 10 kHz

850

0.09

0.03

0.19

0.03

−60

Differential Gain Error (NTSC)

G = +2, R_L= 150 Ω to 2.5 V

R_L= 1 kΩ to 2.5 V

G = +2, R_L= 150 Ω to 2.5 V

R_L= 1 kΩ to 2.5 V

f = 5 MHz, G = +2

%

Differential Phase Error (NTSC)

Degrees

dB

Crosstalk

DC PERFORMANCE

Input Offset Voltage

1.7

10

25

mV

µV/°C

µA

T_MINto T_MAX

Offset Drift

Input Bias Current

10

1.4

2.5

T_MINto T_MAX

3.25

0.75

µA

dB

Input Offset Current

Open-Loop Gain

0.1

98

96

82

78

R_L= 2 kΩ to 2.5 V

T_MINto T_MAX

R_L= 150 Ω to 2.5 V

T_MINto T_MAX

86

76

INPUT CHARACTERISTICS

Input Resistance

Input Capacitance

Input Common-Mode Voltage Range

Common-Mode Rejection Ratio

OUTPUT CHARACTERISTICS

Output Voltage Swing

290

1.4

−0.2 to +4

88

kΩ

pF

V

V_CM= 0 V to 3.5 V

72

dB

R_L= 10 kΩ to 2.5 V

R_L= 2 kΩ to 2.5 V

R_L= 150 Ω to 2.5 V

V_OUT= 0.5 V to 4.5 V

T_MINto T_MAX

Sourcing

Sinking

G = +1

0.015 to 4.985

0.025 to 4.975

0.200 to 4.800

45

80

130

50

V

mA

pF

0.100 to 4.900

0.300 to 4.625

Output Current

Short-Circuit Current

Capacitive Load Drive

POWER SUPPLY

Operating Range

3

12

5

V

Quiescent Current/Amplifier

Power Supply Rejection Ratio

OPERATING TEMPERATURE RANGE

4.4

80

mA

dB

°C

∆V_S= 1 V

70

−40

+85

Rev. B | Page 3 of 20

A8091/AD8092

T_A= 25°C, V_S= +3 V, R_L= 2 kΩ to +1.5 V, unless otherwise noted.

Table 2.

AD8091A/AD8092A

Typ

Parameter

Conditions

Min

Max Unit

DYNAMIC PERFORMANCE

−3 dB Small Signal Bandwidth

G = +1, V_O= 0.2 V p-p

G = −1, +2, V_O= 0.2 V p-p

G = +2, V_O= 0.2 V p-p,

70

110

50

17

MHz

Bandwidth for 0.1 dB Flatness

R_L= 150 Ω to 2.5 V, R_F= 402 Ω

Slew Rate

Full Power Response

Settling Time to 0.1%

G = −1, V_O= 2 V step

G = +1, V_O= 1 V p-p

G = −1, V_O= 2 V step

90

135

65

55

V/µs

MHz

ns

NOISE/DISTORTION PERFORMANCE

Total Harmonic Distortion (see Figure 11)

f_C= 5 MHz, V_O= 2 V p-p, G = −1,

R_L= 100 Ω to 1.5 V

−47

dB

Input Voltage Noise

f = 10 kHz

16

nV/√Hz

Input Current Noise

f = 10 kHz

600

fA/√Hz

Differential Gain Error (NTSC)

G = +2, V_CM= 1 V

R_L= 150 Ω to 1.5 V

R_L= 1 kΩ to 1.5 V

G = +2, V_CM= 1 V

R_L= 150 Ω to 1.5 V

R_L= 1 kΩ to 1.5 V

f = 5 MHz, G = +2

0.11

0.09

%

Differential Phase Error (NTSC)

0.24

0.10

−60

Degrees

dB

Crosstalk

DC PERFORMANCE

Input Offset Voltage

1.6

10

25

mV

µV/°C

µA

T_MINto T_MAX

Offset Drift

Input Bias Current

10

1.3

2.6

T_MINto T_MAX

3.25

0.8

µA

dB

Input Offset Current

Open-Loop Gain

0.15

96

94

82

76

R_L= 2 kΩ

80

74

T_MINto T_MAX

R_L= 150 Ω

T_MINto T_MAX

INPUT CHARACTERISTICS

Input Resistance

Input Capacitance

Input Common-Mode Voltage Range

Common-Mode Rejection Ratio

OUTPUT CHARACTERISTICS

Output Voltage Swing

290

1.4

−0.2 to +2.0

88

kΩ

pF

V

V_CM= 0 V to 1.5 V

72

dB

R_L= 10 kΩ to 1.5 V

R_L= 2 kΩ to 1.5 V

R_L= 150 Ω to 1.5 V

V_OUT= 0.5 V to 2.5 V

T_MINto T_MAX

Sourcing

Sinking

G = +1

0.01 to 2.99

0.02 to 2.98

0.125 to 2.875

45

60

90

45

V

mA

pF

0.075 to 2.9

0.20 to 2.75

Output Current

Short Circuit Current

Capacitive Load Drive

Rev. B | Page 4 of 20

AD8091/AD8092

AD8091A/AD8092A

Parameter

Conditions

Min

Typ

Max Unit

POWER SUPPLY

Operating Range

3

12

V

Quiescent Current/Amplifier

Power Supply Rejection Ratio

OPERATING TEMPERATURE RANGE

4.2

80

4.8

mA

dB

°C

∆V_S= +0.5 V

68

−40

+85

Rev. B | Page 5 of 20

A8091/AD8092

T_A= 25°C, V_S= ±5 V, R_L= 2 kΩ to ground, unless otherwise noted.

Table 3.

AD8091A/AD8092A

Typ

Parameter

Conditions

Min

Max

Unit

DYNAMIC PERFORMANCE

−3 dB Small Signal Bandwidth

G = +1, V_O= 0.2 V p-p

G = −1, +2, V_O= 0.2 V p-p

G = +2, V_O= 0.2 V p-p,

R_L= 150 Ω, R_F= 1.1 kΩ

70

110

50

20

MHz

Bandwidth for 0.1 dB Flatness

Slew Rate

Full Power Response

Settling Time to 0.1%

NOISE/DISTORTION PERFORMANCE

Total Harmonic Distortion

Input Voltage Noise

G = −1, V_O= 2 V step

G = +1, V_O= 2 V p-p

G = −1, V_O= 2 V step

105

170

40

50

V/µs

MHz

ns

f_C= 5 MHz, V_O= 2 V p-p, G = +2

f = 10 kHz

G = +2, R_L= 150 Ω

R_L= 1 kΩ

G = +2, R_L= 150 Ω

R_L= 1 kΩ

−71

16

dB

nV/√Hz

fA/√Hz

%

Input Current Noise

Differential Gain Error (NTSC)

900

0.02

0.11

0.02

−60

%

Differential Phase Error (NTSC)

Degrees

dB

Crosstalk

f = 5 MHz, G = +2

DC PERFORMANCE

Input Offset Voltage

1.8

11

27

mV

µV/°C

µA

T_MINto T_MAX

Offset Drift

Input Bias Current

10

1.4

2.6

T_MINto T_MAX

3.5

µA

Input Offset Current

Open-Loop Gain

0.1

96

82

80

0.75

µA

dB

R_L= 2 kΩ

88

78

T_MINto T_MAX

R_L= 150 Ω

T_MINto T_MAX

dB

INPUT CHARACTERISTICS

Input Resistance

Input Capacitance

Input Common-Mode Voltage Range

Common-Mode Rejection Ratio

OUTPUT CHARACTERISTICS

Output Voltage Swing

290

1.4

−5.2 to +4.0

88

kΩ

pF

V

V_CM= −5 V to +3.5 V

72

dB

R_L= 10 kΩ

−4.98 to +4.98

V

R_L= 2 kΩ

R_L= 150 Ω

−4.85 to +4.85

−4.45 to +4.30

−4.97 to +4.97

−4.60 to +4.60

V

Output Current

V_OUT= −4.5 V to +4.5 V

T_MINto T_MAX

Sourcing

Sinking

G = +1 (AD8091/AD8092)

45

100

160

50

mA

pF

Short Circuit Current

Capacitive Load Drive

POWER SUPPLY

Operating Range

3

12

V

Quiescent Current/Amplifier

Power Supply Rejection Ratio

OPERATING TEMPERATURE RANGE

4.8

80

5.5

mA

dB

°C

∆V_S= 1 V

68

−40

+85

Rev. B | Page 6 of 20

AD8091/AD8092

ABSOLUTE MAXIMUM RATINGS

Table 4.

Parameter

The still-air thermal properties of the package (θ_JA), ambient

temperature (T_A), and the total power dissipated in the package

(P_D) can be used to determine the junction temperature of the die.

Rating

Supply Voltage

Power Dissipation

12.6 V

See Figure 4

V_S

The junction temperature can be calculated as

Common-Mode Input Voltage

Differential Input Voltage

Output Short-Circuit Duration

Storage Temperature Range

Operating Temperature Range

Lead Temperature Range (Soldering 10 sec)

2.5 V

T_J=T_A+

(

P_D×θ_JA

)

See Figure 4

−65°C to +125°C

−40°C to +85°C

300°C

The power dissipated in the package (P_D) is the sum of the

quiescent power dissipation and the power dissipated in the

package due to the load drive for all outputs. The quiescent

power is the voltage between the supply pins (V_S) times the

quiescent current (I_S). Assuming the load (R_L) is referenced to

midsupply, then the total drive power is V_S/2 × I_OUT, some of

which is dissipated in the package and some in the load

(V_OUT× I_OUT). The difference between the total drive power and

the load power is the drive power dissipated in the package.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

P_D= quiescent power +

(

total drive power − load power

)

MAXIMUM POWER DISSIPATION

2

V

2

V_OUT

R_L

V

OUT

R_L

⎛

⎞

⎛

⎜

⎞

⎟

S

The maximum safe power dissipation in the AD8091/AD8092

package is limited by the associated rise in junction temperature

(T_J) on the die. The plastic encapsulating the die locally reaches

the junction temperature. At approximately 150°C, which is the

glass transition temperature, the plastic changes its properties.

Even temporarily exceeding this temperature limit may change

the stresses that the package exerts on the die, permanently

shifting the parametric performance of the AD8091/AD8092.

Exceeding a junction temperature of 175°C for an extended

period of time can result in changes in the silicon devices,

potentially causing failure.

P_D=

(

V_S× I_S

)

+

×

− ⎜

⎜

⎟

⎝

⎠

⎝

⎠

RMS output voltages should be considered. If R_Lis referenced to

V_S−, as in single-supply operation, then the total drive power is

V_S× I_OUT

.

If the rms signal levels are indeterminate, then consider the

worst case, when V_OUT= V_S/4 for R_Lto midsupply

2

V

4

R_L

⎛

⎜

⎝

⎞

⎟

⎠

S

P_D=

(

V_S× I_S+

)

In single-supply operation with R_Lreferenced to V_S−, worst case

is V_OUT= V_S/2.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on

the human body and test equipment and can discharge without detection. Although this product features

proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada-

tion or loss of functionality.

Rev. B | Page 7 of 20

A8091/AD8092

2.0

1.5

1.0

0.5

0

Airflow increases heat dissipation, effectively reducing θ_JA. Also,

more metal directly in contact with the package leads from

metal traces, through holes, ground, and power planes reduces

the θ_JA. Care must be taken to minimize parasitic capacitances

at the input leads of high speed op amps as discussed in the

board layout section.

T

= 150°C

J

SOIC-8

MSOP-8

Figure 4 shows the maximum safe power dissipation in the

package vs. the ambient temperature for the SOIC-8

(125°C/W), SOT23-5 (180°C/W), and MSOP-8 (150°C/W) on a

JEDEC standard four-layer board.

SOT23-5

–40 –30 –20 –10

0

10 20 30 40 50 60 70 80 90

AMBIENT TEMPERATURE (°C)

Figure 4. Maximum Power Dissipation vs.

Temperature for a Four-Layer Board

Rev. B | Page 8 of 20

AD8091/AD8092

TYPICAL PERFORMANCE CHARACTERISTICS

3

6.3

6.2

6.1

6.0

5.9

5.8

5.7

5.6

5.5

5.4

5.3

2

G = +2

F

R

= 2kΩ

1

0

G = +5

F

–1

–2

–3

–4

R

= 2kΩ

G = +1

= 0Ω

G = +10

= 2kΩ

R

F

R

F

V

= 5V

V

= 5V

S

–5 GAIN AS SHOWN

G = +2

R

V

AS SHOWN

= 2kΩ

= 0.2V p-p

R

V

= 150kΩ

= 806Ω

= 0.2V p-p

F

L

F

–6

–7

O

0.1

1

10

FREQUENCY (MHz)

100

500

0.1

1

10

FREQUENCY (MHz)

100

Figure 5. Normalized Gain vs. Frequency; V_S= +5 V

Figure 8. 0.1 dB Gain Flatness vs. Frequency; G = +2

3

2

9

8

V

= +3V

V

= +5V

S

1

7

0

6

V

= +5V

= 2V p-p

S

–1

–2

–3

–4

–5

–6

–7

5

O

V

= ±5V

S

V

= ±5V

= 4V p-p

S

4

O

3

2

V

AS SHOWN

S

1

V

AS SHOWN

G = +2

S

G = +1

R

V

R

V

= 2kΩ

AS SHOWN

L

F

0

= 2kΩ

= 0.2V p-p

L

O

–1

0.1

1

10

100

500

0.1

1

10

100

500

FREQUENCY (MHz)

Figure 6. Gain vs. Frequency vs. Supply

Figure 9. Large Signal Frequency Response; G = +2

3

2

70

V

R

= 5V

= 2kΩ

S

L

60

50

–40°C

1

0

40

+85°C

+25°C

GAIN

–1

–2

–3

–4

–5

–6

–7

30

0

20

–45

–90

–135

–180

PHASE

10

V

= 5V

S

G = +1

0

R

V

= 2kΩ

= 0.2V p-p

L

50° PHASE

MARGIN

–10

–20

O

TEMPERATURE AS SHOWN

0.1

1

10

FREQUENCY (MHz)

100

500

0.1

1

10

FREQUENCY (MHz)

100

500

Figure 7. Gain vs. Frequency vs. Temperature

Figure 10. Open-Loop Gain and Phase vs. Frequency

Rev. B | Page 9 of 20

A8091/AD8092

–20

0.10

0.08

0.06

0.04

0.02

0

–0.02

–0.04

–0.06

R

= 150Ω

L

NTSC SUBSCRIBER (3.58MHz)

V

= 2V p-p

O

V

R

= 3V, G = –1

S

–30

–40

= 2kΩ, R = 100Ω

F

L

V

R

= 5V, G = +2

S

= 2kΩ, R = 100Ω

F

L

V

R

= 5V, G = +1

= 100Ω

S

–50

= 1kΩ

L

V

S

= 5, G = +2

L

R

F

= 2kΩ, R AS SHOWN

L

–60

0

10

20

30

40

50

60

70

80

90

100

0.10

0.05

–70

R

= 1kΩ

L

V

R

= 5V, G = +1

= 2kΩ

S

–80

0

L

–0.05

–0.10

–0.15

–0.20

–0.25

V

R

= 5V, G = +2

S

–90

R

= 150Ω

L

= 2kΩ, R = 2kΩ

F

L

–100

–110

V

R

= 5, G = +2

S

= 2kΩ, R AS SHOWN

F

L

0

10

20

30

40

50

60

70

80

90

100

1

2

3

4

5

6

7

8

9 10

FUNDAMENTAL FREQUENCY (MHz)

MODULATING RAMP LEVEL (IRE)

Figure 11. Total Harmonic Distortion

Figure 14. Differential Gain and Phase Errors

–30

–40

1000

100

10

V

= 5V

S

10MHz

–50

–60

–70

–80

5MHz

–90

1MHz

–100

–110

–120

–130

V

R

= 5V

= 2kΩ

S

L

G = +2

1

10

0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

100

1k

10k

100k

1M

10M

OUTPUT VOLTAGE (V p-p)

FREQUENCY (Hz)

Figure 12. Worst Harmonic vs. Output Voltage

Figure 15. Input Voltage Noise vs. Frequency

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

100

10

1

V

= 5V

S

V

= 5V

S

G = –1

R

= 2kΩ

F

L

0.1

10

0.1

1

10

50

100

1k

10k

100k

1M

10M

FREQUENCY (MHz)

FREQUENCY (Hz)

Figure 13. Low Distortion Rail-to-Rail Output Swing

Figure 16. Input Current Noise vs. Frequency

Rev. B | Page 10 of 20

AD8091/AD8092

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

20

10

V

R

V

= 5V

V

= 5V

S

= 2kΩ

= 2V p-p

F

L

O

0

–10

–20

–30

–40

–50

–60

–70

–80

–PSRR

+PSRR

0.1

1

10

100

500

0.01

0.1

1

10

100

500

FREQUENCY (MHz)

Figure 17. AD8092 Crosstalk (Output-to-Output) vs. Frequency

Figure 20. PSRR vs. Frequency

0

70

V

= 5V

V

= 5V

S

G = –1

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

60

50

40

30

20

10

0

R

= 2kΩ

L

0.03

0.1

1

10

100

500

0.5

1.0

1.5

2.0

FREQUENCY (MHz)

INPUT STEPS (V p-p)

Figure 18. CMRR vs. Frequency

Figure 21. Setting Time vs. Input Step

100.000

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

V

= 5V

S

V = 5V

S

V

= +85°C

OH

G = +1

31.000

10.000

3.100

1.000

0.310

0.100

0.031

0.010

V

= +25°C

OH

V

= –40°C

OH

V

= +85°C

OL

V

= +25°C

OL

V

= –40°C

OL

0.1

1

10

100

500

0

5

10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85

LOAD CURRENT (mA)

FREQUENCY (MHz)

Figure 19. Closed-Loop Output Resistance vs. Frequency

Figure 22. Output Saturation Voltage vs. Load Current

Rev. B | Page 11 of 20

A8091/AD8092

100

V

= 5V

S

R

= 2kΩ

L

G = +2

R

= 2kΩ

= 1V p-p

L

V

IN

90

80

70

3.5V

R

= 150Ω

L

2.5V

1.5V

V

= 5V

0.5

S

60

0

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

Figure 26. Large Signal Step Response; V_S= +5 V, G = +2

OUTPUT VOLTAGE (V)

Figure 23. Open-Loop Gain vs. Output Voltage

V

= 5V

S

G = –1

R

= 2kΩ

F

L

V

= 0.1V p-p

IN

G = +1

5V

R

= 2kΩ

L

S

V

= 3V

2.5V

1.50V

1V

2µs

Figure 27. Output Swing; G = −1, R_L= 2 kΩ

20mV

20ns

Figure 24. 100 mV Step Response; G = +1

V

=

±

5V

G = +1

= 2kΩ

S

4V

3V

2V

1V

R

L

V

= 5V

S

G = +1

R

= 2kΩ

L

2.60V

–1V

–2V

–3V

–4V

2.50V

2.40V

1V

20ns

Figure 28. Large Signal Step Response; V_S= 5 V, G = +1

50mV

20ns

Figure 25. 200 mV Step Response; V_S= +5 V, G = +1

Rev. B | Page 12 of 20

AD8091/AD8092

LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS

The length of the high frequency bypass capacitor leads are

most critical. A parasitic inductance in the bypass grounding

works against the low impedance created by the bypass

capacitor. Place the ground leads of the bypass capacitors at the

same physical location. Because load currents flow from the

supplies as well, the ground for the load impedance should be at

the same physical location as the bypass capacitor grounds. For

the larger value capacitors, which are intended to be effective at

lower frequencies, the current return path distance is less

critical.

POWER SUPPLY BYPASSING

Power supply pins are actually inputs and care must be taken so

that a noise-free stable dc voltage is applied. The purpose of

bypass capacitors is to create low impedances from the supply

to ground at all frequencies, thereby shunting or filtering a

majority of the noise.

Decoupling schemes are designed to minimize the bypassing

impedance at all frequencies with a parallel combination of

capacitors. Chip capacitors of 0.01 µF or 0.001 µF (X7R or

NPO) are critical and should be as close as possible to the

amplifier package. Larger chip capacitors, such as the 0.1 µF

capacitor, can be shared among a few closely spaced active

components in the same signal path. A 10 µF tantalum

capacitor is less critical for high frequency bypassing and, in

most cases, only one per board is needed at the supply inputs.

INPUT CAPACITANCE

Along with bypassing and ground, high speed amplifiers can

be sensitive to parasitic capacitance between the inputs and

ground. A few pF of capacitance reduces the input impedance

at high frequencies, in turn increasing the amplifier’s gain,

causing peaking of the frequency response or even oscillations,

if severe enough. It is recommended that the external passive

components, which are connected to the input pins, be placed

as close as possible to the inputs to avoid parasitic capacitance.

The ground and power planes must be kept at a distance of at

least 0.05 mm from the input pins on all layers of the board.

GROUNDING

A ground plane layer is important in densely packed PC boards

to spread the current-minimizing parasitic inductances.

However, an understanding of where the current flows in a

circuit is critical to implementing effective high speed circuit

design. The length of the current path is directly proportional to

the magnitude of parasitic inductances and thus the high

frequency impedance of the path. High speed currents in an

inductive ground return create an unwanted voltage noise.

INPUT-TO-OUTPUT COUPLING

The input and output signal traces should not be parallel to

minimize capacitive coupling between the inputs and output

and to avoid any positive feedback.

Rev. B | Page 13 of 20

A8091/AD8092

DRIVING CAPACITIVE LOADS

10000

1000

100

10

A highly capacitive load reacts with the output of the amplifiers,

causing a loss in phase margin and subsequent peaking or even

oscillation, as shown in Figure 29 and Figure 30. There are two

methods to effectively minimize its effect.

V

= 5V

S

≤30%

OVERSHOOT

R

= 3Ω

S

•

Put a small value resistor in series with the output to isolate

the load capacitor from the amplifier’s output stage.

R

= 0Ω

S

•

Increase the phase margin with higher noise gains or by

adding a pole with a parallel resistor and capacitor from

−IN to the output.

R

F

G

R

S

V

IN

100mV STEP

V

OUT

C

L

50Ω

8

6

1

2

3

4

5

6

4

A

(V/V)

CL

2

Figure 31. Capacitive Load Drive vs. Closed-Loop Gain

0

OVERDRIVE RECOVERY

–2

–4

–6

Overdrive of an amplifier occurs when the output and/or input

range is exceeded. The amplifier must recover from this

overdrive condition. The AD8091/AD8092 recover within ±0 ns

from negative overdrive and within 45 ns from positive

overdrive, as shown in Figure 32.

V

= 5V

S

–8

–10

–12

G = +1

R

C

= 2kΩ

= 50pF

= 200mV p-p

L

V

O

0.1

1

10

100

500

V

=

±

5V

S

FREQUENCY (MHz)

G = +5

R

= 2kΩ

F

L

Figure 29. Closed-Loop Frequency Response: C_L= 50 pF

INPUT 1V/DIV

OUTPUT 2V/DIV

V

= 5V

S

G = +1

R

C

= 2kΩ

= 50pF

L

2.60V

2.55V

2.50V

2.45V

2.40V

V/DIV AS SHOWN

100ns

Figure 32. Overdrive Recovery

50mV

100ns

ACTIVE FILTERS

Active filters at higher frequencies require wider bandwidth op

amps to work effectively. Excessive phase shift produced by

lower frequency op amps can significantly impact active filter

performance.

Figure 30. 200 mV Step Response: C_L= 50 pF

As the closed-loop gain is increased, the larger phase margin

allows for large capacitor loads with less peaking. Adding a low

value resistor in series with the load at lower gains has the same

effect. Figure 31 shows the effect of a series resistor for various

voltage gains. For large capacitive loads, the frequency response

of the amplifier is dominated by the series resistor and

capacitive load.

Figure 33 shows an example of a 2 MHz biquad bandwidth filter

that uses three op amps. Such circuits are sometimes used in

medical ultrasound systems to lower the noise bandwidth of the

analog signal before A/D conversion. Note that the unused

amplifiers’ inputs should be tied to ground.

Rev. B | Page 14 of 20

AD8091/AD8092

VIDEO WITHOUT SYNC

VIDEO WITH SYNC

C1

50pF

R6

1kΩ

R2

2kΩ

R4

2kΩ

C2

R1

3kΩ

50pF

V

BLANK

GROUND

+0.4V

R3

2

3

V

IN

2kΩ

R5

2kΩ

1

6

5

GROUND

7

2

3

3V OR 5V

6

V

OUT

AD8092

+

AD8092

0.1µF

10µF

100Ω

AD8091

Figure 33. 2 MHz Biquad Band-Pass Filter

7

V

3

2

IN

TO A/D

6

AD8091

4

The frequency response of the circuit is shown in Figure 34.

R2

1kΩ

0

R1

1kΩ

+0.8V

(OR 2

–10

–20

–30

–40

×

V

)

BLANK

Figure 35. Sync Stripper

The video signal plus sync is applied to the noninverting input

with the proper termination. The amplifier gain is set equal to 2

via the two 1 kΩ resistors in the feedback circuit. A bias voltage

must be applied to R1 for the input signal to have the sync

pulses stripped at the proper level.

The blanking level of the input video pulse is the desired place

to remove the sync information. The amplifier multiplies this

level by 2. This level must be at ground at the output in order

for the sync stripping action to take place. Because the gain of

the amplifier from the input of R1 to the output is −1, a voltage

equal to 2 × V_BLANKmust be applied to make the blanking level

come out at ground.

10k

100k

1M

10M

100M

FREQUENCY (Hz)

Figure 34. Frequency Response of 2 MHz Band-Pass Biquad Filter

SYNC STRIPPER

Synchronizing pulses are sometimes carried on video signals so

as not to require a separate channel to carry the synchronizing

information. However, for some functions, such as A/D

conversion, it is not desirable to have the sync pulses on the

video signal. These pulses reduce the dynamic range of the

video signal and do not provide any useful information for such

a function.

SINGLE-SUPPLY COMPOSITE VIDEO LINE DRIVER

Many composite video signals have their blanking level at

ground and have video information that is both positive and

negative. Such signals require dual-supply amplifiers to pass

them. However, by ac level-shifting, a single-supply amplifier

can be used to pass these signals. The following complications

may arise from such techniques.

A sync stripper removes the synchronizing pulses from a video

signal while passing all the useful video information. Figure 35

shows a practical single-supply circuit that uses only a single

AD8091. It is capable of directly driving a reverse terminated

video line.

Signals of bounded peak-to-peak amplitude that vary in duty

cycle require larger dynamic swing capacity than their

(bounded) peak-to-peak amplitude after they are ac-coupled.

As a worst case, the dynamic signal swing approaches twice the

peak-to-peak value. One of two conditions that define the

maximum dynamic swing requirements is a signal that is

mostly low but goes high with a duty cycle that is a small

fraction of a percent. The opposite condition defines the second

condition.

The worst case of composite video is not quite this demanding.

One bounding condition is a signal that is mostly black for an

entire frame but has a white (full amplitude) minimum width

spike at least once in a frame.

Rev. B | Page 15 of 20

A8091/AD8092

5V

The other extreme is a full white video signal. The blanking

intervals and sync tips of such a signal have negative-going

excursions in compliance with the composite video

specifications. The combination of horizontal and vertical

blanking intervals limit such a signal to being at the highest

(white) level for a maximum of about 75% of the time.

4.99kΩ

+

4.99kΩ

10µF

+

0.1µF

10µF

47µF

7

COMPOSITE

VIDEO IN

+

R

BT

75Ω

3

1000µF

R

75Ω

+

T

V

10kΩ

6

AD8091

OUT

R

L

2

75Ω

4

0.1µF

R

F

1kΩ

As a result of the duty cycles between the two extremes, a 1 V p-

p composite video signal that is multiplied by a gain of 2

requires about 3.2 V p-p of dynamic voltage swing at the output

for an op amp to pass a composite video signal of arbitrary

varying duty cycle without distortion.

R

1kΩ

G

220µF

Figure 36. Single-Supply Composite Video Line Driver

The feedback circuit provides unity gain for the dc biasing of

Some circuits use a sync tip clamp to hold the sync tips at a

relatively constant level to lower the amount of dynamic signal

swing required. However, these circuits can have artifacts like

sync tip compression unless they are driven by a source with a

very low output impedance. The AD8091/AD8092 have

adequate signal swing when running on a single 5 V supply to

handle an ac-coupled composite video signal.

the input and provides a gain of 2 for any signals that are in the

video bandwidth. The output is ac-coupled and terminated to

drive the line.

The capacitor values were selected for providing minimum tilt

or field time distortion of the video signal. These values would

be required for video that is considered to be studio or

broadcast quality. However, if a lower consumer grade of video,

sometimes referred to as consumer video, is all that is desired,

the values and the cost of the capacitors can be reduced by as

much as a factor of 5 with minimum visible degradation in the

picture.

The input to the circuit in Figure 3± is a standard composite

(1 V p-p) video signal that has the blanking level at ground. The

input network level shifts the video signal by means of ac

coupling. The noninverting input of the op amp is biased to half

of the supply voltage.

Rev. B | Page 16 of 20

AD8091/AD8092

OUTLINE DIMENSIONS

3.00

BSC

5.00 (0.1968)

4.80 (0.1890)

8

1

5

4

8

1

5

4

6.20 (0.2440)

5.80 (0.2284)

4.00 (0.1574)

3.80 (0.1497)

4.90

BSC

3.00

BSC

1.27 (0.0500)

BSC

0.50 (0.0196)

0.25 (0.0099)

PIN 1

× 45°

1.75 (0.0688)

1.35 (0.0532)

0.65 BSC

0.25 (0.0098)

0.10 (0.0040)

1.10 MAX

0.15

0.00

8°

0.51 (0.0201)

0.31 (0.0122)

0° 1.27 (0.0500)

COPLANARITY

0.10

0.25 (0.0098)

0.17 (0.0067)

SEATING

PLANE

0.80

0.60

0.40

0.40 (0.0157)

8°

0°

0.38

0.22

0.23

0.08

COMPLIANT TO JEDEC STANDARDS MS-012-AA

COPLANARITY

0.10

SEATING

PLANE

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 37. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body (R-8)

Figure 38. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters and (inches)

Dimensions shown in millimeters

2.90 BSC

5

4

3

2.80 BSC

1.60 BSC

2

PIN 1

0.95 BSC

1.90

1.30

BSC

1.15

0.90

1.45 MAX

0.22

0.08

10°

5°

0°

0.15 MAX

0.50

0.30

0.60

0.45

0.30

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MO-178AA

Figure 39. 5-Lead Small Outline Transistor Package [SOT-23]

(RT-5)

Dimensions shown in millimeters

Rev. B | Page 17 of 20

A8091/AD8092

ORDERING GUIDE

Model

AD8091AR

AD8091AR-REEL

AD8091AR-REEL7

AD8091ARZ¹

Temperature Range

−40°C to +85°C

Package Description

Package Outline

R-8

Branding Information

8-Lead SOIC

8-Lead SOIC, 13” Tape and Reel

8-Lead SOIC, 7” Tape and Reel

8-Lead SOIC

8-Lead SOIC, 13” Tape and Reel

8-Lead SOIC, 7” Tape and Reel

5-Lead SOT-23

5-Lead SOT-23, 13” Tape and Reel

5-Lead SOT-23, 7” Tape and Reel

5-Lead SOT-23

5-Lead SOT-23, 7” Tape and Reel

5-Lead SOT-23, 13” Tape and Reel

8-Lead SOIC

8-Lead SOIC, 13” Tape and Reel

8-Lead SOIC, 7” Tape and Reel

8-Lead SOIC

8-Lead SOIC, 13” Tape and Reel

8-Lead SOIC, 7” Tape and Reel

8-Lead MSOP

8-Lead MSOP, 13" Tape and Reel

8-Lead MSOP, 7" Tape and Reel

8-Lead MSOP

8-Lead MSOP, 13" Tape and Reel

8-Lead MSOP, 7" Tape and Reel

AD8091ARZ-REEL¹

AD8091ARZ-REEL7¹

AD8091ART-R2

AD8091ART-REEL

AD8091ART-REEL7

AD8091ARTZ-R2¹

AD8091ARTZ-R7¹

AD8091ARTZ-RL¹

AD8092AR

AD8092AR-REEL

AD8092AR-REEL7

AD8092ARZ¹

AD8092ARZ-REEL¹

AD8092ARZ-REEL7¹

AD8092ARM

R-8

RT-5

R-8

HVA

HVA#

R-8

RM-8

HWA

HWA#

AD8092ARM-REEL

AD8092ARM-REEL7

AD8092ARMZ¹

AD8092ARMZ-REEL¹

AD8092ARMZ-REEL7¹

¹Z = Pb-free part. # denotes lead-free, may be top or bottom marked.

Rev. B | Page 18 of 20

AD8091/AD8092

NOTES

Rev. B | Page 19 of 20

A8091/AD8092

NOTES

©

registered trademarks are the property of their respective owners.

C02859–0–3/05(B)

Rev. B | Page 20 of 20

型号:	AD8092ARMZ
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	ROCHESTER ELECTRONICS LLC
零件包装代码：	TSSOP
包装说明：	ROHS COMPLIANT, MO-187AA, MSOP-8
针数：	8
Reach Compliance Code：	unknown
风险等级：	5.29
Is Samacsys：	N
放大器类型：	OPERATIONAL AMPLIFIER
最大平均偏置电流 (IIB)：	3.5 µA
标称共模抑制比：	88 dB
最大输入失调电压：	27000 µV
JESD-30 代码：	S-PDSO-G8
JESD-609代码：	e3
长度：	3 mm
湿度敏感等级：	1
负供电电压上限：	-6.3 V
标称负供电电压 (Vsup)：	-5 V
功能数量：	2
端子数量：	8
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP
封装形状：	SQUARE
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	260
座面最大高度：	1.1 mm
标称压摆率：	170 V/us
子类别：	Operational Amplifier
供电电压上限：	6.3 V
标称供电电压 (Vsup)：	5 V
表面贴装：	YES
温度等级：	INDUSTRIAL
端子面层：	MATTE TIN
端子形式：	GULL WING
端子节距：	0.65 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	40
宽度：	3 mm
Base Number Matches：	1

电子百科

产品导航

产品型号AD8092ARMZ的概述

产品型号AD8092ARMZ的Datasheet PDF文件预览

AD8092ARMZ相关产品..

AD8092ARMZ相关文章

IC37:专业IC行业平台