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ADG419BRZ-REEL7概述 ADG419BRZ-REEL7是一款由Analog Devices公司生产的高性能模拟开关，广泛应用于多种电子电路中，尤其是在需要高精度信号开关的场合。其主要优点包括低导通电阻、低失真和高带宽，适合在医疗设备、工业控制、通信系统和消费电子产品中使用。ADG419BRZ-REEL7的设计使其能够有效地处理模拟信号，同时维持较低的功耗和较大的开关比。 ADG419BRZ-REEL7在国际市场上以其出色的性能赢得了良好的口碑，尤其是在精密测量和控制系统中，由于其高可靠性和长使用寿命，受到工程师和开发人员的青睐。该芯片在兼容性方面表现优异，能够与多种数字控制逻辑电路进行良好的配合工作。 ADG419BRZ-REEL7详细参数 - 工作电源电压：通常为±2.5V至±15V，这保证了它在各种不同的供电环境下均能正常工作。 - 开关电阻：在开启状态下，通道导通电阻...

产品型号ADG419BRZ-REEL7的Datasheet PDF文件预览

LC²MOS Precision

Mini-DIP Analog Switch

ADG419

FUNCTIONAL BLOCK DIAGRAM

FEATURES

44 V supply maximum ratings

V_SSto V_DDanalog signal range

Low on resistance: <35 Ω

Ultralow power dissipation: < 35 μW

Fast transition time: 160 ns maximum

Break-before-make switching action

Plug-in replacement for DG419

ADG419

SWITCH SHOWN FOR A

LOGIC 1 INPUT

Figure 1.

APPLICATIONS

Precision test equipment

Precision instrumentation

Battery-powered systems

Sample hold systems

GENERAL DESCRIPTION

The ADG419 is a monolithic CMOS SPDT switch. This switch

is designed on an enhanced LC²MOS process that provides low

power dissipation yet gives high switching speed, low on resistance,

and low leakage currents.

PRODUCT HIGHLIGHTS

1. Extended Signal Range.

The ADG419 is fabricated on an enhanced LC²MOS

process, giving an increased signal range that extends to

the supply rails.

The on resistance profile of the ADG419 is very flat over the full

analog input range, ensuring excellent linearity and low distortion.

The part also exhibits high switching speed and high signal

bandwidth. CMOS construction ensures ultralow power

dissipation, making the parts ideally suited for portable and

battery-powered instruments.

2. Ultralow Power Dissipation.

3. Low R_ON

4. Single-Supply Operation.

For applications where the analog signal is unipolar, the

ADG419 can be operated from a single rail power supply.

The part is fully specified with a single 12 V power supply

and remains functional with single supplies as low as 5 V.

Each switch of the ADG419 conducts equally well in both

directions when on and has an input signal range that extends

to the supplies. In the off condition, signal levels up to the

supplies are blocked. The ADG419 exhibits break-before-make

switching action.

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

ADG419

TABLE OF CONTENTS

Features .............................................................................................. 1

Absolute Maximum Ratings ............................................................5

ESD Caution...................................................................................5

Pin Configuration and Function Descriptions..............................6

Typical Performance Characteristics ..............................................7

Test Circuits........................................................................................9

Terminology.................................................................................... 11

Outline Dimensions....................................................................... 12

Ordering Guide .......................................................................... 13

Applications....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description......................................................................... 1

Product Highlights ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Dual Supply ................................................................................... 3

Single Supply ................................................................................. 4

REVISION HISTORY

8/09—Rev. B to Rev. C

Updated Format..................................................................Universal

Changes to Table 1............................................................................ 3

Changes to Table 2............................................................................ 4

Updated Outline Dimensions....................................................... 12

Changes to Ordering Guide .......................................................... 13

Rev. B | Page 2 of 16

ADG419

SPECIFICATIONS

DUAL SUPPLY

V_DD= 15 V 10%, V_SS= −15 V 10%, V_L= 5 V 10%, GND = 0 V, unless otherwise noted.

Table 1.

B Version

−40°C to

+25°C +85°C

T Version

−55°C to

+25°C +125°C

−40°C to

+125°C

Parameter¹

ANALOG SWITCH

Analog Signal Range

R_ON

Unit

Test Conditions/Comments

V_SSto V_DD

Ω typ

Ω max

V_D= 12.5 V, I_S= −10 mA

V_DD= +13.5 V, V_SS= −13.5 V

V_DD= +16.5 V, V_SS= −16.5 V

LEAKAGE CURRENTS

Source Off Leakage, I_S(Off)

0.1

nA typ

V_D= 15.5 V, V_S= ∓15.5 V;

see Figure 12

0.25

0.1

0.25

0.1

nA max

nA typ

Drain Off Leakage, I_D(Off)

V_D= 15.5 V, V_S= ∓15.5 V;

see Figure 12

0.ꢀ5

0.4

0.ꢀ5

0.4

0.ꢀ5

nA max

nA typ

nA max

Channel On Leakage, I_D, I_S(On)

V_S= V_D= 15.5 V; see Figure 13

DIGITAL INPUTS

Input High Voltage, V_INH

Input Low Voltage, V_INL

Input Current

2.4

0.8

2.4

0.8

2.4

0.8

V min

V max

I_INLor I_INH

0.005

0.5

0.005

0.5

0.005

0.5

μA typ

μA max

V_IN= V_INLor V_INH

DYNAMIC CHARACTERISTICS²

t_TRANSITION

160

200

145

200

ns max R_L= 300 Ω, C_L= 35 pF; V_S1= 10 V,

V_S2= ∓10 V; see Figure 14

Break-Before-Make Time Delay, t_D30

ns typ

R_L= 300 Ω, C_L= 35 pF;

V_S1= V_S2= 10 V; see Figure 15

ns min

dB typ

pF typ

Off Isolation

Channel-to-Channel Crosstalk

C_S(Off)

ꢀ0

R_L= 50 Ω, f = 1 MHz; see Figure 16

R_L= 50 Ω, f = 1 MHz; see Figure 1ꢀ

f = 1 MHz

C_D, C_S(On)

f = 1 MHz

POWER REQUIREMENTS

I_DD

V_DD= +16.5 V, V_SS= −16.5 V

V_IN= 0 V or 5 V

0.0001

μA typ

μA max

μA typ

μA max

μA typ

μA max

2.5

I_SS

I_L

V_L= 5.5 V

¹Temperature ranges are as follows: B Version: −40°C to +125°C; T Version: −55°C to +125°C.

²Guaranteed by design, not subject to production test.

Rev. B | Page 3 of 16

ADG419

SINGLE SUPPLY

V_DD= 12 V 10%, V_SS= 0 V, V_L= 5 V 10%, GND = 0 V, unless otherwise noted.

Table 2.

B Version

T Version

−40°C to −40°C to

−55°C to

+25°C +125°C

Parameter¹

ANALOG SWITCH

Analog Signal Range

R_ON

+25°C +85°C

+125°C

0 to V_DD

ꢀ0

Unit

Test Conditions/Comments

0 to V_DD

Ω typ

Ω max

V_D= 3 V, 8.5 V, I_S= −10 mA

V_DD= 10.8 V

ꢀ0

LEAKAGE CURRENT

Source OFF Leakage, I_S(Off)

V_DD= 13.2 V

V_D= 12.2 V/1 V, V_S= 1 V/12.2 V;

see Figure 12

0.1

nA typ

0.25

0.1

0.25

0.1

nA max

nA typ

Drain OFF Leakage, I_D(Off)

V_D= 12.2 V/1 V, V_S= 1 V/12.2 V;

see Figure 12

0.ꢀ5

0.4

0.ꢀ5

0.4

0.ꢀ5

nA max

nA typ

nA max

Channel ON Leakage, I_D, I_S(On)

V_S= V_D= 12.2 V/1 V; see Figure 13

DIGITAL INPUTS

Input High Voltage, V_INH

Input Low Voltage, V_INL

Input Current

2.4

0.8

2.4

0.8

2.4

0.8

V min

V max

I_INLor I_INH

0.005

0.5

0.005

0.5

0.005

0.5

μA typ

μA max

V_IN= V_INLor V_INH

DYNAMIC CHARACTERISTICS²

t_TRANSITION

180

250

1ꢀ0

250

ns max R_L= 300 Ω, C_L= 35 pF; V_S1= 0 V/8 V,

V_S2= 8 V/0 V; see Figure 14

Break-Before-Make Time Delay, t_D60

ns typ

R_L= 300 Ω, C_L= 35 pF;

V_S1= V_S2= 8 V; see Figure 15

Off Isolation

Channel-to-Channel Crosstalk

C_S(Off)

ꢀ0

dB typ

pF typ

R_L= 50 Ω, f = 1 MHz; see Figure 16

R_L= 50 Ω, f = 1 MHz; see Figure 1ꢀ

f = 1 MHz

C_D, C_S(On)

f = 1 MHz

POWER REQUIREMENTS

I_DD

V_DD= 13.2 V

V_IN= 0 V or 5 V

0.0001

μA typ

μA max

μA typ

μA max

2.5

I_L

V_L= 5.5 V

¹Temperature ranges are as follows: B Version: −40°C to +125°C; T Version: −55°C to +125°C.

²Guaranteed by design, not subject to production test.

Rev. B | Page 4 of 16

ADG419

ABSOLUTE MAXIMUM RATINGS

T_A= 25°C unless otherwise noted.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

section of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect

device reliability.

Table 3.

Parameter

Rating

V_DDto V_SS

44 V

V_DDto GND

V_SSto GND

V_Lto GND

Analog, Digital Inputs¹

−0.3 V to +25 V

+0.3 V to −25 V

−0.3 V to V_DD+ 0.3 V

V_SS− 2 V to V_DD+ 2 V

or 30 mA, whichever

occurs first

ESD CAUTION

Continuous Current, S or D

30 mA

Peak Current, S or D (Pulsed at 1 ms,

10% Duty-Cycle Maximum)

100 mA

Operating Temperature Range

Industrial (B Version)

Extended (T Version)

Storage Temperature Range

Junction Temperature

−40°C to +125°C

−55°C to +125°C

−65°C to +150°C

150°C

CERDIP Package, Power Dissipation

θ_JA, Thermal Impedance

600 mW

110°C/W

Lead Temperature, Soldering (10 sec)

PDIP Package, Power Dissipation

θ_JA, Thermal Impedance

300°C

400 mW

100°C/W

Lead Temperature, Soldering (10 sec)

SOIC Package, Power Dissipation

θ_JA, Thermal Impedance

260°C

400 mW

155°C/W

MSOP Package, Power Dissipation

θ_JA, Thermal Impedance

315 mW

205°C/W

Lead Temperature, Soldering

Vapor Phase (60 sec)

Infrared (15 sec)

215°C

220°C

¹Overvoltages at IN, S or D is clamped by internal diodes. Limit current to the

maximum ratings given.

Rev. B | Page 5 of 16

ADG419

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADG419

TOP VIEW

(Not to Scale)

GND

Figure 2. Pin Configuration

Table 4. Pin Function Description

Pin No.

Mnemonic

Description

ꢀ

GND

V_DD

V_L

Drain terminal. May be an input or an output.

Source terminal. May be an input or an output.

Ground (0 V) reference.

Most positive power supply potential.

Logic power supply (5 V).

V_SS

Logic control input.

Most negative power supply potential in dual-supply applications. In single-supply applications, it may be

connected to GND.

Source terminal. May be an input or an output.

Table 5. Truth Table

Logic

Switch 1

Off

Switch 2

Off

Rev. B | Page 6 of 16

ADG419

TYPICAL PERFORMANCE CHARACTERISTICS

100

= 25°C

T = 25°C

= +5V

= –5V

= 5V

= 0V

= +10V

= –10V

= 10V

= 0V

= 12V

= 0V

= +12V

= –12V

= +15V

= –15V

= 15V

= 0V

–15

–10

–5

V , V (V)

Figure 3. R_ONas a Function of V_D(V_S), Dual-Supply Voltage

Figure 6. R_ONas a Function of V_D(V_S), Single-Supply Voltage

100

= +15V

= –15V

= +5V

= 12V

= 0V

= 5V

125°C

85°C

–5

85°C

25°C

–15

–10

V , V (V)

S D

Figure 4. R_ONas a Function of V_D(V_S) for Different Temperatures

Figure 7. R_ONas a Function of V_D(V_S) for Different Temperatures

0.02

0.006

(ON)

= +15V

= –15V

= 12V

= 0V

= 25°C

T = 25°C

(ON)

0.01

0.004

0.002

(OFF)

–0.01

–0.02

–0.03

–0.002

–0.004

–15

–10

–5

V , V (V)

Figure 5. Leakage Currents as a Function of V_S(V_D)

Figure 8. Leakage Currents as a Function of V_S(V_D)

Rev. B | Page ꢀ of 16

ADG419

10mA

220

200

180

160

140

= +15V

= –15V

= +5V

1mA

100µA

10µA

1µA

I+, I–

SINGLE SUPPLY

= 0V/+5V

100nA

10nA

120

100

DUAL SUPPLY

= ±5V

1nA

100

10k

100k

10M

FREQUENCY (Hz)

SUPPLY VOLTAGE (V)

Figure 9. Supply Current (I_SUPPLY) vs. Input Switching Frequency

Figure 10. Transition Time (t_TRANSITION) vs. Power Supply Voltage

Rev. B | Page 8 of 16

ADG419

TEST CIRCUITS

(OFF)

(ON)

= V /I

Figure 12. Off Leakage

Figure 11. On Resistance

Figure 13. On Leakage

+15V

+5V

50%

OUT

t_TRANSITION

90%

300Ω

35pF

OUTPUT

GND

90%

–15V

Figure 14. Transition Time, t_TRANSITION

+15V

+5V

OUT

ADDRESS

DRIVE (V

)

300Ω

35pF

t_D

OUT

0.9V

GND

–15V

Figure 15. Break-Before-Make Time Delay, t_D

Rev. B | Page 9 of 16

ADG419

+15V

0.1µF

+5V

0.1µF

+15V

0.1µF

+5V

0.1µF

50Ω

OUT

50Ω

GND

0.1µF

–15V

0.1µF

–15V

CHANNEL-TO-CHANNEL CROSSTALK = 20 × log | V /V

OUT

Figure 17. Crosstalk

Figure 16. Off Isolation

Rev. B | Page 10 of 16

ADG419

TERMINOLOGY

C_S(Off)

Off switch source capacitance.

V_DD

Most positive power supply potential.

C_D, C_S(On)

On switch capacitance.

V_SS

Most negative power supply potential in dual-supply applications.

In single-supply applications, it may be connected to GND.

t_TRANSITION

Delay time between the 50% and 90% points of the digital

inputs and the switch on condition when switching from one

address state to another.

V_L

Logic power supply (5 V).

GND

t_D

Ground (0 V) reference.

Off time or on time measured between the 90% points of both

switches when switching from one address state to the other.

Source terminal. May be an input or an output.

V_INL

Maximum input voltage for Logic 0.

Drain terminal. May be an input or an output.

V_INH

Minimum input voltage for Logic 1.

Logic control input.

_INL(I_INH)

R_ON

Input current of the digital input.

Ohmic resistance between D and S.

Crosstalk

I_S(Off)

A measure of unwanted signal that is coupled through from one

channel to another as a result of parasitic capacitance.

Source leakage current with the switch off.

I_D(Off)

Off Isolation

Drain leakage current with the switch off.

A measure of unwanted signal coupling through an off channel.

I_D, I_S(On)

I_DD

Channel leakage current with the switch on.

Positive supply current.

V_D(V_S)

I_SS

Analog voltage on terminals D, S.

Negative supply current.

Rev. B | Page 11 of 16

ADG419

OUTLINE DIMENSIONS

0.400 (10.16)

0.365 (9.27)

0.355 (9.02)

0.280 (7.11)

0.250 (6.35)

0.240 (6.10)

0.325 (8.26)

0.310 (7.87)

0.300 (7.62)

0.100 (2.54)

BSC

0.060 (1.52)

MAX

0.195 (4.95)

0.130 (3.30)

0.115 (2.92)

0.210 (5.33)

MAX

0.015

(0.38)

MIN

0.150 (3.81)

0.130 (3.30)

0.115 (2.92)

0.015 (0.38)

GAUGE

0.014 (0.36)

0.010 (0.25)

0.008 (0.20)

PLANE

SEATING

PLANE

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

0.430 (10.92)

MAX

0.005 (0.13)

MIN

0.070 (1.78)

0.060 (1.52)

0.045 (1.14)

COMPLIANT TO JEDEC STANDARDS MS-001

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.

Figure 18. 8-Lead Plastic Dual In-Line Package [PDIP]

Narrow Body

(N-8)

Dimensions shown in inches and (millimeters)

0.005 (0.13)

MIN

0.055 (1.40)

MAX

0.310 (7.87)

0.220 (5.59)

0.100 (2.54) BSC

0.405 (10.29) MAX

0.320 (8.13)

0.290 (7.37)

0.060 (1.52)

0.015 (0.38)

0.200 (5.08)

MAX

0.150 (3.81)

MIN

0.200 (5.08)

0.125 (3.18)

0.015 (0.38)

0.008 (0.20)

SEATING

PLANE

0.023 (0.58)

0.014 (0.36)

15°

0°

0.070 (1.78)

0.030 (0.76)

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 19. 8-Lead Ceramic Dual In-Line Package [CERDIP]

(Q-8)

Dimensions shown in inches and (millimeters)

Rev. B | Page 12 of 16

ADG419

3.20

3.00

2.80

5.15

4.90

4.65

3.20

3.00

2.80

PIN 1

0.65 BSC

0.95

0.85

0.75

1.10 MAX

0.80

0.60

0.40

8°

0°

0.15

0.00

0.38

0.22

0.23

0.08

SEATING

PLANE

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-187-AA

Figure 20. 8-Lead Mini Small Outline Package [MSOP]

(RM-8)

Dimensions shown in millimeters

5.00 (0.1968)

4.80 (0.1890)

6.20 (0.2441)

5.80 (0.2284)

4.00 (0.1574)

3.80 (0.1497)

0.50 (0.0196)

0.25 (0.0099)

1.27 (0.0500)

BSC

45°

1.75 (0.0688)

1.35 (0.0532)

0.25 (0.0098)

0.10 (0.0040)

8°

0°

0.51 (0.0201)

0.31 (0.0122)

COPLANARITY

0.10

1.27 (0.0500)

0.40 (0.0157)

0.25 (0.0098)

0.17 (0.0067)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 21. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body (R-8)

Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model

Temperature Range Package Description

Package Option Branding

ADG419BN

−40°C to +125°C

8-Lead Plastic Dual In-Line Package [PDIP]

8-Lead Standard Small Outline Package [SOIC_N]

8-Lead Mini Small Outline Package [MSOP]

8-Lead Ceramic Dual In-Line Package [CERDIP]

N-8

R-8

RM-8

Q-8

ADG419BNZ¹

ADG419BR

ADG419BR-REEL

ADG419BR-REELꢀ

ADG419BRZ¹

ADG419BRZ-REEL¹

ADG419BRZ-REELꢀ¹

ADG419BRM

ADG419BRM-REEL

ADG419BRM-REELꢀ

ADG419BRMZ¹

ADG419BRMZ-REEL¹

SBB

SBB#

ADG419BRMZ-REELꢀ¹−40°C to +125°C

ADG419TQ −55°C to +125°C

¹Z = RoHS Compliant Part, # denotes that RoHS compliant part is top or bottom marked.

Rev. B | Page 13 of 16

ADG419

NOTES

Rev. B | Page 14 of 16

ADG419

NOTES

Rev. B | Page 15 of 16

ADG419

NOTES

registered trademarks are the property of their respective owners.

D07850-0-8/09(B)

Rev. B | Page 16 of 16

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ADG419BRZ-REEL7产品参数

型号:	ADG419BRZ-REEL7
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
零件包装代码：	SOIC
包装说明：	SOP,
针数：	8
Reach Compliance Code：	unknown
风险等级：	5.08
模拟集成电路 - 其他类型：	SPDT
JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3
长度：	4.9 mm
湿度敏感等级：	1
负电源电压最大值（Vsup）：	-16.5 V
负电源电压最小值（Vsup）：	-13.5 V
标称负供电电压 (Vsup)：	-15 V
信道数量：	1
功能数量：	1
端子数量：	8
标称断态隔离度：	80 dB
最大通态电阻 (Ron)：	35 Ω
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260
座面最大高度：	1.75 mm
最大供电电压 (Vsup)：	16.5 V
最小供电电压 (Vsup)：	13.5 V
标称供电电压 (Vsup)：	15 V
表面贴装：	YES
最长断开时间：	160 ns
最长接通时间：	160 ns
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	MATTE TIN
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	40
宽度：	3.9 mm
Base Number Matches：	1

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