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产品型号ADG451BRZ的概述

芯片ADG451BRZ的概述 ADG451BRZ是一种高性能模拟开关，广泛应用于信号路由、数据采集和模拟信号处理等领域。作为Analog Devices公司推出的产品之一，ADG451BRZ以其出色的电气性能和多功能特性在电子设计中备受青睐。该芯片能够在低电压和低功耗状态下高效工作，非常适合便携式设备和低功耗应用。芯片ADG451BRZ的详细参数 ADG451BRZ具备以下主要参数特性： - 工作电压范围：该芯片的供电电压范围为±2V到±15V。它能够在广泛的电源电压下稳定工作，为设计者提供了设计灵活性。 - 开关阻抗：ADG451的开关通道具有极低的开关阻抗，通常在50Ω到70Ω之间。这使得它能够在路由不同信号时保持信号的完整性。 - 低泄漏电流：该芯片在关闭状态下具有极低的泄漏电流，典型值为1nA，这使得它适合于高阻抗电路，保证信号源不会受到影响。 - 带宽：ADG451B...

产品型号ADG451BRZ的Datasheet PDF文件预览

LC MOS

5 ⍀ R SPST Switches

ADG451/ADG452/ADG453

FUNCTIO NAL BLO CK D IAGRAMS

FEATURES

Low On Resistance (4 ⍀)

On Resistance Flatness 0.2 ⍀

44 V Supply Maxim um Ratings

؎15 V Analog Signal Range

Fully Specified @ ؎5 V, +12 V, ؎15 V

Ultralow Pow er Dissipation (18 ␮W)

ESD 2 kV

IN1

IN2

IN3

IN4

IN1

IN2

IN3

IN4

ADG451

ADG452

Continuous Current 100 m A

Fast Sw itching Tim es

t_O70 ns

t_OFF60 ns

TTL/ CMOS Com patible

Pin Com patible Upgrade for ADG411/ ADG412/ ADG413

and ADG431/ ADG432/ ADG433

IN1

APPLICATIONS

IN2

IN3

IN4

Relay Replacem ent

Audio and Video Sw itching

Autom atic Test Equipm ent

Precision Data Acquisition

Battery Pow ered System s

Sam ple Hold System s

Com m unication System s

PBX, PABX System s

Avionics

ADG453

SWITCHES SHOWN FOR A LOGIC "1" INPUT

T he ADG453 exhibits break-before-make switching action for

use in multiplexer applications. Inherent in the design is low charge

injection for minimum transients when switching the digital inputs.

GENERAL D ESCRIP TIO N

T he ADG451, ADG452 and ADG453 are monolithic CMOS

devices comprising four independently selectable switches. T hey

are designed on an enhanced LC²MOS process that provides

low power dissipation yet gives high switching speed and low on

resistance.

P RO D UCT H IGH LIGH TS

1. Low R_ON(5 Ω max)

2. Ultralow Power Dissipation

T he on resistance profile is very flat over the full analog input

range ensuring excellent linearity and low distortion when

switching audio signals. Fast switching speed coupled with high

signal bandwidth also make the parts suitable for video signal

switching. CMOS construction ensures ultralow power dissipa-

tion making the parts ideally suited for portable and battery

powered instruments.

3. Extended Signal Range

T he ADG451, ADG452 and ADG453 are fabricated on an

enhanced LC²MOS process giving an increased signal

range that fully extends to the supply rails.

4. Break-Before-Make Switching

T his prevents channel shorting when the switches are

configured as a multiplexer. (ADG453 only.)

T he ADG451, ADG452 and ADG453 contain four indepen-

dent single-pole/single-throw (SPST ) switches. T he ADG451

and ADG452 differ only in that the digital control logic is in-

verted. T he ADG451 switches are turned on with a logic low on

the appropriate control input, while a logic high is required for

the ADG452. T he ADG453 has two switches with digital con-

trol logic similar to that of the ADG451 while the logic is in-

verted on the other two switches.

5. Single Supply Operation

For applications where the analog signal is unipolar, the

ADG451, ADG452 and ADG453 can be operated from a

single rail power supply. T he parts are fully specified with a

single +12 V power supply and will remain functional with

single supplies as low as +5.0 V.

6. Dual Supply Operation

For applications where the analog signal is bipolar, the

ADG451, ADG452 and ADG453 can be operated from a

dual power supply ranging from ±4.5 V to ±20 V.

Each switch conducts equally well in both directions when ON

and has an input signal range which extends to the supplies. In

the OFF condition, signal levels up to the supplies are blocked.

REV. A

Inform ation furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assum ed by Analog Devices for its

use, nor for any infringem ents of patents or other rights of third parties

which m ay result from its use. No license is granted by im plication or

otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.

Tel: 781/ 329-4700

Fax: 781/ 326-8703

World Wide Web Site: http:/ / w w w .analog.com

ADG451/ADG452/ADG453–SPECIFICATIONS

(V = +15 V, V = –15 V, V = +5 V, GND = 0 V. All specifications T_MINto T_MAXunless otherwise noted.)

Dual Supply

B Version

T_MINto

P aram eter

+25؇C

T_MAX

Units

Test Conditions/Com m ents

ANALOG SWIT CH

Analog Signal Range

V_SSto V_DD

On-Resistance (R_ON

)

4.0

0.1

0.5

0.2

0.5

Ω typ

Ω max

Ω typ

Ω max

Ω typ

Ω max

V_D= –10 V to +10 V, I_S= –10 mA

V_D= ±10 V, I_S= –10 mA

On-Resistance Match Between

Channels (∆R_ON

)

0.5

On-Resistance Flatness (R_{FLAT (ON)}

)

V_D= –5 V, 0 V, +5 V, I_S= –10 mA

LEAKAGE CURRENT S²

Source OFF Leakage I_S(OFF)

±0.02

±0.5

±0.02

±0.5

±0.04

±1

nA typ

nA max

nA typ

nA max

nA typ

nA max

V_D= ±10 V, V_S= ±10 V;

T est Circuit 2

V_D= ±10 V, V_S= ±10 V;

T est Circuit 2

V_D= V_S= ±10 V;

T est Circuit 3

±2.5

±5

Drain OFF Leakage I_D(OFF)

Channel ON Leakage I_D, I_S(ON)

DIGIT AL INPUT S

Input High Voltage, V_INH

Input Low Voltage, V_INL

Input Current

2.4

0.8

V min

V max

I_INLor I_INH

0.005

µA typ

µA max

V_IN= V_INLor V_INH, All Others = 2.4 V

or 0.8 V Respectively

±0.5

DYNAMIC CHARACT ERIST ICS³

t_ON

180

140

ns typ

ns max

ns typ

ns max

ns typ

ns min

R_L= 300 Ω, C_L= 35 pF;

V_S= ±10 V; T est Circuit 4

R_L= 300 Ω, C_L= 35 pF;

V_S= ±10 V; T est Circuit 4

R_L= 300 Ω, C_L= 35 pF;

V_S1= V_S2= +10 V;

T est Circuit 5

220

180

t_OFF

Break-Before-Make T ime Delay, t_D

(ADG453 Only)

Charge Injection

pC typ

pC max

dB typ

V_S= 0 V, R_S= 0 Ω, C_L= 1.0 nF;

T est Circuit 6

R_L= 50 Ω, C_L= 5 pF, f = 1 MHz;

T est Circuit 7

OFF Isolation

Channel-to-Channel Crosstalk

–90

dB typ

R_L= 50 Ω, C_L= 5 pF, f = 1 MHz;

T est Circuit 8

C_S(OFF)

C_D(OFF)

C_D, C_S(ON)

100

pF typ

f = 1 MHz

POWER REQUIREMENT S

V_DD= +16.5 V, V_SS= –16.5 V

Digital Inputs = 0 V or 5 V

I_DD

I_SS

I_L

0.0001

0.5

0.0001

0.5

0.0001

0.5

0.0001

0.5

µA typ

µA max

µA typ

µA max

µA typ

µA max

µA typ

µA max

I_GND

NOT ES

¹T emperature range is as follows: B Version: –40°C to +85°C.

²T _MAX= +70°C^.

³Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

–2–

REV. A

ADG451/ADG452/ADG453

Single Supply _{(V = +12 V, V = 0 V, V = +5 V, GND = 0 V. All specifications T}

_MINto T_MAXunless otherwise noted.)

B Version

_MINto

P aram eter

+25؇C

T_MAX

Units

Test Conditions/Com m ents

ANALOG SWIT CH

Analog Signal Range

0 V to V_DD

On-Resistance (R_ON

)

0.1

0.5

1.0

Ω typ

Ω max

Ω typ

Ω max

Ω typ

V_D= 0 V to 10 V, I_S= –10 mA

V_D= 10 V, I_S= –10 mA

On-Resistance Match Between

Channels (∆R_ON

)

0.5

1.0

On-Resistance Flatness (R_{FLAT (ON)}

)

V_D= 0 V, +5 V, I_S= –10 mA

LEAKAGE CURRENT S^{2, 3}

Source OFF Leakage I_S(OFF)

±0.02

±0.5

±0.02

±0.5

±0.04

±1

nA typ

nA max

nA typ

nA max

nA typ

nA max

V_D= 0 V, 10 V, V_S= 0 V, 10 V;

T est Circuit 2

V_D= 0 V, 10 V, V_S= 0 V, 10 V;

T est Circuit 2

V_D= V_S= 0 V, 10 V;

T est Circuit 3

±2.5

±5

Drain OFF Leakage I_D(OFF)

Channel ON Leakage I_D, I_S(ON)

DIGIT AL INPUT S

Input High Voltage, V_INH

Input Low Voltage, V_INL

Input Current

2.4

0.8

V min

V max

I_INLor I_INH

0.005

µA typ

V_IN= V_INLor V_INH

±0.5

µA max

DYNAMIC CHARACT ERIST ICS⁴

t_ON

100

220

160

ns typ

ns max

ns typ

ns max

ns typ

ns min

R_L= 300 Ω, C_L= 35 pF;

V_S= +8 V; T est Circuit 4

R_L= 300 Ω, C_L= 35 pF;

V_S= +8 V; T est Circuit 4

R_L= 300 Ω, C_L= 35 pF;

V_S1= V_S2= +8 V;

260

200

t_OFF

Break-Before-Make T ime Delay, t_D

(ADG453 Only)

T est Circuit 5

Charge Injection

pC typ

dB typ

V_S= 0 V, R_S= 0 Ω, C_L= 1.0 nF;

T est Circuit 6

R_L= 50 Ω, C_L= 5 pF, f = 1 MHz;

T est Circuit 8

Channel-to-Channel Crosstalk

–90

C_S(OFF)

C_D(OFF)

C_D, C_S(ON)

100

pF typ

f = 1 MHz

POWER REQUIREMENT S

V_DD= +13.2 V

Digital Inputs = 0 V or 5 V

I_DD

I_L

0.0001

0.5

0.0001

0.5

0.0001

0.5

µA typ

µA max

µA typ

µA max

µA typ

µA max

V_L= +5.5 V

I_GND

NOT ES

¹T emperature range is as follows: B Version: –40 °C to +85°C.

²T _MAX= +70°C.

³T ested with dual supplies.

⁴Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

REV. A

–3–

ADG451/ADG452/ADG453–SPECIFICATIONS

(V = +5 V, V = –5 V, V = +5 V, GND = 0 V. All specifications T_MINto T_MAXunless otherwise noted.)

Dual Supply

B Version

T_MINto

P aram eter

+25؇C

T_MAX

Units

Test Conditions/Com m ents

ANALOG SWIT CH

Analog Signal Range

On-Resistance (R_ON

V_SSto V_DD

)

Ω typ

Ω max

Ω typ

Ω max

V_D= –3.5 V to +3.5 V, I_S= –10 mA

V_D= 3.5 V, I_S= –10 mA

0.3

0.5

On-Resistance Match Between

Channels (∆R_ON

)

0.5

LEAKAGE CURRENT S^{2, 3}

Source OFF Leakage I_S(OFF)

±0.02

±0.5

±0.02

±0.5

±0.04

±1

nA typ

nA max

nA typ

nA max

nA typ

nA max

V_D= ±4.5, V_S= ±4.5;

T est Circuit 2

V_D= 0 V, 5 V, V_S= 0 V, 5 V;

T est Circuit 2

V_D= V_S= 0 V, 5 V;

T est Circuit 3

±2.5

±5

Drain OFF Leakage I_D(OFF)

Channel ON Leakage I_D, I_S(ON)

DIGIT AL INPUT S

Input High Voltage, V_INH

Input Low Voltage, V_INL

Input Current

2.4

0.8

V min

V max

I_INLor I_INH

0.005

µA typ

V_IN= V_INLor V_INH

±0.5

µA max

DYNAMIC CHARACT ERIST ICS⁴

t_ON

160

220

140

ns typ

ns max

ns typ

ns max

ns typ

ns min

R_L= 300 Ω, C_L= 35 pF;

V_S= 3 V; T est Circuit 4

R_L= 300 Ω, C_L= 35 pF;

V_S= 3 V; T est Circuit 4

R_L= 300 Ω, C_L= 35 pF;

V_S1= V_S2= 3 V;

300

180

t_OFF

Break-Before-Make T ime Delay, t_D

(ADG453 Only)

T est Circuit 5

Charge Injection

pC typ

dB typ

V_S= 0 V, R_S= 0 Ω, C_L= 1.0 nF;

T est Circuit 6

R_L= 50 Ω, C_L= 5 pF, f = 1 MHz;

T est Circuit 7

R_L= 50 Ω, C_L= 5 pF, f = 1 MHz;

T est Circuit 8

OFF Isolation

Channel-to-Channel Crosstalk

–76

C_S(OFF)

C_D(OFF)

C_D, C_S(ON)

100

pF typ

f = 1 MHz

POWER REQUIREMENT S

V_DD= +5.5 V

Digital Inputs = 0 V or 5 V

I_DD

I_SS

I_L

0.0001

0.5

0.0001

0.5

0.0001

0.5

0.0001

0.5

µA typ

µA max

µA typ

µA max

µA typ

µA max

µA typ

µA max

V_L= +5.5 V

I_GND

NOT ES

¹T emperature range is as follows: B Version: –40°C to +85°C.

²T _MAX= +70°C.

³T ested with dual supplies.

⁴Guaranteed by design, not subject to production test.

Specifications subject to change without notice.

–4–

REV. A

ADG451/ADG452/ADG453

Truth Table (AD G451/AD G452)

Truth Table (AD G453)

AD G451 In

AD G452 In

Switch Condition

Logic

Switch 1, 4

Switch 2, 3

OFF

P IN CO NFIGURATIO N

(D IP /SO IC)

O RD ERING GUID E

IN1

IN2

Tem perature

Range

P ackage

O ptions*

Model

ADG451

ADG452

ADG453

TOP VIEW

(Not to Scale)

ADG451BN

ADG451BR

ADG452BN

ADG452BR

ADG453BN

ADG453BR

–40°C to +85°C

N-16

R-16A

N-16

R-16A

N-16

R-16A

GND

IN3

IN4

*N = Plastic DIP; R = Small Outline IC (SOIC).

ABSO LUTE MAXIMUM RATINGS¹

(T _A= +25°C unless otherwise noted)

SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW

θ_JAT hermal Impedance . . . . . . . . . . . . . . . . . . . . . . 77°C/W

Lead T emperature, Soldering

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C

ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV

V_DDto V_SS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +44 V

V_DDto GND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +25 V

V_SSto GND . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –25 V

V_Lto GND . . . . . . . . . . . . . . . . . . . . . . –0.3 V to V_DD+ 0.3 V

Analog, Digital Inputs². . . . . . . . . . . V_SS–2 V to V_DD+2 V or

30 mA, Whichever Occurs First

Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA

Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA

(Pulsed at 1 ms, 10% Duty Cycle max)

NOT ES

¹Stresses above those listed under Absolute Maximum Ratings may cause perma-

nent damage to the device. T his is a stress rating only; functional operation of the

device at these or any other conditions above those listed in the operational

sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods may affect device reliability. Only one absolute

maximum rating may be applied at any one time.

Operating T emperature Range

²Overvoltages at IN, S or D will be clamped by internal diodes. Current should be

limited to the maximum ratings given.

Industrial (B Version) . . . . . . . . . . . . . . . . . –40°C to +85°C

Storage T emperature Range . . . . . . . . . . . . . –65°C to +150°C

Junction T emperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C

Plastic Package, Power Dissipation . . . . . . . . . . . . . . . 470 mW

_JAT hermal Impedance . . . . . . . . . . . . . . . . . . . . . 117°C/W

Lead T emperature, Soldering (10 sec) . . . . . . . . . . . +260°C

CAUTIO N

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the ADG451/ADG452/ADG453 feature proprietary ESD protection circuitry, permanent

damagemayoccur on devices subjected to high energy electrostatic discharges. T herefore, proper ESD

precautions are recommended to avoid performance degradation or loss of functionality.

WARNING!

ESD SENSITIVE DEVICE

REV. A

–5–

ADG451/ADG452/ADG453

TERMINO LO GY

V_D(V_S)

Analog voltage on terminals D, S.

“OFF” switch source capacitance.

“OFF” switch drain capacitance.

V_DD

V_SS

Most positive power supply potential.

C_S(OFF)

C_D(OFF)

Most negative power supply potential in dual

supplies. In single supply applications, it may be

connected to GND.

C_D, C_S(ON) “ON” switch capacitance.

V_L

Logic power supply (+5 V).

t_ON

t_OFF

t_D

Delay between applying the digital control input

and the output switching on. See T est Circuit 4.

GND

Ground (0 V) reference.

Source terminal. May be an input or output.

Drain terminal. May be an input or output.

Logic control input.

Delay between applying the digital control input

and the output switching off.

“OFF” time or “ON” time measured between

the 90% points of both switches, when switching

from one address state to another. See T est

Circuit 5.

R_ON

∆R_ON

Ohmic resistance between D and S.

On resistance match between any two channels

i.e., R_ONmax – R_ONmin.

Crosstalk

A measure of unwanted signal coupled through

from one channel to another as a result of para-

sitic capacitance.

R_{FLAT (ON)}

Flatness is defined as the difference between the

maximum and minimum value of on-resistance as

measured over the specified analog signal range.

Off Isolation A measure of unwanted signal coupling through

an “OFF” switch.

I_S(OFF)

Source leakage current with the switch “OFF.”

Drain leakage current with the switch “OFF.”

Channel leakage current with the switch “ON.”

I_D(OFF)

I_D, I_S(ON)

Charge

Injection

A measure of the glitch impulse transferred

from the digital input to the analog output dur-

ing switching.

= +15V

= –15V

= +25؇C

+85؇C

= +5V

= –5V

= +5V

+25؇C

–40؇C

= +13.5V

= –13.5V

= +15V

= –15V

= +16.5V

= –16.5V

–15

–10

–5

OR V DRAIN OR SOURCE VOLTAGE – V

Figure 1. On Resistance as a Function of V_D(V_S)

for Various Dual Supplies

Figure 2. On Resistance as a Function of V_D(V_S)

for Different Tem peratures with Dual Supplies

–6–

REV. A

Typical Performance Characteristics–

ADG451/ADG452/ADG453

= +25؇C

= +15V

= +5V

= 0V

= +5V

= 0V

= +5V

+85؇C

= +16.5V

= 0V

= +15V

= 0V

+25؇C

–40؇C

= +13.5V

= 0V

OR V DRAIN OR SOURCE VOLTAGE – V

Figure 3. On Resistance as a Function of V_D(V_S) for

Various Single Supplies

Figure 6. On Resistance as a Function of V_D(V_S)

for Different Tem peratures with Single Supplies

0.5

0.4

= +15V

= –15V

= +5V

= +15V

= –15V

0.3

0.2

0.1

= +15V

= –15V

= +25؇C

1.0

= +5V

(ON)

I (OFF)

(ON)

(OFF)

–0.1

0.1

(OFF)

–0.2

–0.3

–0.4

–0.5

I (OFF)

0.01

–9

OR V DRAIN OR SOURCE VOLTAGE – V

–15

–6

–3

–12

TEMPERATURE – ؇C

Figure 4. Leakage Currents as a Function of Tem perature

Figure 7. Leakage Currents as a Function of V_D(V_S)

100k

= +15V

= –15V

= +5V

4SW

= +15V

= –15V

10k

= +5V

100

I , I

1.0

1SW

0.1

0.01

100

10k

100k

10M

FREQUENCY – MHz

FREQUENCY – Hz

Figure 5. Supply Current vs. Input Switching Frequency

Figure 8. Off Isolation vs. Frequency

REV. A

–7–

ADG451/ADG452/ADG453

120

AP P LICATIO N

= ؉15V

Figure 11 illustrates a precise, fast, sample-and-hold circuit.

An AD845 is used as the input buffer while the output

operational amplifier is an AD711. During the track mode,

SW1 is closed and the output V_OUTfollows the input signal

= –15V

100

= ؉5V

= 50⍀

LOAD

V_IN. In the hold mode, SW1 is opened and the signal is

held by the hold capacitor C_H.

+5V

+15V

2200pF

+15V

SW2

+15V

AD845

AD711

–15V

1000pF

75⍀

100

OUT

10k

100k

10M

100M

FREQUENCY – Hz

SW1

2200pF

–15V

Figure 9. Crosstalk vs. Frequency

ADG451/

452/453

–0.5

–1.0

–15V

= ؉15V

= –15V

Figure 11. Fast, Accurate Sam ple-and-Hold Circuit

= ؉5V

Due to switch and capacitor leakage, the voltage on the

hold capacitor will decrease with time. The ADG451/

ADG452/ADG453 minimizes this droop due to its low

leakage specifications. The droop rate is further minimized

by the use of a polystyrene hold capacitor. The droop rate

for the circuit shown is typically 30 µV/µs.

–1.5

–2.0

–2.5

–3.0

–3.5

A second switch, SW2, that operates in parallel with SW1, is

included in this circuit to reduce pedestal error. Since both

switches will be at the same potential, they will have a differ-

ential effect on the op amp AD711, which will minimize

charge injection effects. Pedestal error is also reduced by the

compensation network R_Cand C_C. This compensation net-

work reduces the hold time glitch while optimizing the ac-

quisition time. Using the illustrated op amps and component

values, the pedestal error has a maximum value of 5 mV over

the ±10 V input range. Both the acquisition and settling

times are 850 ns.

FREQUENCY – MHz

200

100

Figure 10. Frequency Response with Switch On

–8–

REV. A

ADG451/ADG452/ADG453

Test Circuits

I (OFF)

(ON)

= V /I

1 DS

Test Circuit 1. On Resistance

Test Circuit 2. Off Leakage

Test Circuit 3. On Leakage

+15V

+5V

0.1␮F

ADG451

50%

OUT

35pF

300⍀

ADG452

90%

OUT

GND

0.1␮F

–15V

OFF

Test Circuit 4. Switching Tim es

+15V

+5V

0.1␮F

50%

ADG453

OUT1

90%

OUT1

OUT2

35pF

300⍀

OUT2

35pF

300⍀

IN1, IN2

90%

GND

t_D

0.1␮F

–15V

Test Circuit 5. Break-Before-Make Tim e Delay

REV. A

–9–

ADG451/ADG452/ADG453

+15V

+5V

OUT

10nF

OUT

⌬V

OUT

= C

⌬V

L OUT

GND

–15V

Test Circuit 6. Charge Injection

+5V

+15V

0.1␮F

OUT

50⍀

GND

0.1␮F

–15V

Test Circuit 7. Off Isolation

+15V

+5V

0.1␮F

50⍀

IN1

IN2

OUT

GND

50⍀

CHANNEL-TO-CHANNEL

CROSSTALK = 20

LOG|V /V

OUT

0.1␮F

–15V

Test Circuit 8. Channel-to-Channel Crosstalk

–10–

REV. A

ADG451/ADG452/ADG453

O UTLINE D IMENSIO NS

Dimensions shown in inches and (mm).

16-Lead P lastic D IP

(N-16)

0.840 (21.34)

0.745 (18.92)

0.280 (7.11)

0.240 (6.10)

0.325 (8.26)

0.195 (4.95)

0.115 (2.93)

0.300 (7.62)

PIN 1

0.060 (1.52)

0.015 (0.38)

0.210 (5.33)

MAX

0.130

(3.30)

MIN

0.160 (4.06)

0.115 (2.93)

0.015 (0.381)

0.008 (0.204)

0.070 (1.77) SEATING

0.100

(2.54)

BSC

0.022 (0.558)

0.014 (0.356)

PLANE

0.045 (1.15)

16-Lead SO IC

(R-16A)

0.3937 (10.00)

0.3859 (9.80)

0.1574 (4.00)

0.2440 (6.20)

0.2284 (5.80)

0.1497 (3.80)

0.0688 (1.75)

0.0532 (1.35)

PIN 1

0.0196 (0.50)

x 45؇

0.0099 (0.25)

0.0098 (0.25)

0.0040 (0.10)

8؇

0؇

0.0500

(1.27)

BSC

0.0192 (0.49)

0.0138 (0.35)

SEATING

PLANE

0.0500 (1.27)

0.0160 (0.41)

0.0099 (0.25)

0.0075 (0.19)

REV. A

–11–

–12–

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ADG451BRZ产品参数

型号:	ADG451BRZ
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
零件包装代码：	SOIC
包装说明：	SOP,
针数：	16
Reach Compliance Code：	unknown
风险等级：	5.17
其他特性：	ALSO OPERATE WITH 12V SINGLE SUPPLY
模拟集成电路 - 其他类型：	SPST
JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e3
长度：	9.9 mm
湿度敏感等级：	1
负电源电压最大值（Vsup）：	-20 V
负电源电压最小值（Vsup）：	-4.5 V
标称负供电电压 (Vsup)：	-5 V
信道数量：	1
功能数量：	4
端子数量：	16
标称断态隔离度：	65 dB
通态电阻匹配规范：	0.3 Ω
最大通态电阻 (Ron)：	12 Ω
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260
座面最大高度：	1.75 mm
最大供电电压 (Vsup)：	20 V
最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V
表面贴装：	YES
最长断开时间：	140 ns
最长接通时间：	220 ns
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	MATTE TIN
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	40
宽度：	3.9 mm
Base Number Matches：	1

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