ADM±032C
C
In the case of the ADM1032, write operations contain either
one or two bytes, while read operations contain one byte and
perform the following functions.
ADDRESSING THE DEVICE
In general, every SMBus device has a 7-bit device address
(except for some devices that have extended, 10-bit addresses).
When the master device sends a device address over the bus,
the slave device with that address responds. The ADM1032 and
the ADM1032-1 are available with one SMBUS address, which
is Hex 4C (1001 100). The ADM1032-2 is also available with one
SMBUS address; however, that address is Hex 4D (1001 101).
To write data to one of the device data registers or read data
from it, the address pointer register must first be set so that the
correct data register is addressed. The first byte of a write
operation always contains a valid address that is stored in the
address pointer register. If data is written to the device, the write
operation contains a second data byte that is written to the
register selected by the address pointer register.
The serial bus protocol operates as follows:
1. The master initiates data transfer by establishing a START
condition, defined as a high-to-low transition on the serial
data line SDATA, while the serial clock line SCLK remains
high. This indicates that an address/data stream follows. All
slave peripherals connected to the serial bus respond to the
START condition and shift in the next eight bits, consisting
of a 7-bit address (MSB first) plus an R/W bit, which
determines the direction of the data transfer, that is, whether
data is written to or read from the slave device.
This is illustrated in Figure 14. The device address is sent over
the bus followed by R/W set to 0. This is followed by two data
bytes. The first data byte is the address of the internal data
register to be written to, which is stored in the address pointer
register. The second data byte is the data to be written to the
internal data register.
When reading data from a register, there are two possibilities:
• If the address pointer register value is unknown or not the
desired value, it is first necessary to set it to the correct value
before data can be read from the desired data register. This is
done by performing a write to the ADM1032 as before, but
only the data byte containing the register read address is sent
because data is not to be written to the register. This is shown
in Figure 15.
The peripheral whose address corresponds to the transmitted
address responds by pulling the data line low during the low
period before the ninth clock pulse, known as the acknowledge
bit. All other devices on the bus now remain idle while the
selected device waits for data to be read from or written to it.
If the R/W bit is a 0, the master writes to the slave device. If
the R/W bit is a 1, the master reads from the slave device.
A read operation is then performed consisting of the serial
bus address, R/W bit set to 1, followed by the data byte read
from the data register. This is shown in Figure 16.
2. Data is sent over the serial bus in sequences of nine clock
pulses, eight bits of data followed by an acknowledge bit from
the slave device. Transitions on the data line must occur
during the low period of the clock signal and remain stable
during the high period, since a low-to-high transition when
the clock is high can be interpreted as a STOP signal. The
number of data bytes that can be transmitted over the serial
bus in a single read or write operation is limited only by what
the master and slave devices can handle.
• If the address pointer register is known to be at the desired
address already, data can be read from the corresponding
data register without first writing to the address pointer
register and Figure 15 can be omitted.
Notes
Although it is possible to read a data byte from a data register
without first writing to the address pointer register, if the
address pointer register is already at the correct value, it is not
possible to write data to a register without writing to the
address pointer register. The first data byte of a write is always
written to the address pointer register.
3. When all data bytes are read or written, stop conditions are
established. In write mode, the master pulls the data line high
during the 10th clock pulse to assert a STOP condition. In
read mode, the master device overrides the acknowledge bit
by pulling the data line high during the low period before the
ninth clock pulse. This is known as no acknowledge. The
master then takes the data line low during the low period
before the 10th clock pulse, and high during the 10th clock
pulse to assert a STOP condition.
Don’t forget that some of the ADM1032 registers have different
addresses for read and write operations. The write address of a
register must be written to the address pointer if data is to be
written to that register, but it is not possible to read data from
that address. The read address of a register must be written to
the address pointer before data can be read from that register.
Any number of bytes of data can be transferred over the serial
bus in one operation, but it is not possible to mix read and write
in one operation because the type of operation is determined at
the beginning and cannot subsequently be changed without
starting a new operation.
Rev. E | Page 12 of 20