ADM202EANZ原理图各脚功能电路原理芯片引脚定义引脚图及功能-中国IC网-芯三七

EMI/EMC-Compliant, ± ±1 ꢀk, EꢁS-ꢂPotꢃetꢃꢄ

Rꢁ-232 Linꢃ SPivꢃPs/RꢃeꢃivꢃPs

ASM202E/ASM±±8±A

FEATURES

FUNCTIONAL BLOCK DIAGRAMS

5V INPUT

Complies with 89/336/EEC EMC directive

ESD protection to IEC1000-4-2 (801.2)

8 kꢀ: contact discharge

+5V TO +10V

VOLTAGE

DOUBLER

C1+

C1–

V

CC

0.1µF

10V

C3

0.1µF

6.3V

C5

0.1µF

V+

+10V TO –10V

VOLTAGE

INVERTER

C2+

C2–

V–

15 kꢀ: air-gap discharge

15 kꢀ: human body model

0.1µF

10V

C4

0.1µF

10V

EFT fast transient/burst immunity (IEC1000-4-4)

Low EMI emissions (EN55022)

230 kbits/s data rate guaranteed

TSSOP package option

T1

T2

T1

OUT

IN

EIA/TIA-232

OUTPUTS

CMOS

INPUTS

T2

R1

T2

IN

OUT

R1

R2

R1

R2

IN

OUT

Upgrade for MAX202E, 232E, LT1181A

EIA/TIA-232

CMOS

OUTPUTS

INPUTS

*

R2

IN

APPLICATIONS

General-purpose RS-232 data link

Portable instruments

PDAs

ADM202E

GND

*

INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 1.

5V INPUT

+5V TO +10V

VOLTAGE

DOUBLER

V

C1+

C1–

0.1µF

10V

CC

C5

0.1µF

10V

V+

V–

C3

0.1µF

10V

+10V TO –10V

VOLTAGE

INVERTER

0.1µF

10V

C2+

C2–

C4

0.1µF

10V

T1

T2

T1

T2

T1

IN

OUT

EIA/TIA-232

OUTPUTS

CMOS

INPUTS

GENERAL DESCRIPTION

T2

R1

R2

OUT

The ADM202E and ADM1181A are robust, high speed,

2-channel RS-232/V.28 interface devices that operate from a

single 5 V power supply. Both products are suitable for operation

in harsh electrical environments and are compliant with the EU

directive on EMC (89/336/EEC). Both the level of electromagnetic

emissions and immunity are in compliance. EM immunity

includes ESD protection in excess of 15 kV on all I/O lines,

fast transient/burst protection (1000-4-4), and radiated

immunity (1000-4-3). EM emissions include radiated and

conducted emissions as required by Information Technology

Equipment EN55022, CISPR22.

R1

R2

R1

IN

OUT

EIA/TIA-232

CMOS

OUTPUTS

INPUTS

*

R2

ADM1181A

GND

*

INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 2.

The ADM202E provides a robust pin-compatible upgrade for

existing ADM202, ADM232L, or MAX202E/MAX232E sockets.

It is available in a 16-lead PDIP, a wide SOIC, a narrow SOIC,

and a space-saving TSSOP package that is 44% smaller than the

SOIC package.

The ADM202E and ADM1181A conform to the EIA-232E

and CCITT V.28 specifications and operate at data rates up

to 230 kbps.

Four external 0.1 µF charge-pump capacitors are used for the

voltage doubler/inverter, permitting operation from a single

5 V supply.

The ADM1181A provides a robust pin-compatible upgrade for

the LTC1181A, and it is available in a 16-lead PDIP package

and a wide 16-lead SOIC package.

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.326.8703

www.analog.com

ASM202E/ASM±±8±A

TABLE OF CONTENTꢁ

Specifications..................................................................................... 3

Typical Performance Characteristics ..............................................8

ESD Testing (IEC1000-4-2) ...................................................... 10

Fast Transient/Burst Testing (IEC1000-4-4)........................... 11

IEC1000-4-3 Radiated Immunity ............................................ 12

Emissions/Interference.............................................................. 12

Conducted Emissions ................................................................ 12

Radiated Emissions.................................................................... 13

Outline Dimensions....................................................................... 14

Ordering Guide .......................................................................... 15

Absolute Maximum Ratings............................................................ 4

ESD Caution.................................................................................. 4

Pin Configuration and Function Descriptions............................. 5

General Description......................................................................... 6

Circuit Description....................................................................... 6

Charge-Pump DC-to-DC Voltage Converter....................... 6

Transmitter (Driver) Section .................................................. 6

Receiver Section ....................................................................... 6

High Baud Rate............................................................................. 6

ESD/EFT Transient Protection Scheme .................................... 7

REꢀISION HISTORY

2/05—Rev. B to Rev. C.

Updated Format..................................................................Universal

Changed Hysteresis Level..................................................Universal

Change to Specifications.................................................................. 3

Added ESD Caution......................................................................... 4

Change to Receiver Section............................................................. 6

Updated Outline Dimensions....................................................... 14

Changes to Ordering Guide .......................................................... 15

2/01—Rev. A to Rev. B.

Deletion of one ESD Rating in

ABSOLUTE MAXIMUM RATINGS............................................. 4

Removal of one column in Table II................................................ 8

Rev. C | Page 2 of 16

ASM202E/ASM±±8±A

ꢁꢂECIFICATIONꢁ

V_CC= 5.0 V 10%, C1 to C4 = 0.1 µF. All specifications T_MINto T_MAX, unless otherwise noted.

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

DC CHARACTERISTICS

Operating Voltage Range

V_CCPower Supply Current

4.5

5.0

2.5

13

5.5

6.0

18

V

mA

No load

R_L= 3 kΩ to GND

LOGIC

Input Logic Threshold Low, V_INL

Input Logic Threshold High, V_INH

CMOS Output Voltage Low, V_OL

CMOS Output Voltage High, V_OH

Logic Pull-Up Current

0.8

V

T_IN

2.4

3.5

0.4

I_OUT= 3.2 mA

I_OUT= −1 mA

T_IN= 0 V

+12

±25

µA

RS-232 RECEIVER

EIA-232 Input Voltage Range

EIA-232 Input Threshold Low

EIA-232 Input Threshold High

EIA-232 Input Hysteresis

EIA-232 Input Resistance

−30

0.4

+30

2.4

7

V

1.2

1.6

0.65

5

3

kΩ

T_A= 0°C to 85°C

RS-232 TRANSMITTER

Output Voltage Swing

±5.0

300

±±.0

±10

V

All transmitter outputs loaded with 3 kΩ to

ground

V_CC= 0 V, V_OUT= ±2 V

Transmitter Output Resistance

RS-232 Output Short-Circuit Current

Ω

mA

±60

TIMING CHARACTERISTICS

Maximum Data Rate

Receiver Propagation Delay

T_PHL

230

kbps

R_L= 3 kΩ to 7 kΩ, C_L= 50 pF to 1000 pF

0.1

0.3

1.0

8

1

1.5

30

µs

V/µs

T_PLH

Transmitter Propagation Delay

Transition Region Slew Rate

R_L= 3 kΩ, C_L= 1000 pF

3

Measured from +3 V to −3 V, or −3 V to +3 V

EM IMMUNITY

ESD Protection (I/O Pins)

±15

±8 kV

±2

kV

Human body model

IEC1000-4-2 air discharge

IEC1000-4-2 contact discharge

IEC1000-4-4

EFT Protection (I/O Pins)

EMI Immunity

10

V/m

IEC1000-4-3

Rev. C | Page 3 of 16

ASM202E/ASM±±8±A

ABꢁOLUTE MAXIMUM RATINGꢁ

T_A= 25°C, unless otherwise noted.

Table 2.

Stresses above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress

rating only; functional operation of the device at these or any

other conditions above those indicated in the operational

sections of this specification is not implied. Exposure to

absolute maximum rating conditions for extended periods may

affect device reliability.

Parameter

ꢀalues

V_CC

V+

V–

−0.3 V to +6 V

(V_CC− 0.3 V) to +14 V

+0.3 V to −14 V

Input Voltages

T_IN

R_IN

0.3 V to (V+, +0.3 V)

±30 V

Output Voltages

T_OUT

±15 V

R_OUT

–0.3 V to (V_CC+ 0.3 V)

Short-Circuit Duration

T_OUT

Continuous

450 mW

Power Dissipation N-16

(Derate 6 mW/°C Above 50°C)

θ_JA, Thermal Impedance

Power Dissipation R-16

(Derate 6 mW/°C Above 50°C)

θ_JA, Thermal Impedance

Power Dissipation RU-16

(Derate 6 mW/°C Above 50°C)

θ_JA, Thermal Impedance

Operating Temperature Range

Industrial (A Version)

Storage Temperature Range

Lead Temperature (Soldering, 10 sec)

117°C/W

450 mW

158°C/W

500 mW

158°C/W

–40°C to +85°C

–65°C to +150°C

300°C

ESD Rating (MIL-STD-883B) (I/O Pins) ±15 kV

ESD Rating (IEC1000-4-2 Air) (I/O Pins) ±15 kV

ESD Rating (IEC1000-4-2 Contact)

(I/O Pins)

±8 kV

EFT Rating (IEC1000-4-4) (I/O Pins)

±2 kV

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on

the human body and test equipment and can discharge without detection. Although this product features

proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy

electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance

degradation or loss of functionality.

Rev. C | Page 4 of 16

ASM202E/ASM±±8±A

ꢂIN CONFIGURATION ANS FUNCTION SEꢁCRIꢂTIONꢁ

C1+

V

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

CC

V+

GND

T1

C1–

C2+

C2–

V–

ADM202E

ADM1181A

OUT

R1

IN

TOP VIEW

(Not to Scale)

R1

T1

OUT

IN

T2

OUT

R2

IN

OUT

Figure 3. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

16

2

6

15

1, 3

V_CC

V+

V−

GND

Power Supply Input: 5 V ± 10ꢀ.

Internally Generated Positive Supply (+± V nominal).

Internally Generated Negative Supply (−± V nominal).

Ground Pin. Must be connected to 0 V.

External Capacitor 1 is connected between these pins. A 0.1 µF capacitor is recommended, but larger

capacitors of up to 47 µF can be used.

C1+, C1−

4, 5

C2+, C2−

External Capacitor 2 is connected between these pins. A 0.1 µF capacitor is recommended, but larger

capacitors of up to 47 µF can be used.

10, 11

7, 14

8, 13

T_IN

T_OUT

R_IN

Transmitter (Driver) Inputs. These inputs accept TTL/CMOS levels.

Transmitter (Driver) Outputs. These are RS-232 signal levels (typically ±± V).

Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is

connected on each input.

±, 12

R_OUT

Receiver Outputs. These are CMOS output logic levels.

5V INPUT

16

CC

+5V TO +10V

VOLTAGE

DOUBLER

+5V TO +10V

VOLTAGE

DOUBLER

1

3

16

1

3

C1+

C1–

V

CC

V

C1+

C1–

0.1µF

10V

0.1µF

10V

C3

C5

0.1µF

10V

C5

0.1µF

2

6

2

V+

0.1µF

6.3V

V+

V–

C3

0.1µF

10V

+10V TO –10V

VOLTAGE

INVERTER

4

5

V–

+10V TO –10V

VOLTAGE

INVERTER

C2+

C2–

4

5

6

0.1µF

10V

C2+

C2–

0.1µF

10V

C4

0.1µF

10V

0.1µF

10V

14

7

14

7

11

10

12

T1

T2

11

10

12

T1

T2

T1

OUT

IN

OUT

EIA/TIA-232

OUTPUTS

EIA/TIA-232

OUTPUTS

CMOS

INPUTS

CMOS

INPUTS

T2

R1

R2

T2

IN

T2

IN

OUT

R1

R2

13

8

13

8

R1

R2

R1

R2

R1

R2

R1

IN

OUT

EIA/TIA-232

CMOS

OUTPUTS

EIA/TIA-232

CMOS

OUTPUTS

INPUTS

*

INPUTS

*

9

R2

IN

ADM1181A

ADM202E

GND

15

GND

15

*INTERNAL 5kΩ PULL-DOWN RESISTOR ON EACH RS-232 INPUT

Figure 4. ADM202E Typical Operating Circuit

Figure 5. ADM1181A Typical Operating Circuit

Rev. C | Page 5 of 16

ASM202E/ASM±±8±A

GENERAL SEꢁCRIꢂTION

desired, larger capacitors (up to 47 µF) can be used for

Capacitor C1 to Capacitor C4. This facilitates direct substitution

with older generation charge-pump RS-232 transceivers.

The ADM202E/ADM1181E are rugged RS-232 line

drivers/receivers. Step-up voltage converters coupled with level-

shifting transmitters and receivers allow RS-232 levels to be

developed while operating from a single 5 V supply.

Features include low power consumption, high transmission

rates, and compliance with the EU directive on electromagnetic

compatibility. EM compatibility includes protection against

radiated and conducted interference, including high levels of

electrostatic discharge.

S3

S1

V

V+ = 2V

CC

C3

C1

S2

S4

V

GND

CC

INTERNAL

OSCILLATOR

All inputs and outputs contain protection against electrostatic

discharges of up to 15 kV and electrical fast transients of up

to 2 kV. This ensures compliance to IEC1000-4-2 and

IEC1000-4-4 requirements.

NOTE: C3 CONNECTS BETWEEN V+ AND GND ON THE ADM1181A

Figure 6. Charge-Pump Voltage Doubler

The devices are ideally suited for operation in electrically harsh

environments or where RS-232 cables are frequently being

plugged/unplugged. They are also immune to high RF field

strengths without special shielding precautions.

S3

S4

S1

S2

V+

GND

FROM

VOLTAGE

DOUBLER

C4

C2

V– = –(V+)

GND

CMOS technology is used to minimize the power dissipation,

allowing maximum battery life in portable applications.

INTERNAL

OSCILLATOR

The ADM202E/ADM1181A serve as a modification,

enhancement, and improvement to the ADM230–ADM241

family and its derivatives. It is essentially plug-in compatible

and do not have materially different applications.

Figure 7. Charge-Pump Voltage Inverter

Transmitter (Driver) Section

The drivers convert 5 V logic input levels into RS-232 output

levels. When driving an RS-232 load with V_CC= 5 V, the output

voltage swing is typically 9 V.

CIRCUIT DESCRIPTION

The internal circuitry consists of four main sections:

•

A charge-pump voltage converter

5 V logic to EIA-232 transmitters

EIA-232 to 5 V logic receivers.

Receiver Section

The receivers are inverting level shifters that accept RS-232

input levels and translate them into 5 V logic output levels. The

inputs have internal 5 kΩ pull-down resistors to ground and are

also protected against overvoltages of up to 30 V. Unconnected

inputs are pulled to 0 V by the internal 5 kΩ pull-down resistor.

Therefore, unconnected inputs and those connected to GND

have a Logic 1 output level.

Transient protection circuit on all I/O lines

Charge-Pump DC-to-DC Voltage Converter

The charge-pump voltage converter consists of a 200 kHz

oscillator and a switching matrix. The converter generates a

10 V supply from the input 5 V level. This is done in two stages,

using a switched capacitor technique, as illustrated in Figure 6

and Figure 7. First, the 5 V input supply is doubled to 10 V, using

Capacitor C1 as the charge storage element. The 10 V level is

then inverted to generate −10 V, using C2 as the storage element.

The receivers have Schmitt-trigger inputs with a hysteresis level

of 0.65 V. This ensures error-free reception for both noisy

inputs and inputs with slow transition times.

HIGH BAUD RATE

The ADM202E/ADM1181A feature high slew rates, permitting

data transmission at rates well in excess of the EIA/RS-232-E

specifications. RS-232 voltage levels are maintained at data rates

of up to 230 kbps, even under worst case loading conditions.

This allows for high speed data links between two terminals and

is also suitable for the new generation ISDN modem standards,

which require data rates of 230 kbps. The slew rate is internally

controlled to less than 30 V/µs to minimize EMI interference.

Capacitor C3 and Capacitor C4 are used to reduce the output

ripple. Their values are not critical and can be increased if

desired. On the ADM202E, Capacitor C3 is shown connected

between V+ and V_CC, whereas it is connected between V+ and

GND on the ADM1181A. It is acceptable to use either

configuration with both the ADM202E and ADM1181A. If

Rev. C | Page 6 of 16

ASM202E/ASM±±8±A

ESD/EFT TRANSIENT PROTECTION SCHEME

R1

RECEIVER

INPUT

R

X

The ADM202E/ADM1181A use protective clamping structures

on all inputs and outputs to clamp the voltage to a safe level and

dissipate the energy present in electrostatic (ESD) and electrical

fast transients (EFT) discharges. A simplified schematic of the

protection structure is shown in Figure 8 and Figure 9. Each

input and output contains two back-to-back high speed

D1

D2

R

IN

Figure 8. Receiver Input Protection Scheme

clamping diodes. During normal operation with maximum

RS-232 signal levels, the diodes have no effect because one or

the other is reverse biased depending on the polarity of the signal.

However, if the voltage exceeds about 50 V in either direction,

reverse breakdown occurs and the voltage is clamped at this level.

The diodes are large p-n junctions that are designed to handle

instantaneous current surges that exceed several amperes.

T

OUT

TRANSMITTER

OUTPUT

R

X

D1

D2

Figure 9. Transmitter Output Protection Scheme

The transmitter outputs and receiver inputs have a similar

protection structure. The receiver inputs can dissipate some of

the energy through the internal 5 kΩ resistor to GND, as well as

through the protection diodes.

The protection structure achieves ESD protection up to 15 kV

and EFT protection up to 2 kV on all RS-232 I/O lines. The

methods used to test the protection scheme are discussed in the

ESD Testing (IEC1000-4-2) and Fast Transient/Burst Testing

(IEC1000-4-4) sections.

Rev. C | Page 7 of 16

ASM202E/ASM±±8±A

TYꢂICAL ꢂERFORMANCE CHARACTERIꢁTICꢁ

15

10

5

T

O/P HI

80

70

X

T

O/P HI LOADED

X

60

50

0

LIMIT

40

30

20

10

0

–5

–10

–15

T

O/P LO LOADED

X

T

O/P LO

X

4

4.5

5

5.5

V

(V)

START 30.0MHz

STOP 200.0MHz

CC

Figure 10. EMC Radiated Emissions

Figure 13. Transmitter Output Voltage High/Low vs. V_CC

15

80

70

60

50

40

30

20

10

0

10

5

LIMIT

0

–5

–10

–15

0

5

10

15

(mA)

20

25

30

0.3

0.6

1

3

6

10

30

I

LOAD

LOG FREQUENCY (MHz)

Figure 11. EMC Conducted Emissions

Figure 14. Charge Pump V+ and V− vs. Current

15

10

5

9

7

5

3

115KBPS

230KBPS

460KBPS

T

O/P HI

X

1

–1

–3

0

–5

–10

–15

460KBPS

230KBPS

T

O/P LO

X

–5

–7

115KBPS

2500

–9

0

2

4

6

8

10

12

14

0

1000

1500

2000

3000

500

I

(mA)

LOAD

LOAD CAPACITANCE (pF)

Figure 15. Transmitter Output Voltage Low/High vs. Load Current

Figure 12. Transmitter Output Voltage High/Low vs. Load Capacitance

@ 115 kbps, 230 kbps, and 460 kbps

Rev. C | Page 8 of 16

ASM202E/ASM±±8±A

300

250

200

150

100

T

V–

V+

1

2

T

50

0

4.0

4.5

5.0

(V)

5.5

6.0

Ch2

ꢀ

V

Ch1

5.00V

M 2.00µs Ch1

–400mV

CC

Figure 16. 230 kbps Data Transmission

Figure 17. Charge-Pump Impedance vs. V_CC

Rev. C | Page ± of 16

ASM202E/ASM±±8±A

R1

R2

HIGH

ESD TESTING (IEC1000-4-2)

VOLTAGE

GENERATOR

DEVICE

UNDER TEST

IEC1000-4-2 (previously 801-2) specifies compliance testing

using two coupling methods, contact discharge and air-gap

discharge. Contact discharge calls for a direct connection to the

unit being tested. Air-gap discharge uses a higher test voltage,

but does not make direct contact with the unit being tested.

With air-gap discharge, the discharge gun is moved toward the

unit being tested, developing an arc across the air gap. This

method is influenced by humidity, temperature, barometric

pressure, distance, and rate of closure of the discharge gun.

Although less realistic, the contact-discharge method is more

repeatable and is gaining preference to the air-gap method.

C1

ESD TEST METHOD

H. BODY MIL-STD883B

IEC1000-4-2

R2

C1

1.5kΩ

330Ω

100pF

150pF

Figure 18. ESD Test Standards

100

90

Although very little energy is contained within an ESD pulse,

the extremely fast rise time coupled with high voltages can

cause failures in unprotected semiconductors. Catastrophic

destruction can occur immediately as a result of arcing or

heating. Even if catastrophic failure does not occur immediately,

the device might suffer from parametric degradation, which can

result in degraded performance. The cumulative effects of

continuous exposure can eventually lead to complete failure.

36.8

10

t_DL

t_RL

TIME t

I/O lines are particularly vulnerable to ESD damage. Simply

touching or plugging in an I/O cable can result in a static

discharge, which can damage or completely destroy the

interface product connected to the I/O port. Traditional ESD

test methods, such as the MIL-STD-883B method 3015.7, do

not fully test a product’s susceptibility to this type of discharge.

This test was intended to test a product’s susceptibility to ESD

damage during handling. Each pin is tested with respect to all

other pins. There are some important differences between the

traditional test and the IEC test:

Figure 19. Human Body Model ESD Current Waveform

100

90

•

The IEC test is much more stringent in terms of discharge

energy. The injected peak current is over four times greater.

10

0.1 TO 1ns

TIME t

•

The current rise time is significantly faster in the IEC test.

30ns

60ns

The IEC test is carried out while power is applied to

the device.

Figure 20. IEC1000-4-2 ESD Current Waveform

The ADM202E/ADM1181E products are tested using both of

the previously mentioned test methods. Pins are tested with

respect to all other pins as per the MIL-STD-883B specification.

In addition, I/O pins are tested as per the IEC test specification.

The products were tested under the following conditions:

It is possible that the ESD discharge could induce latch-up in the

device being tested. Therefore, this test is more representative of a

real-world I/O discharge where the equipment is operating

normally with power applied. For peace of mind, however, both

tests should be performed to ensure maximum protection

during both handling and field service.

• Power-On

• Power-Off

There are four levels of compliance defined by IEC1000-4-2. The

ADM202E/ADM1181A products meet the most stringent level

of compliance both for contact and for air-gap discharge. This

means that the products are able to withstand contact discharges

in excess of 8 kV and air-gap discharges in excess of 15 kV.

Rev. C | Page 10 of 16

ASM202E/ASM±±8±A

Table 4. IEC1000-4-2 Compliance Levels

A simplified circuit diagram of the actual EFT generator is

illustrated in Figure 22.

Level

Contact Discharge

Air Discharge

2 kV

4 kV

8 kV

15 kV

1

2

3

4

2 kV

4 kV

6 kV

8 kV

The transients are coupled onto the signal lines using an EFT

coupling clamp. The clamp, which is 1 m long, completely

surrounds the cable, providing maximum coupling capacitance

(50 pF to 200 pF typ) between the clamp and the cable. High

energy transients are capacitively coupled to the signal lines.

Fast rise times (5 ns), as specified by the standard, result in very

effective coupling. This test is very strenuous because high voltages

are coupled onto the signal lines. The repetitive transients often

cause problems where single pulses do not. Destructive latch-up

can be induced due to the high energy content of the transients.

Note that this stress is applied while the interface products are

powered up and transmitting data. The EFT test applies

hundreds of pulses with higher energy than ESD. Worst-case

transient current on an I/O line can be as high as 40 A.

Table 5. ADM202E/ADM1181A ESD Test Results

ESD Test Method

MIL-STD-883B

IEC1000-4-2

Contact

I/O Pins

±15 kV

±8 kV

Air

±15 kV

FAST TRANSIENT/BURST TESTING (IEC1000-4-4)

IEC1000-4-4 (previously 801-4) covers electrical fast transient

(EFT)/burst immunity. Electrical fast transients occur as a result

of arcing contacts in switches and relays. The tests simulate the

interference generated when, for example, a power relay

disconnects an inductive load. A spark is generated due to the

well-known back EMF effect. In fact, the spark consists of a

burst of sparks as the relay contacts separate. The voltage

appearing on the line, therefore, consists of a burst of extremely

fast transient impulses. A similar effect occurs when switching

on fluorescent lights.

C

D

R

M

HIGH

VOLTAGE

SOURCE

L

C

50Ω

OUTPUT

Z

C

S

C

Figure 22. IEC1000-4-4 Fast Transient Generator

Test results are classified according to the following:

•

Classification 1: Normal performance within specifi-

cation limits

The fast transient/burst test defined in IEC1000-4-4 simulates

this arcing, and its waveform is illustrated in Figure 17. It

consists of a burst of 2.5 kHz to 5 kHz transients repeating at

300 ms intervals. It is specified for both power and data lines.

Classification 2: Temporary degradation or loss of

performance that is self-recoverable

Classification 3: Temporary degradation or loss of function

or performance that requires operator intervention or

system reset

V

•

Classification 4: Degradation or loss of function that is not

recoverable due to damage

t

300ms

15ms

The ADM202E/ADM1181A meet Classification 2 and have

been tested under worst-case conditions using unshielded

cables. Data transmission during the transient condition is

corrupted, but can resume immediately following the EFT event

without user intervention.

5ns

V

50ns

t

0.2/0.4ms

Figure 21. IEC1000-4-4 Fast Transient Waveform

Rev. C | Page 11 of 16

ASM202E/ASM±±8±A

CONDUCTED EMISSIONS

IEC1000-4-3 RADIATED IMMUNITY

Conducted emissions is a measure of noise conducted onto the

mains power supply. Switching transients from the charge pump

that are 20 V in magnitude and that contain significant energy

can lead to conducted emissions. Another source of conducted

emissions is the overlap in switch-on times in the charge-pump

voltage converter. In the voltage doubler shown in Figure 23, if

S2 is not fully turned off before S4 turns on, a transient current

glitch occurs between V_CCand GND that results in conducted

emissions. Therefore, it is important that the switches in the

charge pump guarantee break-before-make switching under all

conditions to prevent instantaneous short-circuit conditions.

IEC1000-4-3 (previously IEC801-3) describes the measure-

ment method and defines the levels of immunity to radiated

electromagnetic fields. It was originally intended to simulate the

electromagnetic fields generated by portable radio transceivers

and other devices that generate continuous wave-radiated

electromagnetic energy. Its scope has since been broadened to

include spurious EM energy, which can be radiated from

fluorescent lights, thyristor drives, inductive loads, and

other sources.

Testing for immunity involves irradiating the device with an

EM field. There are various methods of achieving this, including

use of anechoic chamber, stripline cell, TEM cell, and GTEM

cell. A stripline cell consists of two parallel plates with an electric

field developed between them. The device being tested is placed

within the cell and exposed to the electric field. There are three

severity levels that have field strengths ranging from 1 V to

10 V/m. Results are classified in a similar fashion to those for

IEC1000-4-2.

The ADM202E is designed to minimize the switching transients

and ensure break-before-make switching, thereby minimizing

conducted emissions. This results in emission levels well below

the specified limits. No additional filtering or decoupling, other

than the recommended 0.1 µF capacitor, is required.

Conducted emissions are measured by monitoring the mains

line. The equipment used consists of a spectrum analyzer and a

LISN (line impedance stabilizing network) that essentially

presents a fixed impedance at RF. The spectrum analyzer scans

for emissions of up to 30 MHz; a plot for the ADM202E is

shown in Figure 25.

•

Classification 1: Normal operation

Classification 2: Temporary degradation or loss of

function that is self-recoverable when the interfering

signal is removed

•

Classification 3: Temporary degradation or loss of function

that requires operator intervention or system reset when

the interfering signal is removed

S3

S4

S1

S2

V

V+ = 2V

CC

C1

C3

GND

V

CC

Classification 4: Degradation or loss of function that is not

recoverable due to damage

INTERNAL

OSCILLATOR

The ADM202E/ADM1181A products easily meet Classification 1

at the most stringent (Level 3) requirement. In fact, field strengths

of up to 30 V/m showed no performance degradation, and error-

free data transmission continued even during irradiation.

Figure 23. Charge-Pump Voltage Doubler

∅1

∅2

Table 6. Test Severity Levels (IEC1000-4-3)

Level

Field Strength ꢀ/m

1

2

3

1

3

10

SWITCHING GLITCHES

EMISSIONS/INTERFERENCE

Figure 24. Switching Glitches

EN55 022 and CISPR22 define the permitted limits of radiated

and conducted interference from information technology (IT)

equipment. The objective of the standard is to minimize the

level of emissions, both conducted and radiated. For ease of

measurement and analysis, conducted emissions are assumed to

predominate below 30 MHz, and radiated emissions are

assumed to predominate above 30 MHz.

Rev. C | Page 12 of 16

ASM202E/ASM±±8±A

80

70

60

50

40

30

20

10

0

was operated at maximum baud rates and configured like a

typical RS-232 interface. Testing for radiated emissions was

carried out in a shielded anechoic chamber.

LIMIT

RADIATED NOISE

DUT

TO

RECEIVER

ADJUSTABLE

ANTENNA

TURNTABLE

0.3

0.6

1

3

6

10

30

LOG FREQUENCY (MHz)

Figure 26. Radiated Emissions Test Setup

Figure 25. ADM202E Conducted Emissions

80

70

RADIATED EMISSIONS

Radiated emissions are measured at frequencies in excess of

30 MHz. RS-232 outputs are designed for operation at high

baud rates, while driving cables can radiate high frequency EM

energy. The previously described causes of conducted emissions

can also cause radiated emissions. Fast RS-232 output transitions

can radiate interference, especially when lightly loaded and

driving unshielded cables. Charge-pump devices are also prone

to radiating noise due to the high frequency oscillator and the

high voltages being switched by the charge pump. The move

toward smaller capacitors to conserve board space has resulted

in higher frequency oscillators in the charge-pump design,

causing higher levels of conducted and radiated emissions.

60

50

40

30

20

10

0

LIMIT

START 30.0MHz

STOP 200.0MHz

Figure 27. ADM202E Radiated Emissions vs. Frequency

The RS-232 outputs on the ADM202E feature a controlled slew

rate to minimize the level of radiated emissions, yet they are fast

enough to support data rates of up to 230 kBaud.

Figure 27 shows radiated emissions vs. frequency. The levels of

emissions are well within specifications without the need for

additional shielding or filtering components. The ADM202E

Rev. C | Page 13 of 16

ASM202E/ASM±±8±A

OUTLINE SIMENꢁIONꢁ

10.50 (0.4134)

10.10 (0.3976)

5.10

5.00

4.90

16

1

9

8

7.60 (0.2992)

7.40 (0.2913)

16

9

8

4.50

4.40

4.30

10.65 (0.4193)

10.00 (0.3937)

6.40

BSC

1

1.27 (0.0500)

0.75 (0.0295)

0.25 (0.0098)

2.65 (0.1043)

2.35 (0.0925)

BSC

× 45°

PIN 1

0.30 (0.0118)

0.10 (0.0039)

1.20

MAX

0.15

0.05

0.20

0.09

8°

0°

0.75

0.60

0.45

0.51 (0.0201)

0.31 (0.0122)

SEATING

PLANE

COPLANARITY

0.10

1.27 (0.0500)

0.40 (0.0157)

0.33 (0.0130)

0.20 (0.0079)

8°

0°

0.30

0.19

0.65

BSC

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-013AA

COPLANARITY

0.10

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

COMPLIANT TO JEDEC STANDARDS MO-153AB

Figure 28. 16-Lead Standard Small Outline Package [SOIC]

Wide Body

(RW-16)

Figure 30. 16-Lead Thin Shrink Small Outline Package [TSSOP]

(RU-16)

Dimensions shown in millimeters and (inches)

Dimensions shown in millimeters

0.785 (19.94)

0.765 (19.43)

0.745 (18.92)

0.285 (7.24)

0.295 (7.49)

0.275 (6.99)

16

1

9

8

10.00 (0.3937)

9.80 (0.3858)

0.325 (8.26)

0.310 (7.87)

0.300 (7.62)

9

8

16

1

0.100 (2.54)

BSC

6.20 (0.2441)

5.80 (0.2283)

4.00 (0.1575)

3.80 (0.1496)

0.150 (3.81)

0.135 (3.43)

0.120 (3.05)

0.015 (0.38)

MIN

0.180 (4.57)

MAX

1.75 (0.0689)

1.35 (0.0531)

1.27 (0.0500)

BSC

0.50 (0.0197)

0.25 (0.0098)

× 45°

0.150 (3.81)

0.130 (3.30)

0.110 (2.79)

0.25 (0.0098)

0.10 (0.0039)

0.015 (0.38)

0.010 (0.25)

0.008 (0.20)

SEATING

PLANE

0.060 (1.52)

0.050 (1.27)

0.045 (1.14)

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

8°

0°

0.51 (0.0201)

0.31 (0.0122)

SEATING

PLANE

1.27 (0.0500)

0.40 (0.0157)

COPLANARITY

0.10

0.25 (0.0098)

0.17 (0.0067)

COMPLIANT TO JEDEC STANDARDS MO-095AC

COMPLIANT TO JEDEC STANDARDS MS-012AC

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

Figure 29. 16-Lead Standard Small Outline Package [SOIC]

Narrow Body

(R-16)

Figure 31. 16-Lead Plastic Dual In-Line Package [PDIP]

(N-16)

Dimensions shown in millimeters and (inches)

Dimensions shown in inches and (millimeters)

Rev. C | Page 14 of 16

ASM202E/ASM±±8±A

ORDERING GUIDE

Model

ADM202EAN

ADM202EANZ¹

Temperature Range

−40°C to +85°C

Package Description

Plastic DIP

Wide SOIC

Narrow SOIC

TSSOP

Package Option

N-16

ADM202EARW

R-16W

R-16N

RU-16

N-16

ADM202EARW-REEL

ADM202EARWZ¹

ADM202EARWZ-REEL¹

ADM202EARN

ADM202EARN-REEL

ADM202EARN-REEL7

ADM202EARNZ¹

ADM202EARNZ-REEL¹

ADM202EARNZ-REEL7¹

ADM202EARU

ADM202EARU-REEL

ADM202EARU-REEL7

ADM202EARUZ¹

TSSOP

ADM202EARUZ-REEL¹

ADM202EARUZ-REEL7¹

ADM1181AAN

TSSOP

Plastic DIP

Wide SOIC

ADM1181AARW

R-16W

ADM1181AARW-REEL

ADM1181AARWZ¹

ADM1181AARWZ-REEL¹

¹Z = Pb-free part.

Rev. C | Page 15 of 16

ASM202E/ASM±±8±A

NOTEꢁ

©

registered trademarks are the property of their respective owners.

C00066-0-2/05(C)

Rev. C | Page 16 of 16

型号:	ADM202EANZ
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	ROCHESTER ELECTRONICS LLC
零件包装代码：	DIP
包装说明：	LEAD FREE, PLASTIC, MO-095AC, DIP-16
针数：	16
Reach Compliance Code：	unknown
风险等级：	5.3
差分输出：	NO
驱动器位数：	2
输入特性：	SCHMITT TRIGGER
接口集成电路类型：	LINE TRANSCEIVER
接口标准：	EIA-232-E; V.28
JESD-30 代码：	R-PDIP-T16
JESD-609代码：	e3
长度：	19.43 mm
湿度敏感等级：	NOT APPLICABLE
功能数量：	2
端子数量：	16
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	DIP
封装形状：	RECTANGULAR
封装形式：	IN-LINE
峰值回流温度（摄氏度）：	NOT APPLICABLE
认证状态：	COMMERCIAL
最大接收延迟：	1000 ns
接收器位数：	2
座面最大高度：	4.57 mm
最大供电电压：	5.5 V
最小供电电压：	4.5 V
标称供电电压：	5 V
表面贴装：	NO
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	MATTE TIN
端子形式：	THROUGH-HOLE
端子节距：	2.54 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT APPLICABLE
最大传输延迟：	1500 ns
宽度：	7.62 mm

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