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产品型号ADM660ARZ的概述

ADM660ARZ芯片的概述 ADM660ARZ是一款由Analog Devices公司推出的集成电路（IC），主要用于生成和维持不同电压的高效电源管理。这款芯片的特色在于其高稳定性和优异的噪声性能，使得它非常适合在高要求的电子设备中使用。ADM660ARZ广泛应用于传感器、通信设备和其他需要稳定电压的电子系统。 ADM660ARZ采用了先进的电流源和电流模式控制技术，能够实现快速的瞬态响应和宽广的工作电压范围。这些特点使得它在各种应用场合中都表现出了良好的可靠性和卓越的效率。 ADM660ARZ的详细参数以下是ADM660ARZ的一些关键参数： - 功耗：芯片的工作功耗非常低，适合电池供电的设备。 - 输出电压范围：该芯片支持多个输出电压的配置，通常在1.2V至5V之间，可以通过外部电阻进行调整。 - 工作温度范围：ADM660ARZ支持-40°C至85°C的工作温度，适应各种环境...

产品型号ADM660ARZ的Datasheet PDF文件预览

CMOS Switched-Capacitor

Voltage Converters

ADM660/ADM8660

TYPICAL CIRCUIT CONFIGURATIONS

FEATURES

ADM660: Inverts or Doubles Input Supply Voltage

ADM8660: Inverts Input Supply Voltage

100 mA Output Current

+1.5V TO +7V

INPUT

Shutdown Function (ADM8660)

2.2 ␮F or 10 ␮F Capacitors

0.3 V Drop at 30 mA Load

+1.5 V to +7 V Supply

V+

ADM660

OSC

CAP+

10␮F

GND

INVERTED

NEGATIVE

OUTPUT

Low Power CMOS: 600 ␮A Quiescent Current

Selectable Charge Pump Frequency (25 kHz/120 kHz)

Pin Compatible Upgrade for MAX660, MAX665, ICL7660

Available in 16-Lead TSSOP Package

CAP–

OUT

10␮F

Voltage Inverter Configuration (ADM660)

APPLICATIONS

Handheld Instruments

Portable Computers

Remote Data Acquisition

Op Amp Power Supplies

+1.5V TO +7V

INPUT

V+

ADM8660

CAP+

10␮F

GND

INVERTED

NEGATIVE

OUTPUT

GENERAL DESCRIPTION

The ADM660/ADM8660 is a charge-pump voltage converter

that can be used to either invert the input supply voltage giving

OUT

CAP–

SHUTDOWN

CONTROL

10␮F

V_OUT= –V_INor double it (ADM660 only) giving V_OUT= 2 ϫ V_IN

Voltage Inverter Configuration with Shutdown (ADM8660)

Input voltages ranging from +1.5 V to +7 V can be inverted into

a negative –1.5 V to –7 V output supply. This inverting scheme

is ideal for generating a negative rail in single power supply

systems. Only two small external capacitors are needed for the

charge pump. Output currents up to 50 mA with greater than

90% efficiency are achievable, while 100 mA achieves greater

than 80% efficiency.

The ADM660 is a pin compatible upgrade for the MAX660,

MAX665, ICL7660, and LTC1046.

The ADM660/ADM8660 is available in 8-lead DIP and

narrow-body SOIC. The ADM660 is also available in a 16-lead

TSSOP package.

A Frequency Control (FC) input pin is used to select either

25 kHz or 120 kHz charge-pump operation. This is used to

optimize capacitor size and quiescent current. With 25 kHz

selected, a 10 µF external capacitor is suitable, while with 120 kHz

the capacitor may be reduced to 2.2 µF. The oscillator frequency

on the ADM660 can also be controlled with an external capacitor

connected to the OSC input or by driving this input with an

external clock. In applications where a higher supply voltage is

desired it is possible to use the ADM660 to double the input

voltage. With input voltages from 2.5 V to 7 V, output voltages

from 5 V to 14 V are achievable with up to 100 mA output current.

ADM660/ADM8660 Options

Option

ADM660

ADM8660

Inverting Mode

Doubling Mode

External Oscillator

Shutdown

Package Options

R-8

N-8

The ADM8660 features a low power shutdown (SD) pin instead

of the external oscillator (OSC) pin. This can be used to disable

the device and reduce the quiescent current to 300 nA.

RU-16

REV.

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat

may result from its use. No license is granted by implication or otherwise

under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective companies.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

781/461-3113

www.analog.com

2011

Fax:

(V+ = +5 V, C1, C2 = 10␮F,* T_A= T_MINto T_MAX, unless

ADM660/ADM8660–SPECIFICATIONS ^{otherwise noted.)}

Parameter

Min

Typ Max

Unit

Test Conditions/Comments

Input Voltage, V+

R_L= 1 kW

3.5

1.5

2.5

7.0

Inverting Mode, LV = Open

Inverting Mode, LV = GND

Doubling Mode, LV = OUT

Supply Current

No Load

0.6

2.5

4.5

FC = Open (ADM660), GND (ADM8660)

FC = V+, LV = Open

Output Current

100

Output Resistance (ADM660)

Output Resistance (ADM8660)

16.5

I_L= 100 mA

I_L= 100 mA, T_A= 25∞C

I_L= 100 mA, T_A= –40∞C to +85∞C

Charge-Pump Frequency

OSC Input Current

120

±5

±25

kHz

FC = Open (ADM660), GND (ADM8660)

FC = V+

FC = Open (ADM660), GND (ADM8660)

FC = V+

Power Efficiency (FC = Open) (ADM660)

Power Efficiency (FC = Open) (ADM8660)

R_L= 1 kW Connected from V+ to OUT

R_L= 1 kW Connected from V+ to OUT,

T_A= +25∞C

R_L= 1 kW Connected from V+ to OUT,

T_A= –40∞C to +85∞C

Power Efficiency (FC = Open) (ADM8660)

88.5

Power Efficiency (FC = Open) (ADM660)

Power Efficiency (FC = Open) (ADM8660)

R_L= 500 W Connected from OUT to GND

R_L= 500 W Connected from OUT to GND,

T_A= +25∞C

Power Efficiency (FC = Open) (ADM8660)

88.5

R_L= 500 W Connected from OUT to GND,

T_A= –40∞C to +85∞C

Power Efficiency (FC = Open)

Voltage Conversion Efficiency

81.5

99.96

0.3

I_L= 100 mA to GND

No Load

Shutdown Supply Current, I_SHDN

Shutdown Input Voltage, V_SHDN

ADM8660, SHDN = V+

SHDN High = Disabled

SHDN Low = Enabled

I_L= 100 mA

2.4

0.8

Shutdown Exit Time

500

C1 and C2 are low ESR (<0.2 W) electrolytic capacitors.

High ESR degrade performance.

Specifications subject to change without notice.

REV.

–2–

ADM660/ADM8660

ABSOLUTE MAXIMUM RATINGS*

(T_A= +25°C, unless otherwise noted.)

Power Dissipation, RU-16 . . . . . . . . . . . . . . . . . . . . . 500 mW

(Derate 6 mW/°C above +50°C)

θ_JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 158°C/W

Operating Temperature Range

Input Voltage (V+ to GND, GND to OUT) . . . . . . . . +7.5 V

LV Input Voltage . . . . . . . . . . (OUT – 0.3 V) to (V+, +0.3 V)

FC and OSC Input Voltage

. . . . . . . . . . . (OUT – 0.3 V) or (V+, –6 V) to (V+, +0.3 V)

OUT, V+ Output Current (Continuous) . . . . . . . . . . . 120 mA

Output Short Circuit Duration to GND . . . . . . . . . . . 10 secs

Power Dissipation, N-8 . . . . . . . . . . . . . . . . . . . . . . . 625 mW

(Derate 8.3 mW/°C above +50°C)

Industrial (A Version) . . . . . . . . . . . . . . . . –40°C to +85°C

Storage Temperature Range . . . . . . . . . . . –65°C to +150°C

Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C

Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C

Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C

ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >2000 V

This is a stress rating only; functional operation of the device at these or any other

conditions above those indicated in the operation section of this specification is not

implied. Exposure to absolute maximum rating conditions for extended periods

may affect device reliability.

θ_JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 120°C/W

Power Dissipation, R-8 . . . . . . . . . . . . . . . . . . . . . . . 450 mW

(Derate 6 mW/°C above +50°C)

θ_JA, Thermal Impedance . . . . . . . . . . . . . . . . . . . . 170°C/W

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection. Although the

ADM660/ADM8660 features proprietary ESD protection circuitry, permanent damage may occur on

devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are

recommended to avoid performance degradation or loss of functionality.

REV.

–3–

ADM660/ADM8660

PIN CONNECTIONS

8-Lead

V+

CAP+

GND

CAP+

GND

ADM660

ADM8660

OSC

TOP VIEW

(Not to Scale)

CAP–

OUT

CAP–

OUT

16-Lead

V+

ADM660

OSC

CAP+

GND

CAP–

TOP VIEW

(Not to Scale)

11 OUT

10 NC

NC = NO CONNECT

PIN FUNCTION DESCRIPTIONS

Inverter Configuration

Function

Doubler Configuration (ADM660 Only)

Mnemonic

Function

Frequency Control Input for Internal Oscillator

and Charge Pump. With FC = Open (ADM660)

or connected to GND (ADM8660), f_CP= 25 kHz;

with FC = V+, f_CP= 120 kHz.

Frequency Control Input for Internal Oscillator

and Charge Pump. With FC = Open, f_CP

25 kHz; with FC = V+, f_CP= 120 kHz.

CAP+

GND

CAP–

OUT

Positive Charge-Pump Capacitor Terminal.

Positive Input Supply.

CAP+

GND

CAP–

OUT

Positive Charge-Pump Capacitor Terminal.

Power Supply Ground.

Negative Charge-Pump Capacitor Terminal.

Ground.

Negative Charge-Pump Capacitor Terminal.

Output, Negative Voltage.

Low Voltage Operation Input. Connect to OUT.

Must be left unconnected in this mode.

Doubled Positive Output.

Low Voltage Operation Input. Connect to GND

when input voltage is less than 3.5 V. Above

3.5 V, LV may be connected to GND or left

unconnected.

OSC

V+

OSC

ADM660: Oscillator Control Input. OSC is

connected to an internal 15 pF capacitor. An

external capacitor may be connected to slow the

oscillator. An external oscillator may also be

used to overdrive OSC. The charge-pump

frequency is equal to 1/2 the oscillator frequency.

V+

ADM8660: Shutdown Control Input. This in-

put, when high, is used to disable the charge

pump thereby reducing the power consumption.

Positive Power Supply Input.

REV.

–4–

Typical Performance Characteristics–ADM660/ADM8660

100

3.0

2.5

2.0

1.5

1.0

0.5

= 10mA

VOLTAGE DOUBLER

LV = OUT

= 1mA

= 50mA

LV = GND

= 80mA

LV = OPEN

10k

100k

1.5

3.5 7

5.5

CHARGE-PUMP FREQUENCY – Hz

SUPPLY VOLTAGE – Volts

TPC 1. Power Supply Current vs. Voltage

TPC 4. Efficiency vs. Charge-Pump Frequency

3.5

3.0

2.5

100

–3.0

EFFICIENCY

–3.4

–3.8

–4.2

–4.6

–5.0

2.0

LV = GND

VOLTAGE DOUBLER

1.5

OUT

1.0

0.5

LV = GND

VOLTAGE INVERTER

100

CHARGE-PUMP FREQUENCY – kHz

1000

100

LOAD CURRENT – mA

TPC 2. Output Voltage and Efficiency vs. Load Current

TPC 5. Power Supply Current vs. Charge-Pump

Frequency

1.6

120

V+ = +6.5V

100

V+ = +5.5V

V+ = +4.5V

1.2

V+ = +3.5V

V+ = +2.5V

V+ = +4.5V

0.8

0.4

V+ = +1.5V

V+ = +2.5V

V+ = +1.5V

V+ = +5.5V

100

LOAD CURRENT – mA

TPC 3. Output Voltage Drop vs. Load Current

TPC 6. Power Efficiency vs. Load Current

REV.

–5–

ADM660/ADM8660

5.0

LOAD = 10mA

4.5

LOAD = 1mA

4.0

3.5

3.0

2.5

2.0

LOAD = 50mA

LV = GND

FC = OPEN

C1, C2 = 10␮F

LOAD = 80mA

1.5

1.0

0.5

–40

–20

100

1000

TEMPERATURE – C

CHARGE-PUMP FREQUENCY – kHz

TPC 7. Output Voltage vs. Charge-Pump Frequency

TPC 10. Charge-Pump Frequency vs. Temperature

FC = V+

LV = GND

100

FC = OPEN

LV = GND

0.1

1.5

2.5

3.5

4.5

5.5

6.5

100

SUPPLYVOLTAGE –Volts

CAPACITANCE – pF

TPC 8. Output Source Resistance vs. Supply Voltage

TPC 11. Charge-Pump Frequency vs. External

Capacitance

140

LV = GND

120

LV = GND

LV = OPEN

100

LV = OPEN

FC = OPEN

OSC = OPEN

C1, C2 = 10␮F

FC = V+

OSC = OPEN

C1,C2 = 2.2␮F

1.5

2.5

3.5

4.5

5.5

6.5

3.5

4.5

5.5

6.5

SUPPLY VOLTAGE – Volts

TPC 9. Charge-Pump Frequency vs. Supply Voltage

TPC 12. Charge-Pump Frequency vs. Supply Voltage

REV.

–6–

ADM660/ADM8660

160

140

120

100

V+ = +1.5V

LV = GND

FC =V+

C1, C2 = 2.2␮F

V+ = +3V

V+ = +5V

–40

–20

100

–40

–20

100

TEMPERATURE –

TEMPERATURE – C

TPC 13. Charge-Pump Frequency vs. Temperature

TPC 14. Output Resistance vs. Temperature

GENERAL INFORMATION

Switched Capacitor Theory of Operation

The ADM660/ADM8660 is a switched capacitor voltage con-

verter that can be used to invert the input supply voltage. The

ADM660 can also be used in a voltage doubling mode. The

voltage conversion task is achieved using a switched capacitor

technique using two external charge storage capacitors. An on-

board oscillator and switching network transfers charge between

the charge storage capacitors. The basic principle behind the

voltage conversion scheme is illustrated in Figures 1 and 2.

As already described, the charge pump on the ADM660/ADM8660

uses a switched capacitor technique in order to invert or double

the input supply voltage. Basic switched capacitor theory is

discussed below.

A switched capacitor building block is illustrated in Figure 3.

With the switch in position A, capacitor C1 will charge to voltage

V1. The total charge stored on C1 is q1 = C1V1. The switch is

then flipped to position B discharging C1 to voltage V2. The

charge remaining on C1 is q2 = C1V2. The charge transferred

to the output V2 is, therefore, the difference between q1 and

q2, so ∆q = q1–q2 = C1 (V1–V2).

CAP+

V+

OUT = –V+

CAP–

+ 2

Φ1

Φ2

OSCILLATOR

Figure 1. Voltage Inversion Principle

Figure 3. Switched Capacitor Building Block

CAP+

V+

= 2V+

OUT

As the switch is toggled between A and B at a frequency f, the

charge transfer per unit time or current is:

V+

CAP–

+ 2

I = f(∆q) = f(C1)(V1–V 2)

Φ1

Φ2

OSCILLATOR

Therefore,

I = (V1–V 2)/(1/fC1) = (V1–V 2)/(R_EQ

where R_EQ= 1/fC1

)

Figure 2. Voltage Doubling Principle

Figure 1 shows the voltage inverting configuration, while Figure 2

shows the configuration for voltage doubling. An oscillator

generating antiphase signals φ1 and φ2 controls switches S1, S2,

and S3, S4. During φ1, switches S1 and S2 are closed charging

C1 up to the voltage at V+. During φ2, S1 and S2 open and S3

and S4 close. With the voltage inverter configuration during φ2,

the positive terminal of C1 is connected to GND via S3 and the

negative terminal of C1 connects to V_OUTvia S4. The net result

is voltage inversion at V_OUTwrt GND. Charge on C1 is trans-

ferred to C2 during φ2. Capacitor C2 maintains this voltage

during φ1. The charge transfer efficiency depends on the on-

resistance of the switches, the frequency at which they are being

switched, and also on the equivalent series resistance (ESR) of

the external capacitors. The reason for this is explained in the

following section. For maximum efficiency, capacitors with low

ESR are, therefore, recommended.

The switched capacitor may, therefore, be replaced by an equivalent

resistance whose value is dependent on both the capacitor size

and the switching frequency. This explains why lower capacitor

values may be used with higher switching frequencies. It should

be remembered that as the switching frequency is increased the

power consumption will increase due to some charge being lost

at each switching cycle. As a result, at high frequencies, the power

efficiency starts decreasing. Other losses include the resistance

of the internal switches and the equivalent series resistance (ESR)

of the charge storage capacitors.

= 1/fC1

The voltage doubling configuration reverses some of the con-

nections, but the same principle applies.

Figure 4. Switched Capacitor Equivalent Circuit

REV.

–7–

ADM660/ADM8660

Inverting Negative Voltage Generator

Table II. ADM8660 Charge-Pump Frequency Selection

Figures 5 and 6 show the ADM660/ADM8660 configured to

generate a negative output voltage. Input supply voltages from

1.5 V up to 7 V are allowable. For supply voltage less than 3 V,

LV must be connected to GND. This bypasses the internal

regulator circuitry and gives best performance in low voltage

applications. With supply voltages greater than 3 V, LV may

be either connected to GND or left open. Leaving it open facili-

tates direct substitution for the ICL7660.

OSC

Charge Pump

C1, C2

GND

V+

Open

25 kHz

120 kHz

See Typical Characteristics

10 µF

2.2 µF

GND or V+ Ext Cap

GND

Ext CLK Ext CLK Frequency/2

+1.5V TO +7V

INPUT

CLK OSC

+1.5V TO +7V

INPUT

ADM660

ADM8660

CMOS GATE

V+

OSC

V+

OSC

CAP+

GND

ADM660

CAP+

GND

INVERTED

NEGATIVE

OUTPUT

10␮F

CAP–

INVERTED

NEGATIVE

OUTPUT

OUT

CAP–

OUT

10␮F

Figure 7. ADM660/ADM8660 External Oscillator

Figure 5. ADM660 Voltage Inverter Configuration

Voltage Doubling Configuration

Figure 8 shows the ADM660 configured to generate increased

output voltages. As in the inverting mode, only two external

capacitors are required. The doubling function is achieved by

reversing some connections to the device. The input voltage is

applied to the GND pin and V+ is used as the output. Input

voltages from 2.5 V to 7 V are allowable. In this configuration,

pins LV, OUT must be connected to GND.

+1.5V TO +7V

INPUT

V+

ADM8660

CAP+

GND

10␮F

INVERTED

NEGATIVE

OUTPUT

CAP–

OUT

SHUTDOWN

CONTROL

10␮F

The unloaded output voltage in this configuration is 2 (V_IN).

Output resistance and ripple are similar to the voltage inverting

configuration.

Figure 6. ADM8660 Voltage Inverter Configuration

OSCILLATOR FREQUENCY

Note that the ADM8660 cannot be used in the voltage

doubling configuration.

The internal charge-pump frequency may be selected to be

either 25 kHz or 120 kHz using the Frequency Control (FC)

input. With FC unconnected (ADM660) or connected to GND

(ADM8660), the internal charge pump runs at 25 kHz while, if

FC is connected to V+, the frequency is increased by a factor of

five. Increasing the frequency allows smaller capacitors to be

used for equivalent performance or, if the capacitor size is un-

changed, it results in lower output impedance and ripple.

DOUBLED

POSITIVE

OUTPUT

V+

OSC

ADM660

CAP+

10␮F

+2.5V

TO +7V

INPUT

10␮F

GND

CAP–

OUT

Figure 8. Voltage Doubler Configuration

If a charge-pump frequency other than the two fixed values is

desired, this is made possible by the OSC input, which can

either have a capacitor connected to it or be overdriven by an

external clock. Refer to the Typical Performance Characteris-

tics, which shows the variation in charge-pump frequency versus

capacitor size. The charge-pump frequency is one-half the oscil-

lator frequency applied to the OSC pin.

Shutdown Input

The ADM8660 contains a shutdown input that can be used to

disable the device and thus reduce the power consumption. A

logic high level on the SD input shuts the device down reducing

the quiescent current to 0.3 µA. During shutdown, the output

voltage goes to 0 V. Therefore, ground referenced loads are not

powered during this state. When exiting shutdown, it takes

several cycles (approximately 500 µs) for the charge pump to

reach its final value. If the shutdown function is not being used,

then SD should be hardwired to GND.

If an external clock is used to overdrive the oscillator, its levels

should swing to within 100 mV of V+ and GND. A CMOS

driver is, therefore, suitable. When OSC is overdriven, FC has

no effect but LV must be grounded.

Capacitor Selection

Note that overdriving is permitted only in the voltage inverter

configuration.

The optimum capacitor value selection depends the charge-pump

frequency. With 25 kHz selected, 10 µF capacitors are recommended,

while with 120 kHz selected, 2.2 µF capacitors may be used.

Other frequencies allow other capacitor values to be used. For

maximum efficiency in all cases, it is recommended that capaci-

tors with low ESR are used for the charge-pump. Low ESR

capacitors give both the lowest output resistance and lowest

ripple voltage. High output resistance degrades the overall power

efficiency and causes voltage drops, especially at high output

Table I. ADM660 Charge-Pump Frequency Selection

OSC

Charge Pump

C1, C2

Open

V+

Open

25 kHz

120 kHz

See Typical Characteristics

10 µF

2.2 µF

Open or V+ Ext Cap

Open

Ext CLK Ext CLK Frequency/2

REV.

–8–

ADM660/ADM8660

current levels. The ADM660/ADM8660 is tested using low

ESR, 10 µF, capacitors for both C1 and C2. Smaller values of

C1 increase the output resistance, while increasing C1 will

reduce the output resistance. The output resistance is also depen-

dent on the internal switches on resistance as well as the

capacitors ESR, so the effect of increasing C1 becomes negligible

past a certain point.

Capacitor C2

The output capacitor size C2 affects the output ripple. Increas-

ing the capacitor size reduces the peak-to-peak ripple. The ESR

affects both the output impedance and the output ripple.

Reducing the ESR reduces the output impedance and ripple.

For convenience it is recommended that both C1 and C2 be the

same value.

Figure 9 shows how the output resistance varies with oscillator

frequency for three different capacitor values. At low oscillator

frequencies, the output impedance is dominated by the 1/f_C

term. This explains why the output impedance is higher for

smaller capacitance values. At high oscillator frequencies, the

1/f_Cterm becomes insignificant and the output impedance is

dominated by the internal switches on resistance. From an out-

put impedance viewpoint, therefore, there is no benefit to be

gained from using excessively large capacitors.

Table III. Capacitor Selection

Charge-Pump

Frequency

Capacitor

C1, C2

25 kHz

120 kHz

10 µF

2.2 µF

Power Efficiency and Oscillator Frequency Trade-Off

While higher switching frequencies allow smaller capacitors to

be used for equivalent performance, or improved performance

with the same capacitors, there is a trade-off to consider. As the

oscillator frequency is increased, the quiescent current increases.

This happens as a result of a finite charge being lost at each

switching cycle. The charge loss per unit cycle at very high

frequencies can be significant, thereby reducing the power effi-

ciency. Since the power efficiency is also degraded at low oscillator

frequencies due to an increase in output impedance, this means

that there is an optimum frequency band for maximum power

transfer. Refer to the Typical Performance Characteristics section.

500

C1 = C2 = 2.2␮F

400

300

C1 = C2 = 1␮F

200

C1 = C2 = 10␮F

Bypass Capacitor

100

The ac impedance of the ADM660/ADM8660 may be reduced

by using a bypass capacitor on the input supply. This capacitor

should be connected between the input supply and GND. It

will provide instantaneous current surges as required. Suitable

capacitors of 0.1 µF or greater may be used.

0.1

100

OSCILLATOR FREQUENCY – kHz

Figure 9. Output Impedance vs. Oscillator Frequency

REV.

–9–

ADM660/ADM8660

OUTLINE DIMENSIONS

0.400 (10.16)

0.365 (9.27)

0.355 (9.02)

0.280 (7.11)

0.250 (6.35)

0.240 (6.10)

0.325 (8.26)

0.310 (7.87)

0.300 (7.62)

0.100 (2.54)

BSC

0.060 (1.52)

MAX

0.195 (4.95)

0.130 (3.30)

0.115 (2.92)

0.210 (5.33)

MAX

0.015

(0.38)

MIN

0.150 (3.81)

0.130 (3.30)

0.115 (2.92)

0.015 (0.38)

GAUGE

0.014 (0.36)

0.010 (0.25)

0.008 (0.20)

PLANE

SEATING

PLANE

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

0.430 (10.92)

MAX

0.005 (0.13)

MIN

0.070 (1.78)

0.060 (1.52)

0.045 (1.14)

COMPLIANT TO JEDEC STANDARDS MS-001

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.

Figure 10. 8-Lead Plastic Dual In-Line Package [PDIP]

Narrow Body

(N-8)

Dimensions shown in inches and (millimeters)

5.00 (0.1968)

4.80 (0.1890)

6.20 (0.2441)

5.80 (0.2284)

4.00 (0.1574)

3.80 (0.1497)

0.50 (0.0196)

0.25 (0.0099)

1.27 (0.0500)

BSC

45°

1.75 (0.0688)

1.35 (0.0532)

0.25 (0.0098)

0.10 (0.0040)

8°

0°

0.51 (0.0201)

0.31 (0.0122)

COPLANARITY

0.10

1.27 (0.0500)

0.40 (0.0157)

0.25 (0.0098)

0.17 (0.0067)

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS

(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR

REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

Figure 11. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body

(R-8)

Dimensions shown in millimeters and (inches)

–10–

REV. C

ADM660/ADM8660

5.10

5.00

4.90

4.50

4.40

4.30

6.40

BSC

PIN 1

1.20

MAX

0.15

0.05

0.20

0.09

0.75

0.60

0.45

8°

0°

0.30

0.19

0.65

BSC

SEATING

PLANE

COPLANARITY

0.10

COMPLIANT TO JEDEC STANDARDS MO-153-AB

Figure 12. 16-Lead Thin Shrink Small Outline Package [TSSOP]

(RU-16)

Dimensions shown in millimeters

ORDERING GUIDE

Model¹

ADM660ANZ

ADM660ARZ

ADM660ARZ-REEL

ADM660ARUZ

ADM660ARUZ-REEL

ADM660ARUZ-REEL7

ADM8660ANZ

ADM8660ARZ

ADM8660ARZ-REEL

Temperature Range

−40°C to +85°C

Package Description

Package Option

8-Lead Plastic Dual In-Line Package [PDIP]

N-8

R-8

RU-16

N-8

R-8

8-Lead Standard Small Outline Package [SOIC_N]

16-Lead Thin Shrink Small Outline Package [TSSOP]

8-Lead Plastic Dual In-Line Package [PDIP]

8-Lead Standard Small Outline Package [SOIC_N]

¹Z = RoHS Compliant Part

REVISION HISTORY

4/11—Rev. B to Rev. C

Changes to Ordering Guide .......................................................... 11

12/02—Rev. A to Rev. B

Renumbered TPCs and Figures........................................Universal

Edits to Specifications ...................................................................... 2

Updated Absolute Maximum Ratings ........................................... 3

Updated Outline Dimensions....................................................... 10

registered trademarks are the property of their respective owners.

D00082-0-4/11(C)

REV. C

–11–

ADM660ARZ相关文章

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ADM660ARZ产品参数

型号:	ADM660ARZ
Brand Name：	Analog Devices Inc
是否无铅：	含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	ANALOG DEVICES INC
零件包装代码：	SOIC
包装说明：	ROHS COMPLIANT, MS-012AA, SOIC-8
针数：	8
制造商包装代码：	R-8
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
风险等级：	0.83
Samacsys Confidence：	3
Samacsys Status：	Released
Samacsys PartID：	321795
Samacsys Pin Count：	8
Samacsys Part Category：	Integrated Circuit
Samacsys Package Category：	Small Outline Packages
Samacsys Footprint Name：	R-8
Samacsys Released Date：	2017-01-11 11:21:59
Is Samacsys：	N
模拟集成电路 - 其他类型：	SWITCHED CAPACITOR CONVERTER
控制模式：	VOLTAGE-MODE
最大输入电压：	7 V
最小输入电压：	1.5 V
标称输入电压：	5 V
JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3
长度：	4.9 mm
湿度敏感等级：	1
功能数量：	1
端子数量：	8
最高工作温度：	85 °C
最低工作温度：	-40 °C
最大输出电流：	0.1 A
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装等效代码：	SOP8,.25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified
座面最大高度：	1.75 mm
子类别：	Other Analog ICs
最大供电电流 (Isup)：	4.5 mA
表面贴装：	YES
切换器配置：	DOUBLER INVERTER
最大切换频率：	120 kHz
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn)
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	30
宽度：	3.9 mm
Base Number Matches：	1

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