Data Sheet BTS660P
Pin
Symbol
Function
Output to the load. The pins 1,2,6 and 7 must be shorted with each other
1
2
OUT
O
O
especially in high current applications! 3
)
OUT
IN
Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications! 3)
3
4
I
Input, activates the power switch in case of short to ground
Positive power supply voltage, the tab is electrically connected to this pin.
V
bb
+
In high current applications the tab should be used for the V connection
bb
4
)
instead of this pin
.
Diagnostic feedback providing a sense current proportional to the load
current; zero current on failure (see Truth Table on page 7)
5
6
7
IS
S
O
O
Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications! 3)
OUT
OUT
Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications! 3)
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Symbol
Values
Unit
V
Supply voltage (over voltage protection see page 4)
Vbb
Vbb
62
58
Supply voltage for full short circuit protection,
(EAS limitation see diagram on page 10)
V
Tj,start =-40 ...+150°C:
Load current (short circuit current, see page 5)
Load dump protection VLoadDump =UA +Vs, UA =13.5V
RI =2Ω, RL =0.23Ω, td =200ms,
IL
self-limited
80
A
V
5
6
)
)
VLoad dump
IN, IS= open or grounded
Operating temperature range
Storage temperature range
Power dissipation (DC), TC ≤ 25 °C
Tj
Tstg
Ptot
-40 ...+150
-55 ...+150
°C
W
170
Inductive load switch-off energy dissipation, single pulse
Vbb =12V, Tj,start =150°C, TC =150°C const.,
IL = 20 A, ZL = 6mH, 0Ω, see diagrams on page 10
1.2
4.0
J
EAS
Electrostatic discharge capability (ESD)
Human Body Model acc. MIL-STD883D, method 3015.7 and ESD
assn. std. S5.1-1993, C = 100 pF, R = 1.5 kΩ
VESD
kV
Current through input pin (DC)
Current through current sense status pin (DC)
see internal circuit diagrams on page 7 and 8
IIN
IIS
+15, -250
+15, -250
mA
3
)
Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current
capability and decrease the current sense accuracy
Otherwise add up to 0.7 mΩ (depending on used length of the pin) to the RON if the pin is used instead of
the tab.
RI = internal resistance of the load dump test pulse generator.
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.
4
)
5
6
)
)
Infineon Technologies AG
Page 2
2003-Oct-01