CA3083
Absolute Maximum Ratings
The following ratings apply for each transistor in the device:
Thermal Information
Thermal Resistance (Typical, Note 2)
PDIP Package . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . .
θ
(°C/W)
135
200
θ
(°C/W)
N/A
N/A
JA
JC
Collector-to-Emitter Voltage, V
Collector-to-Base Voltage, V
. . . . . . . . . . . . . . . . . . . . . . 15V
. . . . . . . . . . . . . . . . . . . . . . . . 20V
CEO
CBO
Collector-to-Substrate Voltage, V
(Note 1). . . . . . . . . . . . . . 20V
Maximum Power Dissipation (Any One Transistor). . . . . . . 500mW
Maximum Junction Temperature (Plastic Package) . . . . . . . 150°C
Maximum Storage Temperature Range . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300°C
(SOIC - Lead Tips Only)
CIO
Emitter-to-Base Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . 5V
EBO
Collector Current (I ). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
C
Base Current (I ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
B
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . .-55°C to 125°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of the CA3083 is isolated from the substrate by an integral diode. The substrate must be connected to a voltage
which is more negative than any collector voltage in order to maintain isolation between transistors and provide normal transistor action. To
avoid undesired coupling between transistors, the substrate Terminal (5) should be maintained at either DC or signal (AC) ground. A suitable
bypass capacitor can be used to establish a signal ground.
2. θ is measured with the component mounted on an evaluation PC board in free air.
JA
Electrical Specifications For Equipment Design, T = 25°C
A
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
FOR EACH TRANSISTOR
Collector-to-Base Breakdown Voltage
Collector-to-Emitter Breakdown Voltage
Collector-to-Substrate Breakdown Voltage
Emitter-to-Base Breakdown Voltage
Collector-Cutoff-Current
V
V
I
I
I
I
= 100µA, I = 0
20
15
20
5
60
24
-
V
V
(BR)CBO
(BR)CEO
C
C
CI
E
E
= 1mA, I = 0
-
B
V
= 100µA, I = 0, I = 0
60
-
V
(BR)CIO
(BR)EBO
B
E
V
= 500µA, I = 0
6.9
-
-
V
C
I
I
V
V
V
= 10V, I = 0
-
10
µA
µA
CEO
CBO
CE
CB
CE
B
Collector-Cutoff-Current
= 10V, I = 0
E
-
-
1
DC Forward-Current Transfer Ratio (Note 3) (Figure 1)
h
= 3V
I
I
= 10mA
= 50mA
40
40
0.65
-
76
-
-
FE
C
C
75
Base-to-Emitter Voltage (Figure 2)
Collector-to-Emitter Saturation Voltage (Figures 3, 4)
Gain Bandwidth Product
V
V
= 3V, I = 10mA
0.74
0.40
450
0.85
0.70
-
V
V
BE
CE
C
V
I = 50mA, I = 5mA
C B
CE SAT
f
V
= 3V, I = 10mA
-
MHz
T
CE
C
FOR TRANSISTORS Q AND Q (As a Differential Amplifier)
1
2
Absolute Input Offset Voltage (Figure 6)
Absolute Input Offset Current (Figure 7)
|V
|
V
V
= 3V, I = 1mA
-
-
1.2
0.7
5
mV
IO
CE
CE
C
|I
|
= 3V, I = 1mA
2.5
µA
IO
C
NOTE:
3. Actual forcing current is via the emitter for this test.
FN481.6
February 7, 2006
2