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  • 北京元坤伟业科技有限公司

         该会员已使用本站17年以上

  • CA3140AMZ96
  • 数量-
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  • 010-62104931、62106431、62104891、62104791 QQ:857273081QQ:1594462451
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  • CA3140AMZ96图
  • 深圳市正纳电子有限公司

     该会员已使用本站15年以上
  • CA3140AMZ96 现货库存
  • 数量20800 
  • 厂家INTERSIL 
  • 封装SOP8 
  • 批号21+ 
  • 原装现货 欢迎咨询0755- 83790645
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  • 深圳市恒达亿科技有限公司

     该会员已使用本站12年以上
  • CA3140AMZ96 现货库存
  • 数量4200 
  • 厂家INTERSIL 
  • 封装SOP8 
  • 批号23+ 
  • 原装现货公司特价销售!
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  • 深圳市广百利电子有限公司

     该会员已使用本站6年以上
  • CA3140AMZ96 现货库存
  • 数量18500 
  • 厂家Renesas(瑞萨) 
  • 封装 
  • 批号23+ 
  • ★★全网低价,原装原包★★
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  • CA3140AMZ96图
  • 深圳市能元时代电子有限公司

     该会员已使用本站10年以上
  • CA3140AMZ96 现货库存
  • 数量92000 
  • 厂家RENESAS/瑞萨 
  • 封装SOIC8 
  • 批号24+ 
  • 原装现货假一罚十!可含税长期供货
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  • 0755-84502810 QQ:2885637848QQ:2885658492
  • CA3140AMZ96图
  • 集好芯城

     该会员已使用本站13年以上
  • CA3140AMZ96 现货库存
  • 数量29107 
  • 厂家Intersil(英特矽尔) 
  • 封装 
  • 批号22+ 
  • 原装原厂现货
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  • 0755-83239307 QQ:3008092965QQ:3008092965
  • CA3140AMZ96图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • CA3140AMZ96 现货库存
  • 数量12500 
  • 厂家Intersil 
  • 封装2500 
  • 批号2023+ 
  • 绝对原装正品现货/优势渠道商、原盘原包原盒
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  • 深圳市宗天技术开发有限公司

     该会员已使用本站10年以上
  • CA3140AMZ96 现货库存
  • 数量17500 
  • 厂家RENESAS 
  • 封装SOP8 
  • 批号20+21+ 
  • 保证原装假一罚十
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  • CA3140AMZ96图
  • 上海意淼电子科技有限公司

     该会员已使用本站14年以上
  • CA3140AMZ96 现货库存
  • 数量20000 
  • 厂家INTERSIL 
  • 封装SOP 
  • 批号23+ 
  • 原装现货热卖!请联系吴先生 13681678667
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  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • CA3140AMZ96 现货库存
  • 数量26800 
  • 厂家RENESAS 
  • 封装SOP8 
  • 批号22+ 
  • 新到现货、一手货源、当天发货、bom配单
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  • 0755-84507451 QQ:1435424310
  • CA3140AMZ96图
  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • CA3140AMZ96 现货库存
  • 数量30000 
  • 厂家RENESAS 
  • 封装SOP8 
  • 批号22+ 
  • 新到现货、一手货源、当天发货、bom配单
  • QQ:2881512844QQ:2881512844 复制
  • 075584507705 QQ:2881512844
  • CA3140AMZ96图
  • 深圳市凯睿晟科技有限公司

     该会员已使用本站10年以上
  • CA3140AMZ96 现货热卖
  • 数量2500 
  • 厂家RENESAS/瑞萨 
  • 封装 
  • 批号2024+ 
  • 凯睿晟只做全新原装正品 实单可谈
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  • 0755-23616725 QQ:2885648621
  • CA3140AMZ96图
  • 深圳市拓森弘电子有限公司

     该会员已使用本站1年以上
  • CA3140AMZ96
  • 数量5300 
  • 厂家Intersil(英特矽尔) 
  • 封装 
  • 批号21+ 
  • 全新原装正品,库存现货实报
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  • 13714410484 QQ:1300774727
  • CA3140AMZ96图
  • 深圳市恒达亿科技有限公司

     该会员已使用本站12年以上
  • CA3140AMZ96
  • 数量4200 
  • 厂家INTERSIL 
  • 封装SOP8 
  • 批号23+ 
  • 全新原装公司现货销售!
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  • CA3140AMZ96图
  • 深圳市正纳电子有限公司

     该会员已使用本站15年以上
  • CA3140AMZ96
  • 数量26700 
  • 厂家Intersil(英特矽尔) 
  • 封装▊原厂封装▊ 
  • 批号▊ROHS环保▊ 
  • 十年以上分销商原装进口件服务型企业0755-83790645
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  • 深圳市羿芯诚电子有限公司

     该会员已使用本站7年以上
  • CA3140AMZ96
  • 数量5660 
  • 厂家RENESAS/瑞萨 
  • 封装原厂封装 
  • 批号新年份 
  • 羿芯诚只做原装,原厂渠道,价格优势可谈!
  • QQ:2853992132QQ:2853992132 复制
  • 0755-82570683 QQ:2853992132
  • CA3140AMZ96图
  • 绿盛电子(香港)有限公司

     该会员已使用本站12年以上
  • CA3140AMZ96
  • 数量26976 
  • 厂家INTERSIL 
  • 封装SOP8 
  • 批号2018+ 
  • ★★代理原装现货,特价热卖!★★
  • QQ:2752732883QQ:2752732883 复制
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  • 0755-25165869 QQ:2752732883QQ:240616963
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  • 千层芯半导体(深圳)有限公司

     该会员已使用本站9年以上
  • CA3140AMZ96
  • 数量5000 
  • 厂家HAR 
  • 封装SOP 
  • 批号2017+ 
  • 原装进口现货假一赔十
  • QQ:2685694974QQ:2685694974 复制
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  • 深圳市赛尔通科技有限公司

     该会员已使用本站12年以上
  • CA3140AMZ96
  • 数量65400 
  • 厂家INTERSIL 
  • 封装SOP 
  • 批号NEW 
  • 【◆全新原装现货◆绝对价格优势◆质量保证◆】
  • QQ:1134344845QQ:1134344845 复制
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  • 86-0755-83536093 QQ:1134344845QQ:847984313
  • CA3140AMZ96图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站15年以上
  • CA3140AMZ96
  • 数量26800 
  • 厂家INTERSIL 
  • 封装SOIC-8 
  • 批号24+ 
  • 假一罚十,原装进口正品现货供应,价格优势。
  • QQ:198857245QQ:198857245 复制
  • 0755-82865294 QQ:198857245
  • CA3140AMZ96图
  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • CA3140AMZ96
  • 数量13250 
  • 厂家INTERSIL 
  • 封装NA/ 
  • 批号23+ 
  • 原装现货,当天可交货,原型号开票
  • QQ:3007977934QQ:3007977934 复制
    QQ:3007947087QQ:3007947087 复制
  • 0755-82546830 QQ:3007977934QQ:3007947087
  • CA3140AMZ96图
  • 深圳市能元时代电子有限公司

     该会员已使用本站10年以上
  • CA3140AMZ96
  • 数量92000 
  • 厂家RENESAS/瑞萨 
  • 封装SOIC8 
  • 批号24+ 
  • 原装现货假一罚十!可含税长期供货
  • QQ:2885637848QQ:2885637848 复制
    QQ:2885658492QQ:2885658492 复制
  • 0755-84502810 QQ:2885637848QQ:2885658492
  • CA3140AMZ96图
  • 集好芯城

     该会员已使用本站13年以上
  • CA3140AMZ96
  • 数量13397 
  • 厂家INTERSIL 
  • 封装SOP8 
  • 批号最新批次 
  • 原装原厂 现货现卖
  • QQ:3008092965QQ:3008092965 复制
    QQ:3008092965QQ:3008092965 复制
  • 0755-83239307 QQ:3008092965QQ:3008092965
  • CA3140AMZ96图
  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • CA3140AMZ96
  • 数量42048 
  • 厂家RENESAS 
  • 封装SOP8 
  • 批号23+ 
  • 原厂可订货,技术支持,直接渠道。可签保供合同
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    QQ:3007947087QQ:3007947087 复制
  • 0755-83061789 QQ:3007947087QQ:3007947087
  • CA3140AMZ96图
  • 深圳市毅创腾电子科技有限公司

     该会员已使用本站16年以上
  • CA3140AMZ96
  • 数量19994 
  • 厂家INTERSIL 
  • 封装SOP8 
  • 批号22+ 
  • ★只做原装★正品现货★原盒原标★
  • QQ:2355507165QQ:2355507165 复制
    QQ:2355507162QQ:2355507162 复制
  • 86-0755-83210909 QQ:2355507165QQ:2355507162
  • CA3140AMZ96图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • CA3140AMZ96
  • 数量85000 
  • 厂家INTERSIL 
  • 封装SMD 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
  • QQ:2881495753QQ:2881495753 复制
  • 0755-23605827 QQ:2881495753
  • CA3140AMZ96图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • CA3140AMZ96
  • 数量12500 
  • 厂家INTERSIL 
  • 封装 
  • 批号2023+ 
  • 绝对原装全新正品现货/优势渠道商、原盘原包原盒
  • QQ:364510898QQ:364510898 复制
    QQ:515102657QQ:515102657 复制
  • 0755-83777708“进口原装正品专供” QQ:364510898QQ:515102657
  • CA3140AMZ96图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • CA3140AMZ96
  • 数量12500 
  • 厂家INTERSIL 
  • 封装SOIC-8 
  • 批号2023+ 
  • 绝对原装正品全新深圳进口现货,优质渠道供应商!
  • QQ:1002316308QQ:1002316308 复制
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  • 美驻深办0755-83777708“进口原装正品专供” QQ:1002316308QQ:515102657
  • CA3140AMZ96图
  • 深圳市湘达电子有限公司

     该会员已使用本站10年以上
  • CA3140AMZ96
  • 数量6600 
  • 厂家RENESAS/瑞萨 
  • 封装8SOIC 
  • 批号20+ 
  • 原盒原装原标签,市场最低价。
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  • 0755-83229772 QQ:215672808
  • CA3140AMZ96图
  • 北京齐天芯科技有限公司

     该会员已使用本站15年以上
  • CA3140AMZ96
  • 数量14950 
  • 厂家INTERSIL 
  • 封装SOP 
  • 批号2024+ 
  • 原装正品,假一罚十
  • QQ:2880824479QQ:2880824479 复制
    QQ:1344056792QQ:1344056792 复制
  • 010-62104931 QQ:2880824479QQ:1344056792
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  • 深圳市宏世佳电子科技有限公司

     该会员已使用本站13年以上
  • CA3140AMZ96
  • 数量4825 
  • 厂家INTERSIL 
  • 封装SOP8 
  • 批号2023+ 
  • 全新原厂原装产品、公司现货销售
  • QQ:2881894392QQ:2881894392 复制
    QQ:2881894393QQ:2881894393 复制
  • 0755- QQ:2881894392QQ:2881894393
  • CA3140AMZ96图
  • 上海磐岳电子有限公司

     该会员已使用本站11年以上
  • CA3140AMZ96
  • 数量5800 
  • 厂家INTERSIL 
  • 封装SOP-8 
  • 批号2024+ 
  • 全新原装现货,杜绝假货。
  • QQ:3003653665QQ:3003653665 复制
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  • 021-60341766 QQ:3003653665QQ:1325513291
  • CA3140AMZ96图
  • 深圳市欧立现代科技有限公司

     该会员已使用本站12年以上
  • CA3140AMZ96
  • 数量5369 
  • 厂家INTERSI 
  • 封装SOP8 
  • 批号24+ 
  • 全新原装现货,欢迎询购!
  • QQ:1950791264QQ:1950791264 复制
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  • 0755-83222787 QQ:1950791264QQ:221698708
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  • 深圳市宏诺德电子科技有限公司

     该会员已使用本站8年以上
  • CA3140AMZ96
  • 数量68000 
  • 厂家INTERSIL 
  • 封装SOP8 
  • 批号22+ 
  • 全新进口原厂原装,优势现货库存,有需要联系电话:18818596997 QQ:84556259
  • QQ:84556259QQ:84556259 复制
    QQ:783839662QQ:783839662 复制
  • 0755- QQ:84556259QQ:783839662
  • CA3140AMZ96图
  • 深圳市惊羽科技有限公司

     该会员已使用本站11年以上
  • CA3140AMZ96
  • 数量9328 
  • 厂家RENESAS-瑞萨. 
  • 封装SOP-8.贴片 
  • 批号▉▉:2年内 
  • ▉▉¥8.3元一有问必回一有长期订货一备货HK仓库
  • QQ:43871025QQ:43871025 复制
  • 131-4700-5145---Q-微-恭-候---有-问-秒-回 QQ:43871025
  • CA3140AMZ96图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • CA3140AMZ96
  • 数量98500 
  • 厂家INTER原装现货 
  • 封装SOP-8 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
  • QQ:2881495751QQ:2881495751 复制
  • 0755-88917743 QQ:2881495751
  • CA3140AMZ96图
  • 北京元坤伟业科技有限公司

     该会员已使用本站17年以上
  • CA3140AMZ96
  • 数量5000 
  • 厂家INTERSIL 
  • 封装SOP8 
  • 批号2024+ 
  • 百分百原装正品,现货库存
  • QQ:857273081QQ:857273081 复制
    QQ:1594462451QQ:1594462451 复制
  • 010-62104931 QQ:857273081QQ:1594462451
  • CA3140AMZ96图
  • HECC GROUP CO.,LIMITED

     该会员已使用本站17年以上
  • CA3140AMZ96
  • 数量1200 
  • 厂家INTERSIL 
  • 封装SOP 
  • 批号2021+ 
  • 原装假一赔十!可提供正规渠道证明!
  • QQ:3003818780QQ:3003818780 复制
    QQ:3003819484QQ:3003819484 复制
  • 755-83950019 QQ:3003818780QQ:3003819484
  • CA3140AMZ96图
  • 深圳市美思瑞电子科技有限公司

     该会员已使用本站12年以上
  • CA3140AMZ96
  • 数量12245 
  • 厂家INTERSIL 
  • 封装SOP 
  • 批号22+ 
  • 现货,原厂原装假一罚十!
  • QQ:2885659458QQ:2885659458 复制
    QQ:2885657384QQ:2885657384 复制
  • 0755-83952260 QQ:2885659458QQ:2885657384
  • CA3140AMZ96图
  • 万三科技(深圳)有限公司

     该会员已使用本站2年以上
  • CA3140AMZ96
  • 数量660000 
  • 厂家RENESAS(瑞萨)/IDT 
  • 封装SOIC-8 
  • 批号23+ 
  • 支持实单/只做原装
  • QQ:3008961398QQ:3008961398 复制
  • 0755-21006672 QQ:3008961398
  • CA3140AMZ96图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • CA3140AMZ96
  • 数量12500 
  • 厂家Intersil 
  • 封装2500 
  • 批号2023+ 
  • 绝对原装正品现货/优势渠道商、原盘原包原盒
  • QQ:1002316308QQ:1002316308 复制
    QQ:515102657QQ:515102657 复制
  • 深圳分公司0755-83777708“进口原装正品专供” QQ:1002316308QQ:515102657

产品型号CA3140AMZ96的概述

CA3140AMZ96芯片概述 CA3140AMZ96是一款高性能的运算放大器,广泛应用于模拟信号处理、信号调理、模拟计算和其他电子电路中。该芯片具有高输入阻抗和宽频带特性,可以在多种系统中提供出色的线性性能。设计上,CA3140AMZ96融合了MOSFET输入技术与经典的运算放大器设计理念,这使得其适应性和通用性非常强。 CA3140AMZ96详细参数 CA3140AMZ96的关键规格包括: - 输入电压范围:±15V - 电源电压范围:±3V 至 ±22V - 增益带宽积:1MHz(典型值) - 输入阻抗:10^12Ω(典型值) - 输出电流:最大100mA - 总谐波失真:0.01% - 温度范围:-40°C 至 +85°C - 封装类型:SOIC-8 除了上述参数外,该芯片的输入失调电压通常在2mV到10mV范围内,输出电压摆幅接近于电源电压的极限,这对于精确的信号处理尤为重要...

产品型号CA3140AMZ96的Datasheet PDF文件预览

CA3140, CA3140A  
®
Data Sheet  
July 11, 2005  
FN957.10  
4.5MHz, BiMOS Operational Amplifier with  
MOSFET Input/Bipolar Output  
Features  
• MOSFET Input Stage  
- Very High Input Impedance (Z ) -1.5T(Typ)  
The CA3140A and CA3140 are integrated circuit operational  
amplifiers that combine the advantages of high voltage  
PMOS transistors with high voltage bipolar transistors on a  
single monolithic chip.  
IN  
- Very Low Input Current (I ) -10pA (Typ) at ±15V  
l
- Wide Common Mode Input Voltage Range (V ) - Can be  
lCR  
Swung 0.5V Below Negative Supply Voltage Rail  
- Output Swing Complements Input Common Mode  
Range  
The CA3140A and CA3140 BiMOS operational amplifiers  
feature gate protected MOSFET (PMOS) transistors in the  
input circuit to provide very high input impedance, very low  
input current, and high speed performance. The CA3140A  
and CA3140 operate at supply voltage from 4V to 36V  
(either single or dual supply). These operational amplifiers  
are internally phase compensated to achieve stable  
operation in unity gain follower operation, and additionally,  
have access terminal for a supplementary external capacitor  
if additional frequency roll-off is desired. Terminals are also  
provided for use in applications requiring input offset voltage  
nulling. The use of PMOS field effect transistors in the input  
stage results in common mode input voltage capability down  
to 0.5V below the negative supply terminal, an important  
attribute for single supply applications. The output stage  
uses bipolar transistors and includes built-in protection  
against damage from load terminal short circuiting to either  
supply rail or to ground.  
• Directly Replaces Industry Type 741 in Most Applications  
Pb-Free Plus Anneal Available (RoHS Compliant)  
Applications  
• Ground-Referenced Single Supply Amplifiers in  
Automobile and Portable Instrumentation  
• Sample and Hold Amplifiers  
• Long Duration Timers/Multivibrators  
(µseconds-Minutes-Hours)  
• Photocurrent Instrumentation  
• Peak Detectors  
• Active Filters  
• Comparators  
• Interface in 5V TTL Systems and Other Low  
Supply Voltage Systems  
The CA3140A and CA3140 are intended for operation at supply  
voltages up to 36V (±18V).  
• All Standard Operational Amplifier Applications  
• Function Generators  
Tone Controls  
• Power Supplies  
• Portable Instruments  
• Intrusion Alarm Systems  
Pinout  
CA3140 (PDIP, SOIC)  
TOP VIEW  
OFFSET  
NULL  
1
2
8
7
6
5
STROBE  
V+  
INV. INPUT  
-
+
NON-INV.  
INPUT  
3
4
OUTPUT  
OFFSET  
NULL  
V-  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
Copyright Harris Corporation 1998, Copyright Intersil Americas Inc. 2002, 2004, 2005. All Rights Reserved  
All other trademarks mentioned are the property of their respective owners.  
CA3140, CA3140A  
Ordering Information  
PART NUMBER  
(BRAND)  
TEMP.  
RANGE (°C)  
PKG.  
DWG. #  
PACKAGE  
CA3140AE  
-55 to 125 8 Ld PDIP  
E8.3  
E8.3  
CA3140AEZ*  
(See Note)  
-55 to 125 8 Ld PDIP  
(Pb-free)  
CA3140AM  
(3140A)  
-55 to 125 8 Ld SOIC  
M8.15  
CA3140AM96  
(3140A)  
-55 to 125 8 Ld SOIC Tape and Reel  
CA3140AMZ  
(3140A) (See Note)  
-55 to 125 8 Ld SOIC  
(Pb-free)  
M8.15  
CA3140AMZ96  
(3140A) (See Note)  
-55 to 125 8 Ld SOIC Tape and Reel  
(Pb-free)  
CA3140E  
-55 to 125 8 Ld PDIP  
E8.3  
E8.3  
CA3140EZ*  
(See Note)  
-55 to 125 8 Ld PDIP  
(Pb-free)  
CA3140M  
(3140)  
-55 to 125 8 Ld SOIC  
M8.15  
CA3140M96  
(3140)  
-55 to 125 8 Ld SOIC Tape and Reel  
CA3140MZ  
(3140) (See Note)  
-55 to 125 8 Ld SOIC  
(Pb-free)  
M8.15  
CA3140MZ96  
(3140) (See Note)  
-55 to 125 8 Ld SOIC Tape and Reel  
(Pb-free)  
*Pb-free PDIPs can be used for through hole wave solder  
processing only. They are not intended for use in Reflow solder  
processing applications.  
NOTE: Intersil Pb-free products employ special Pb-free material  
sets; molding compounds/die attach materials and 100% matte tin  
plate termination finish, which are RoHS compliant and compatible  
with both SnPb and Pb-free soldering operations. Intersil Pb-free  
products are MSL classified at Pb-free peak reflow temperatures  
that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-  
020.  
FN957.10  
2
July 11, 2005  
CA3140, CA3140A  
Absolute Maximum Ratings  
Thermal Information  
o
o
DC Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . 36V  
Differential Mode Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . 8V  
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) To (V- -0.5V)  
Input Terminal Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA  
Output Short Circuit Duration(Note 2) . . . . . . . . . . . . . . Indefinite  
Thermal Resistance (Typical, Note 1)  
PDIP Package*. . . . . . . . . . . . . . . . . . .  
SOIC Package . . . . . . . . . . . . . . . . . . .  
θ
( C/W)  
θ
( C/W)  
JA  
JC  
115  
165  
N/A  
N/A  
o
Maximum Junction Temperature (Plastic Package) . . . . . . . 150 C  
Maximum Storage Temperature Range. . . . . . . . . . -65 C to 150 C  
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300 C  
o
o
o
Operating Conditions  
(SOIC - Lead Tips Only)  
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C  
*Pb-free PDIPs can be used for through hole wave solder process-  
ing only. They are not intended for use in Reflow solder processing  
applications.  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the  
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTES:  
1. θ is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details  
JA  
2. Short circuit may be applied to ground or to either supply.  
o
Electrical Specifications  
V
= ±15V, T = 25 C  
SUPPLY  
A
TYPICAL VALUES  
PARAMETER  
SYMBOL  
TEST CONDITIONS  
Typical Value of Resistor  
CA3140 CA3140A  
UNITS  
Input Offset Voltage Adjustment Resistor  
4.7  
18  
kΩ  
Between Terminals 4 and 5 or 4 and 1 to  
Adjust Max V  
IO  
Input Resistance  
Input Capacitance  
Output Resistance  
R
C
1.5  
4
1.5  
4
TΩ  
pF  
I
I
R
60  
48  
60  
48  
O
N
Equivalent Wideband Input Noise Voltage  
(See Figure 27)  
e
BW = 140kHz, R = 1MΩ  
µV  
S
Equivalent Input Noise Voltage (See Figure 35)  
e
R
= 100Ω  
f = 1kHz  
f = 10kHz  
Source  
Sink  
40  
12  
40  
18  
4.5  
9
40  
12  
40  
18  
4.5  
9
nV/Hz  
nV/Hz  
mA  
N
S
Short Circuit Current to Opposite Supply  
I
+
OM  
I
-
mA  
OM  
Gain-Bandwidth Product, (See Figures 6, 30)  
Slew Rate, (See Figure 31)  
f
MHz  
V/µs  
µA  
T
SR  
Sink Current From Terminal 8 To Terminal 4 to  
Swing Output Low  
220  
220  
Transient Response (See Figure 28)  
t
R
C
= 2kΩ  
= 100pF  
Rise Time  
Overshoot  
To 1mV  
0.08  
10  
0.08  
10  
µs  
%
r
L
L
OS  
Settling Time at 10V , (See Figure 5)  
P-P  
t
R
C
= 2kΩ  
= 100pF  
4.5  
1.4  
4.5  
1.4  
µs  
µs  
S
L
L
To 10mV  
Voltage Follower  
o
Electrical Specifications  
For Equipment Design, at V  
= ±15V, T = 25 C, Unless Otherwise Specified  
SUPPLY A  
CA3140  
TYP  
5
CA3140A  
PARAMETER  
Input Offset Voltage  
Input Offset Current  
Input Current  
SYMBOL  
MIN  
MAX  
15  
MIN  
TYP  
2
MAX  
UNITS  
mV  
|V  
|
-
-
-
-
-
-
5
IO  
|I  
|
0.5  
30  
0.5  
10  
20  
40  
pA  
IO  
I
10  
50  
pA  
I
FN957.10  
3
July 11, 2005  
CA3140, CA3140A  
o
Electrical Specifications  
For Equipment Design, at V  
= ±15V, T = 25 C, Unless Otherwise Specified (Continued)  
SUPPLY A  
CA3140  
CA3140A  
PARAMETER  
SYMBOL  
MIN  
20  
86  
-
TYP  
MAX  
MIN  
20  
86  
-
TYP  
MAX  
UNITS  
kV/V  
dB  
Large Signal Voltage Gain (Note 3)  
(See Figures 6, 29)  
A
100  
-
100  
-
OL  
100  
-
100  
-
Common Mode Rejection Ratio  
(See Figure 34)  
CMRR  
32  
320  
32  
320  
µV/V  
dB  
70  
-15  
-
90  
-
70  
-15  
-
90  
-
Common Mode Input Voltage Range (See Figure 8)  
Power-Supply Rejection Ratio,  
V /V (See Figure 36)  
IO  
V
-15.5 to +12.5  
11  
-15.5 to +12.5  
12  
V
ICR  
PSRR  
100  
80  
150  
100  
80  
150  
µV/V  
dB  
S
76  
+12  
-14  
-
-
76  
+12  
-14  
-
-
Max Output Voltage (Note 4)  
(See Figures 2, 8)  
V
+
13  
-
13  
-
V
OM  
V
-
-14.4  
4
-
6
-14.4  
4
-
6
V
OM  
Supply Current (See Figure 32)  
Device Dissipation  
I+  
mA  
mW  
P
-
120  
8
180  
-
-
120  
6
180  
-
D
o
Input Offset Voltage Temperature Drift  
NOTES:  
V /T  
IO  
-
-
µV/ C  
3. At V = 26V  
, +12V, -14V and R = 2k.  
L
O
P-P  
4. At R = 2k.  
L
o
Electrical Specifications For Design Guidance At V+ = 5V, V- = 0V, T = 25 C  
A
TYPICAL VALUES  
PARAMETER  
SYMBOL  
|V  
CA3140  
CA3140A  
2
UNITS  
Input Offset Voltage  
Input Offset Current  
Input Current  
|
5
0.1  
2
mV  
pA  
IO  
|I  
|
0.1  
2
IO  
I
pA  
I
Input Resistance  
R
1
1
TΩ  
kV/V  
dB  
I
Large Signal Voltage Gain (See Figures 6, 29)  
Common Mode Rejection Ratio  
A
100  
100  
32  
90  
-0.5  
2.6  
100  
80  
3
100  
100  
32  
OL  
CMRR  
µV/V  
dB  
90  
Common Mode Input Voltage Range (See Figure 8)  
Power Supply Rejection Ratio  
V
-0.5  
2.6  
100  
80  
V
ICR  
V
PSRR  
V /V  
µV/V  
dB  
IO  
S
Maximum Output Voltage (See Figures 2, 8)  
Maximum Output Current:  
V
+
3
V
OM  
V
-
0.13  
10  
1
0.13  
10  
V
OM  
Source  
Sink  
I
+
mA  
mA  
V/µs  
MHz  
mA  
mW  
µA  
OM  
I
-
1
OM  
Slew Rate (See Figure 31)  
SR  
7
7
Gain-Bandwidth Product (See Figure 30)  
Supply Current (See Figure 32)  
f
3.7  
1.6  
8
3.7  
1.6  
8
T
I+  
Device Dissipation  
P
D
Sink Current from Terminal 8 to Terminal 4 to Swing Output Low  
200  
200  
FN957.10  
July 11, 2005  
4
CA3140, CA3140A  
Block Diagram  
2mA  
4mA  
V+  
7
BIAS CIRCUIT  
CURRENT SOURCES  
AND REGULATOR  
200µA  
1.6mA  
200µA  
2µA 2mA  
A 1  
+
3
A ≈  
10,000  
INPUT  
OUTPUT  
A 10  
6
4
-
2
C
1
12pF  
V-  
STROBE  
5
1
8
OFFSET  
NULL  
Schematic Diagram  
BIAS CIRCUIT  
INPUT STAGE  
SECOND STAGE  
OUTPUT STAGE DYNAMIC CURRENT SINK  
7
V+  
D
1
D
7
R
13  
5K  
Q
Q
3
R
20  
9
Q
Q
Q
1
2
5
50Ω  
D
8
R
10  
Q
4
1K  
R
Q
14  
6
20K  
R
12  
12K  
Q
R
20Ω  
19  
11  
Q
7
Q
21  
Q
17  
R
8K  
1
R
Q
8
8
1K  
Q
18  
6
OUTPUT  
D
2
D
D
3
4
D
5
INVERTING  
INPUT  
2
3
-
Q
Q
10  
9
+
NON-INVERTING  
INPUT  
C
1
R
R
3
2
500Ω  
500Ω  
12pF  
Q
Q
16  
14  
Q
15  
Q
13  
Q
Q
12  
D
11  
6
R
R
R
R
7
4
5
6
500Ω  
500Ω  
50Ω  
30Ω  
5
1
8
4
OFFSET NULL  
STROBE  
V-  
NOTE: All resistance values are in ohms.  
FN957.10  
July 11, 2005  
5
CA3140, CA3140A  
When the CA3140 is operating such that output Terminal 6 is  
Application Information  
Circuit Description  
sinking current to the V- bus, transistor Q is the current  
16  
sinking element. Transistor Q is mirror connected to D , R ,  
16  
6
7
As shown in the block diagram, the input terminals may be  
operated down to 0.5V below the negative supply rail. Two  
class A amplifier stages provide the voltage gain, and a  
unique class AB amplifier stage provides the current gain  
necessary to drive low-impedance loads.  
with current fed by way of Q , R , and Q . Transistor Q , in  
21 12 20 20  
turn, is biased by current flow through R , zener D , and R  
.
13 14  
8
The dynamic current sink is controlled by voltage level sensing.  
For purposes of explanation, it is assumed that output Terminal  
6 is quiescently established at the potential midpoint between  
the V+ and V- supply rails. When output current sinking mode  
A biasing circuit provides control of cascoded constant current  
flow circuits in the first and second stages. The CA3140  
includes an on chip phase compensating capacitor that is  
sufficient for the unity gain voltage follower configuration.  
operation is required, the collector potential of transistor Q is  
13  
driven below its quiescent level, thereby causing Q , Q to  
17 18  
decrease the output voltage at Terminal 6. Thus, the gate  
terminal of PMOS transistor Q is displaced toward the V- bus,  
thereby reducing the channel resistance of Q . As a  
21  
consequence, there is an incremental increase in current flow  
21  
Input Stage  
The schematic diagram consists of a differential input stage  
using PMOS field-effect transistors (Q , Q ) working into a  
mirror pair of bipolar transistors (Q , Q ) functioning as load  
resistors together with resistors R through R . The mirror pair  
transistors also function as a differential-to-single-ended  
converter to provide base current drive to the second stage  
bipolar transistor (Q ). Offset nulling, when desired, can be  
effected with a 10kpotentiometer connected across  
Terminals 1 and 5 and with its slider arm connected to Terminal  
4. Cascode-connected bipolar transistors Q , Q are the  
constant current source for the input stage. The base biasing  
circuit for the constant current source is described  
subsequently. The small diodes D , D , D provide gate oxide  
protection against high voltage transients, e.g., static electricity.  
9
10  
through Q , R , Q , D , R , and the base of Q . As a  
20 12 21 16  
6
7
11 12  
result, Q sinks current from Terminal 6 in direct response to  
16  
2
5
the incremental change in output voltage caused by Q . This  
18  
sink current flows regardless of load; any excess current is  
internally supplied by the emitter-follower Q . Short circuit  
18  
13  
protection of the output circuit is provided by Q , which is  
19  
driven into conduction by the high voltage drop developed  
across R under output short circuit conditions. Under these  
11  
2
5
conditions, the collector of Q diverts current from Q so as to  
19  
4
reduce the base current drive from Q , thereby limiting current  
17  
flow in Q to the short circuited load terminal.  
18  
3
4
5
Bias Circuit  
Quiescent current in all stages (except the dynamic current  
sink) of the CA3140 is dependent upon bias current flow in R .  
The function of the bias circuit is to establish and maintain  
Second Stage  
Most of the voltage gain in the CA3140 is provided by the  
second amplifier stage, consisting of bipolar transistor Q  
and its cascode connected load resistance provided by  
bipolar transistors Q , Q . On-chip phase compensation,  
1
13  
constant current flow through D , Q , Q and D . D is a diode  
1
6
8
2
1
connected transistor mirror connected in parallel with the base  
3
4
emitter junctions of Q , Q , and Q . D may be considered as a  
1
2
3
1
sufficient for a majority of the applications is provided by C .  
1
current sampling diode that senses the emitter current of Q  
6
Additional Miller-Effect compensation (roll off) can be  
accomplished, when desired, by simply connecting a small  
capacitor between Terminals 1 and 8. Terminal 8 is also  
used to strobe the output stage into quiescence. When  
terminal 8 is tied to the negative supply rail (Terminal 4) by  
mechanical or electrical means, the output Terminal 6  
swings low, i.e., approximately to Terminal 4 potential.  
and automatically adjusts the base current of Q (via Q ) to  
6
1
maintain a constant current through Q , Q , D . The base  
6
8
2
currents in Q , Q are also determined by constant current flow  
2
3
D . Furthermore, current in diode connected transistor Q  
1
2
establishes the currents in transistors Q and Q  
14  
.
15  
Typical Applications  
Output Stage  
Wide dynamic range of input and output characteristics with  
the most desirable high input impedance characteristics is  
achieved in the CA3140 by the use of an unique design based  
upon the PMOS Bipolar process. Input common mode voltage  
range and output swing capabilities are complementary,  
allowing operation with the single supply down to 4V.  
The CA3140 Series circuits employ a broad band output stage  
that can sink loads to the negative supply to complement the  
capability of the PMOS input stage when operating near the  
negative rail. Quiescent current in the emitter-follower cascade  
circuit (Q , Q ) is established by transistors (Q , Q  
)
17 18 14 15  
whose base currents are “mirrored” to current flowing through  
The wide dynamic range of these parameters also means  
that this device is suitable for many single supply  
applications, such as, for example, where one input is driven  
below the potential of Terminal 4 and the phase sense of the  
output signal must be maintained – a most important  
consideration in comparator applications.  
diode D in the bias circuit section. When the CA3140 is  
2
operating such that output Terminal 6 is sourcing current,  
transistor Q functions as an emitter-follower to source current  
18  
from the V+ bus (Terminal 7), via D , R , and R . Under these  
11  
7
9
conditions, the collector potential of Q is sufficiently high to  
13  
permit the necessary flow of base current to emitter follower  
Q
which, in turn, drives Q .  
18  
17  
FN957.10  
6
July 11, 2005  
CA3140, CA3140A  
level shifting circuitry usually associated with the 741 series  
Output Circuit Considerations  
of operational amplifiers.  
Excellent interfacing with TTL circuitry is easily achieved with  
a single 6.2V zener diode connected to Terminal 8 as shown  
in Figure 1. This connection assures that the maximum  
output signal swing will not go more positive than the zener  
voltage minus two base-to-emitter voltage drops within the  
CA3140. These voltages are independent of the operating  
supply voltage.  
Figure 4 shows some typical configurations. Note that a  
series resistor, R , is used in both cases to limit the drive  
L
available to the driven device. Moreover, it is recommended  
that a series diode and shunt diode be used at the thyristor  
input to prevent large negative transient surges that can  
appear at the gate of thyristors, from damaging the  
integrated circuit.  
V+  
5V TO 36V  
Offset Voltage Nulling  
LOGIC  
SUPPLY  
7
8
The input offset voltage can be nulled by connecting a 10kΩ  
potentiometer between Terminals 1 and 5 and returning its  
wiper arm to terminal 4, see Figure 3A. This technique,  
however, gives more adjustment range than required and  
therefore, a considerable portion of the potentiometer  
rotation is not fully utilized. Typical values of series resistors  
(R) that may be placed at either end of the potentiometer,  
see Figure 3B, to optimize its utilization range are given in  
the Electrical Specifications table.  
6.2V  
6
2
3
5V  
CA3140  
TYPICAL  
TTL GATE  
5V  
4
FIGURE 1. ZENER CLAMPING DIODE CONNECTED TO  
TERMINALS 8 AND 4 TO LIMIT CA3140 OUTPUT  
SWING TO TTL LEVELS  
An alternate system is shown in Figure 3C. This circuit uses  
only one additional resistor of approximately the value  
shown in the table. For potentiometers, in which the  
resistance does not drop to 0at either end of rotation, a  
value of resistance 10% lower than the values shown in the  
table should be used.  
1000  
SUPPLY VOLTAGE (V-) = 0V  
o
T
= 25 C  
A
SUPPLY VOLTAGE (V+) = +5V  
100  
+15V  
+30V  
Low Voltage Operation  
Operation at total supply voltages as low as 4V is possible  
with the CA3140. A current regulator based upon the PMOS  
threshold voltage maintains reasonable constant operating  
current and hence consistent performance down to these  
lower voltages.  
10  
1
0.01  
0.1  
1.0  
10  
The low voltage limitation occurs when the upper extreme of the  
input common mode voltage range extends down to the voltage  
at Terminal 4. This limit is reached at a total supply voltage just  
below 4V. The output voltage range also begins to extend down  
to the negative supply rail, but is slightly higher than that of the  
input. Figure 8 shows these characteristics and shows that with  
2V dual supplies, the lower extreme of the input common mode  
voltage range is below ground potential.  
LOAD (SINKING) CURRENT (mA)  
FIGURE 2. VOLTAGE ACROSS OUTPUT TRANSISTORS (Q  
15  
AND Q ) vs LOAD CURRENT  
16  
Figure 2 shows output current sinking capabilities of the  
CA3140 at various supply voltages. Output voltage swing to  
the negative supply rail permits this device to operate both  
power transistors and thyristors directly without the need for  
V+  
V+  
V+  
2
7
2
3
7
2
3
7
6
CA3140  
6
CA3140  
CA3140  
6
3
4
4
4
5
5
5
1
R
R
1
1
10kΩ  
10kΩ  
10kΩ  
R
V-  
V-  
V-  
FIGURE 3A. BASIC  
FIGURE 3B. IMPROVED RESOLUTION  
FIGURE 3C. SIMPLER IMPROVED RESOLUTION  
FIGURE 3. THREE OFFSET VOLTAGE NULLING METHODS  
FN957.10  
7
July 11, 2005  
CA3140, CA3140A  
R
V+  
+HV  
LOAD  
S
7
LOAD  
MT  
2
3
30V  
NO LOAD  
6
CA3140  
4
2
1
7
120V  
AC  
R
L
2
3
6
CA3140  
4
MT  
R
L
FIGURE 4. METHODS OF UTILIZING THE V  
SINKING CURRENT CAPABILITY OF THE CA3140 SERIES  
CE(SAT)  
FOLLOWER  
+15V  
7
0.1µF  
3
2
SIMULATED  
LOAD  
10kΩ  
6
CA3140  
4
2kΩ  
100pF  
0.1µF  
-15V  
LOAD RESISTANCE (R ) = 2kΩ  
L
LOAD CAPACITANCE (C ) = 100pF  
2kΩ  
L
SUPPLY VOLTAGE:  
o
V = ±15V  
S
T
= 25 C  
0.05µF  
A
10  
8
1mV  
1mV  
INVERTING  
5kΩ  
10mV  
10mV  
6
+15V  
4
7
2
0.1µF  
2
3
FOLLOWER  
INVERTING  
SIMULATED  
LOAD  
0
5kΩ  
6
CA3140  
-2  
-4  
-6  
-8  
-10  
200Ω  
2kΩ  
100pF  
4
1mV  
1mV  
0.1µF  
5.11kΩ  
4.99kΩ  
10mV  
10mV  
-15V  
SETTLING POINT  
0.1  
1.0  
SETTLING TIME (µs)  
10  
D
D
2
1
1N914  
1N914  
FIGURE 5A. WAVEFORM  
FIGURE 5B. TEST CIRCUITS  
FIGURE 5. SETTLING TIME vs INPUT VOLTAGE  
The exceptionally fast settling time characteristics are largely  
due to the high combination of high gain and wide bandwidth  
of the CA3140; as shown in Figure 6.  
Bandwidth and Slew Rate  
For those cases where bandwidth reduction is desired, for  
example, broadband noise reduction, an external capacitor  
connected between Terminals 1 and 8 can reduce the open  
loop -3dB bandwidth. The slew rate will, however, also be  
proportionally reduced by using this additional capacitor.  
Thus, a 20% reduction in bandwidth by this technique will  
also reduce the slew rate by about 20%.  
Input Circuit Considerations  
As mentioned previously, the amplifier inputs can be driven  
below the Terminal 4 potential, but a series current limiting  
resistor is recommended to limit the maximum input terminal  
current to less than 1mA to prevent damage to the input  
protection circuitry.  
Figure 5 shows the typical settling time required to reach  
1mV or 10mV of the final value for various levels of large  
signal inputs for the voltage follower and inverting unity gain  
amplifiers.  
Moreover, some current limiting resistance should be  
provided between the inverting input and the output when  
FN957.10  
8
July 11, 2005  
CA3140, CA3140A  
the CA3140 is used as a unity gain voltage follower. This  
input offset voltage) due to the application of large  
differential input voltages that are sustained over long  
periods at elevated temperatures.  
resistance prevents the possibility of extremely large input  
signal transients from forcing a signal through the input  
protection network and directly driving the internal constant  
current source which could result in positive feedback via the  
output terminal. A 3.9kresistor is sufficient.  
Both applied voltage and temperature accelerate these  
changes. The process is reversible and offset voltage shifts of  
the opposite polarity reverse the offset. Figure 9 shows the  
typical offset voltage change as a function of various stress  
The typical input current is on the order of 10pA when the  
inputs are centered at nominal device dissipation. As the  
output supplies load current, device dissipation will increase,  
raising the chip temperature and resulting in increased input  
current. Figure 7 shows typical input terminal current versus  
ambient temperature for the CA3140.  
o
voltages at the maximum rating of 125 C (for metal can); at  
lower temperatures (metal can and plastic), for example, at  
o
85 C, this change in voltage is considerably less. In typical  
linear applications, where the differential voltage is small and  
symmetrical, these incremental changes are of about the  
same magnitude as those encountered in an operational  
amplifier employing a bipolar transistor input stage.  
It is well known that MOSFET devices can exhibit slight  
changes in characteristics (for example, small changes in  
10K  
-75  
SUPPLY VOLTAGE: V = ±15V  
SUPPLY VOLTAGE: V = ±15V  
S
S
-90  
o
T
= 25 C  
A
R
C
= 2k,  
= 0pF  
L
L
-105  
100  
80  
60  
40  
20  
0
φOL  
-120  
-135  
1K  
-150  
100  
R
= 2k,  
= 100pF  
L
C
L
10  
1
1
2
3
4
5
6
7
8
10  
10  
10  
10  
10  
10  
10  
10  
-60 -40 -20  
0
20  
40  
60  
80 100 120 140  
o
FREQUENCY (Hz)  
TEMPERATURE ( C)  
FIGURE 6. OPEN LOOP VOLTAGE GAIN AND PHASE vs  
FREQUENCY  
FIGURE 7. INPUT CURRENT vs TEMPERATURE  
R
= ∞  
L
0
-0.5  
-1.0  
-1.5  
-2.0  
-2.5  
-3.0  
1.5  
o
o
AT T = 125 C  
A
+V  
AT T = 125 C  
A
-V  
-V  
-V  
ICR  
+V  
o
ICR  
ICR  
ICR  
1.0  
0.5  
0
+V  
OUT  
AT T = 125 C  
A
o
o
AT T = 25 C  
AT T = 25 C  
A
ICR  
A
o
+V  
OUT  
AT T = 25 C  
A
o
o
+V  
AT T = -55 C  
A
-V  
OUT  
FOR  
o
AT T = -55 C  
A
ICR  
o
+V  
OUT  
AT T = -55 C  
A
o
T
= -55 C to 125 C  
A
-0.5  
-1.0  
-1.5  
0
5
10  
15  
20  
25  
0
5
10  
15  
20  
25  
SUPPLY VOLTAGE (V+, V-)  
SUPPLY VOLTAGE (V+, V-)  
FIGURE 8. OUTPUT VOLTAGE SWING CAPABILITY AND COMMON MODE INPUT VOLTAGE RANGE vs SUPPLY VOLTAGE  
FN957.10  
9
July 11, 2005  
CA3140, CA3140A  
placed across the input to the CA3080A to give a logarithmic  
analog indication of the function generator’s frequency.  
7
6
5
4
3
2
1
0
o
T
= 125 C  
A
FOR METAL CAN PACKAGES  
DIFFERENTIAL DC VOLTAGE  
(ACROSS TERMINALS 2 AND 3) = 2V  
OUTPUT STAGE TOGGLED  
Analog frequency readout is readily accomplished by the  
means described above because the output current of the  
CA3080A varies approximately one decade for each 60mV  
change in the applied voltage, V  
(voltage between  
ABC  
Terminals 5 and 4 of the CA3080A of the function generator).  
Therefore, six decades represent 360mV change in V  
.
ABC  
Now, only the reference voltage must be established to set  
the lower limit on the meter. The three remaining transistors  
from the CA3086 Array used in the sweep generator are  
used for this reference voltage. In addition, this reference  
generator arrangement tends to track ambient temperature  
variations, and thus compensates for the effects of the  
normal negative temperature coefficient of the CA3080A  
DIFFERENTIAL DC VOLTAGE  
(ACROSS TERMINALS 2 AND 3) = 0V  
OUTPUT VOLTAGE = V+ / 2  
0
500 1000 1500 2000 2500 3000 3500 4000 4500  
TIME (HOURS)  
FIGURE 9. TYPICAL INCREMENTAL OFFSET VOLTAGE  
SHIFT vs OPERATING LIFE  
V
terminal voltage.  
ABC  
Super Sweep Function Generator  
Another output voltage from the reference generator is used  
to insure temperature tracking of the lower end of the  
Frequency Adjustment Potentiometer. A large series  
resistance simulates a current source, assuring similar  
temperature coefficients at both ends of the Frequency  
Adjustment Control.  
A function generator having a wide tuning range is shown in  
Figure 10. The 1,000,000/1 adjustment range is  
accomplished by a single variable potentiometer or by an  
auxiliary sweeping signal. The CA3140 functions as a non-  
inverting readout amplifier of the triangular signal developed  
across the integrating capacitor network connected to the  
output of the CA3080A current source.  
To calibrate this circuit, set the Frequency Adjustment  
Potentiometer at its low end. Then adjust the Minimum  
Frequency Calibration Control for the lowest frequency. To  
establish the upper frequency limit, set the Frequency  
Adjustment Potentiometer to its upper end and then adjust  
the Maximum Frequency Calibration Control for the  
maximum frequency. Because there is interaction among  
these controls, repetition of the adjustment procedure may  
be necessary. Two adjustments are used for the meter. The  
meter sensitivity control sets the meter scale width of each  
decade, while the meter position control adjusts the pointer  
on the scale with negligible effect on the sensitivity  
Buffered triangular output signals are then applied to a  
second CA3080 functioning as a high speed hysteresis  
switch. Output from the switch is returned directly back to the  
input of the CA3080A current source, thereby, completing  
the positive feedback loop  
The triangular output level is determined by the four 1N914  
level limiting diodes of the second CA3080 and the resistor  
divider network connected to Terminal No. 2 (input) of the  
CA3080. These diodes establish the input trip level to this  
switching stage and, therefore, indirectly determine the  
amplitude of the output triangle.  
adjustment. Thus, the meter sensitivity adjustment control  
1
calibrates the meter so that it deflects / of full scale for  
6
Compensation for propagation delays around the entire loop  
is provided by one adjustment on the input of the CA3080.  
This adjustment, which provides for a constant generator  
amplitude output, is most easily made while the generator is  
sweeping. High frequency ramp linearity is adjusted by the  
single 7pF to 60pF capacitor in the output of the CA3080A.  
each decade change in frequency.  
Sine Wave Shaper  
The circuit shown in Figure 12 uses a CA3140 as a voltage  
follower in combination with diodes from the CA3019 Array  
to convert the triangular signal from the function generator to  
a sine-wave output signal having typically less than 2% THD.  
The basic zero crossing slope is established by the 10kΩ  
potentiometer connected between Terminals 2 and 6 of the  
CA3140 and the 9.1kresistor and 10kpotentiometer  
from Terminal 2 to ground. Two break points are established  
It must be emphasized that only the CA3080A is  
characterized for maximum output linearity in the current  
generator function.  
Meter Driver and Buffer Amplifier  
by diodes D through D . Positive feedback via D and D  
establishes the zero slope at the maximum and minimum  
levels of the sine wave. This technique is necessary because  
the voltage follower configuration approaches unity gain  
rather than the zero gain required to shape the sine wave at  
the two extremes.  
1
4
5
6
Figure 11 shows the CA3140 connected as a meter driver  
and buffer amplifier. Low driving impedance is required of  
the CA3080A current source to assure smooth operation of  
the Frequency Adjustment Control. This low-driving  
impedance requirement is easily met by using a CA3140  
connected as a voltage follower. Moreover, a meter may be  
FN957.10  
10  
July 11, 2005  
CA3140, CA3140A  
CENTERING  
10kΩ  
+15V  
-15V  
HIGH  
+15V  
7.5kΩ  
+15V  
7
FREQUENCY  
62kΩ  
10kΩ  
LEVEL  
7-60pF  
0.1  
µF  
910kΩ  
360Ω  
360Ω  
3
2
+
7
15kΩ  
5
EXTERNAL  
OUTPUT  
+
CA3080A  
6
3
2
7
51  
pF  
-
CA3140  
6
2
-
7-60  
pF  
4
11kΩ  
10kΩ  
6
CA3080  
+
-
5
11kΩ  
3
2MΩ  
SYMMETRY  
-15V  
4
HIGH  
2.7kΩ  
4
-15V  
0.1  
µF  
FREQ.  
SHAPE  
EXTERNAL  
OUTPUT  
+15V  
-15V  
2kΩ  
-15V  
13kΩ  
TO OUTPUT  
AMPLIFIER  
100kΩ  
FROM BUFFER METER  
DRIVER (OPTIONAL)  
FREQUENCY  
ADJUSTMENT  
5.1kTO  
12010kΩ  
39kΩ  
SINE WAVE  
SHAPER  
1N914  
OUTPUT  
AMPLIFIER  
-15V  
+15V  
THIS NETWORK IS USED WHEN THE  
OPTIONAL BUFFER CIRCUIT IS NOT USED  
FIGURE 10A. CIRCUIT  
FREQUENCY  
ADJUSTMENT  
Top Trace: Output at junction of 2.7and 51resistors;  
5V/Div., 500ms/Div.  
+15V  
-15V  
METER DRIVER  
AND BUFFER  
AMPLIFIER  
Center Trace: External output of triangular function generator;  
2V/Div., 500ms/Div.  
POWER  
SUPPLY ±15V  
M
Bottom Trace: Output of “Log” generator; 10V/Div., 500ms/Div.  
FIGURE 10B. FIGURE FUNCTION GENERATOR SWEEPING  
FUNCTION  
GENERATOR  
WIDEBAND  
LINE DRIVER  
SINE WAVE  
SHAPER  
51Ω  
DC LEVEL  
ADJUST  
GATE  
SWEEP  
SWEEP  
GENERATOR  
FINE  
RATE  
INT.  
OFF  
V-  
EXTERNAL  
INPUT  
COARSE  
RATE  
EXT.  
1V/Div., 1s/Div.  
SWEEP  
LENGTH  
Three tone test signals, highest frequency 0.5MHz. Note the slight  
asymmetry at the three second/cycle signal. This asymmetry is due to  
slightly different positive and negative integration from the CA3080A  
and from the PC board and component leakages at the 100pA level.  
V-  
FIGURE 10C. FUNCTION GENERATOR WITH FIXED  
FIGURE 10D. INTERCONNECTIONS  
FREQUENCIES  
FIGURE 10. FUNCTION GENERATOR  
FN957.10  
11  
July 11, 2005  
CA3140, CA3140A  
FREQUENCY  
CALIBRATION  
MAXIMUM  
500kΩ  
620kΩ  
51kΩ  
FREQUENCY  
ADJUSTMENT  
10kΩ  
7
+15V  
7
-15V  
0.1µF  
TO CA3080A  
OF FUNCTION  
GENERATOR  
(FIGURE 10)  
4
3
+
CA3080A  
6
CA3140  
SWEEP IN  
5.6kΩ  
7.5kΩ  
+
-
3MΩ  
3
2
2
4.7kΩ  
+15V  
5.1kΩ  
6
CA3140  
5
4
TO  
-
SUBSTRATE  
OF CA3019  
WIDEBAND  
4
METER  
SENSITIVITY  
ADJUSTMENT  
2kΩ  
620Ω  
0.1µF  
OUTPUT  
AMPLIFIER  
12kΩ  
2.4kΩ  
0.1µF  
7
1kΩ  
FREQUENCY  
CALIBRATION  
MINIMUM  
10kΩ  
-15V  
R3 10kΩ  
200µA  
METER  
+15V  
M
EXTERNAL  
OUTPUT  
1MΩ  
2.5  
kΩ  
100  
kΩ  
11  
D
D
4
1
9.1kΩ  
9
510Ω  
-15V  
6
5
8
2
510Ω  
R
1
8
7
10  
14  
13  
10kΩ  
430Ω  
2kΩ  
D
D
D
2
6
3
12  
6
1
4
9
R
1kΩ  
METER  
POSITION  
ADJUSTMENT  
2
3.6kΩ  
3
D
3
5
CA3019  
DIODE ARRAY  
/
OF CA3086  
5
-15V  
FIGURE 11. METER DRIVER AND BUFFER AMPLIFIER  
FIGURE 12. SINE WAVE SHAPER  
750kΩ  
“LOG”  
100kΩ  
18MΩ  
1MΩ  
SAWTOOTH  
FINE  
RATE  
1N914  
100kΩ  
8.2kΩ  
22MΩ  
SAWTOOTH  
SYMMETRY  
1N914  
SAWTOOTH AND  
RAMP LOW LEVEL  
SET (-14.5V)  
+15V  
0.47µF  
0.047µF  
COARSE  
RATE  
50kΩ  
4700pF  
75kΩ  
470pF  
51kΩ  
SAWTOOTH  
+15V  
0.1  
“LOG”  
+15V  
µF  
+15V  
7
7
2
3
-
36kΩ  
TRIANGLE  
3
-
6
CA3140  
10kΩ  
GATE  
PULSE  
OUTPUT  
6
CA3140  
+
4
100kΩ  
30kΩ  
+
4
2
TO OUTPUT  
AMPLIFIER  
0.1  
µF  
50kΩ  
LOG  
-15V  
-15V  
10kΩ  
RATE  
ADJUST  
EXTERNAL OUTPUT  
TO FUNCTION GENERATOR “SWEEP IN”  
43kΩ  
10kΩ  
SWEEP WIDTH  
-15V  
+15V  
7
4
+
3
2
6
CA3140  
-
51kΩ  
6.8kΩ  
91kΩ  
10kΩ  
5
1
LOG  
VIO  
TRIANGLE  
25kΩ  
3.9Ω  
5
1
SAWTOOTH  
TRANSISTORS  
FROM CA3086  
ARRAY  
4
2
-15V  
“LOG”  
100Ω  
390Ω  
3
FIGURE 13. SWEEPING GENERATOR  
FN957.10  
July 11, 2005  
12  
CA3140, CA3140A  
This circuit can be adjusted most easily with a distortion  
analyzer, but a good first approximation can be made by  
comparing the output signal with that of a sine wave  
generator. The initial slope is adjusted with the potentiometer  
VOLTAGE  
ADJUSTMENT  
REFERENCE  
VOLTAGE  
7
3
R , followed by an adjustment of R . The final slope is  
+
1
2
REGULATED  
OUTPUT  
6
CA3140  
INPUT  
established by adjusting R , thereby adding additional  
3
-
2
segments that are contributed by these diodes. Because  
there is some interaction among these controls, repetition of  
the adjustment procedure may be necessary.  
4
Sweeping Generator  
FIGURE 15. BASIC SINGLE SUPPLY VOLTAGE REGULATOR  
SHOWING VOLTAGE FOLLOWER CONFIGURATION  
Figure 13 shows a sweeping generator. Three CA3140s are  
used in this circuit. One CA3140 is used as an integrator, a  
second device is used as a hysteresis switch that determines  
the starting and stopping points of the sweep. A third  
CA3140 is used as a logarithmic shaping network for the log  
function. Rates and slopes, as well as sawtooth, triangle,  
and logarithmic sweeps are generated by this circuit.  
Essentially, the regulators, shown in Figures 16 and 17, are  
connected as non inverting power operational amplifiers with a  
gain of 3.2. An 8V reference input yields a maximum output  
voltage slightly greater than 25V. As a voltage follower, when  
the reference input goes to 0V the output will be 0V. Because  
the offset voltage is also multiplied by the 3.2 gain factor, a  
potentiometer is needed to null the offset voltage.  
Wideband Output Amplifier  
Figure 14 shows a high slew rate, wideband amplifier  
suitable for use as a 50transmission line driver. This  
circuit, when used in conjunction with the function generator  
and sine wave shaper circuits shown in Figures 10 and 12  
Series pass transistors with high I  
levels will also  
CBO  
prevent the output voltage from reaching zero because there  
is a finite voltage drop (V ) across the output of the  
CESAT  
CA3140 (see Figure 2). This saturation voltage level may  
indeed set the lowest voltage obtainable.  
provides 18V  
P-P  
output open circuited, or 9V  
output  
P-P  
when terminated in 50. The slew rate required of this  
The high impedance presented by Terminal 8 is  
amplifier is 28V/µs (18V  
x π x 0.5MHz).  
P-P  
+15V  
advantageous in effecting current limiting. Thus, only a small  
signal transistor is required for the current-limit sensing  
amplifier. Resistive decoupling is provided for this transistor  
to minimize damage to it or the CA3140 in the event of  
unusual input or output transients on the supply rail.  
+
-
2.2  
kΩ  
50µF  
25V  
SIGNAL  
LEVEL  
ADJUSTMENT  
2N3053  
7
2.5kΩ  
200Ω  
+
3
OUT  
2.7Ω  
2.7Ω  
1N914  
1N914  
51Ω  
6
CA3140  
2W  
-
4
2
Figures 16 and 17, show circuits in which a D2201 high speed  
diode is used for the current sensor. This diode was chosen  
for its slightly higher forward voltage drop characteristic, thus  
giving greater sensitivity. It must be emphasized that heat  
sinking of this diode is essential to minimize variation of the  
current trip point due to internal heating of the diode. That is,  
1A at 1V forward drop represents one watt which can result in  
significant regenerative changes in the current trip point as the  
diode temperature rises. Placing the small signal reference  
amplifier in the proximity of the current sensing diode also  
helps minimize the variability in the trip level due to the  
negative temperature coefficient of the diode. In spite of those  
limitations, the current limiting point can easily be adjusted  
over the range from 10mA to 1A with a single adjustment  
potentiometer. If the temperature stability of the current  
limiting system is a serious consideration, the more usual  
current sampling resistor type of circuitry should be employed.  
8
1
50µF  
25V  
-
+
2.2  
kΩ  
2N4037  
-15V  
OUTPUT  
2.4pF  
2pF  
DC LEVEL  
ADJUSTMENT  
+15V  
3kΩ  
-15V  
200Ω  
1.8kΩ  
NOMINAL BANDWIDTH = 10MHz  
= 35ns  
t
r
FIGURE 14. WIDEBAND OUTPUT AMPLIFIER  
Power Supplies  
High input impedance, common mode capability down to the  
negative supply and high output drive current capability are  
key factors in the design of wide range output voltage  
supplies that use a single input voltage to provide a  
regulated output voltage that can be adjusted from  
essentially 0V to 24V.  
A power Darlington transistor (in a metal can with heatsink),  
is used as the series pass element for the conventional  
current limiting system, Figure 16, because high power  
Darlington dissipation will be encountered at low output  
voltage and high currents.  
Unlike many regulator systems using comparators having a  
bipolar transistor input stage, a high impedance reference  
voltage divider from a single supply can be used in  
connection with the CA3140 (see Figure 15).  
FN957.10  
13  
July 11, 2005  
CA3140, CA3140A  
A small heat sink VERSAWATT transistor is used as the  
regulation also remains constant. Line regulation is 0.1% per  
volt. Hum and noise voltage is less than 200µV as read with a  
meter having a 10MHz bandwidth.  
series pass element in the fold back current system, Figure  
17, since dissipation levels will only approach 10W. In this  
system, the D2201 diode is used for current sampling.  
Foldback is provided by the 3kand 100kdivider network  
connected to the base of the current sensing transistor.  
Figure 18A shows the turn ON and turn OFF characteristics  
of both regulators. The slow turn on rise is due to the slow  
rate of rise of the reference voltage. Figure 18B shows the  
transient response of the regulator with the switching of a  
20load at 20V output.  
Both regulators provide better than 0.02% load regulation.  
Because there is constant loop gain at all voltage settings, the  
OUTPUT 0V TO 25V  
2N6385  
CURRENT  
“FOLDBACK” CURRENT  
25V AT 1A  
POWER DARLINGTON LIMITING  
LIMITER  
“FOLDS BACK”  
TO 40mA  
OUTPUT  
0.1 24V  
AT 1A  
ADJUST  
2N5294  
D2201  
D2201  
+30V  
2
3
+30V  
3
2
1k200Ω  
75Ω  
3kΩ  
1k1kΩ  
1kΩ  
1
1
100kΩ  
3kΩ  
2
100kΩ  
2N2102  
2N2102  
3
1kΩ  
100Ω  
8
1kΩ  
56pF  
180kΩ  
82kΩ  
1
8
7
56pF  
180kΩ  
82kΩ  
7
2
3
2
3
1kΩ  
6
CA3140  
1
1kΩ  
6
CA3140  
1
+
5
2.7k10µF  
+
5
-
2.7k10µF  
100kΩ  
-
4
100kΩ  
4
INPUT  
INPUT  
VOLTAGE  
ADJUST  
+
VOLTAGE  
ADJUST  
+
-
250µF  
+
2.2kΩ  
11  
5µF  
+
-
50kΩ  
-
250µF  
2.2kΩ  
5µF  
50kΩ  
100kΩ  
-
2
14  
10  
1
100kΩ  
11  
2
10  
1
14  
12  
3
5
9
8
12  
0.01µF  
3
5
9
8
0.01µF  
7
13  
7
13  
6
4
CA3086  
6
4
CA3086  
1kΩ  
1kΩ  
62kΩ  
HUM AND NOISE OUTPUT <200µV  
(MEASUREMENT BANDWIDTH ~10MHz)  
62kΩ  
HUM AND NOISE OUTPUT <200µV  
(MEASUREMENT BANDWIDTH ~10MHz)  
LOAD REGULATION  
(NO LOAD TO FULL LOAD)  
<0.02%  
RMS  
LOAD REGULATION  
(NO LOAD TO FULL LOAD)  
<0.02%  
RMS  
LINE REGULATION 0.1%/V  
LINE REGULATION 0.1%/V  
FIGURE 16. REGULATED POWER SUPPLY  
FIGURE 17. REGULATED POWER SUPPLY WITH “FOLDBACK”  
CURRENT LIMITING  
Top Trace: Output Voltage;  
5V/Div., 1s/Div.  
200mV/Div., 5µs/Div.  
Bottom Trace: Collector of load switching transistor, load = 1A;  
5V/Div., 5µs/Div.  
FIGURE 18A. SUPPLY TURN-ON AND TURNOFF  
CHARACTERISTICS  
FIGURE 18B. TRANSIENT RESPONSE  
FIGURE 18. WAVEFORMS OF DYNAMIC CHARACTERISTICS OF POWER SUPPLY CURRENTS SHOWN IN FIGURES 16 AND 17  
FN957.10  
July 11, 2005  
14  
CA3140, CA3140A  
Bass treble boost and cut are ±15dB at 100Hz and 10kHz,  
Tone Control Circuits  
respectively. Full peak-to-peak output is available up to at  
least 20kHz due to the high slew rate of the CA3140. The  
amplifier gain is 3dB down from its “flat” position at 70kHz.  
High slew rate, wide bandwidth, high output voltage  
capability and high input impedance are all characteristics  
required of tone control amplifiers. Two tone control circuits  
that exploit these characteristics of the CA3140 are shown in  
Figures 19 and 20.  
Figure 19 shows another tone control circuit with similar  
boost and cut specifications. The wideband gain of this  
circuit is equal to the ultimate boost or cut plus one, which in  
this case is a gain of eleven. For 20dB boost and cut, the  
input loading of this circuit is essentially equal to the value of  
the resistance from Terminal No. 3 to ground. A detailed  
analysis of this circuit is given in “An IC Operational  
Transconductance Amplifier (OTA) With Power Capability” by  
L. Kaplan and H. Wittlinger, IEEE Transactions on Broadcast  
and Television Receivers, Vol. BTR-18, No. 3, August, 1972.  
The first circuit, shown in Figure 20, is the Baxandall tone  
control circuit which provides unity gain at midband and  
uses standard linear potentiometers. The high input  
impedance of the CA3140 makes possible the use of low-  
cost, low-value, small size capacitors, as well as reduced  
load of the driving stage.  
FOR SINGLE SUPPLY  
NOTES:  
+30V  
2.2MΩ  
5. 20dB Flat Position Gain.  
6. ±15dB Bass and Treble Boost and Cut  
7
0.005µF  
0.1µF  
at 100Hz and 10kHz, respectively.  
+
3
2
5.1  
MΩ  
6
CA3140  
7. 25V  
output at 20kHz.  
P-P  
8. -3dB at 24kHz from 1kHz reference.  
-
4
FOR DUAL SUPPLIES  
BOOST  
TREBLE  
CUT  
200kΩ  
(LINEAR)  
+15V  
0.012µF  
0.001µF  
7
100  
pF  
0.1  
µF  
0.005µF  
5.1MΩ  
0.1µF  
100pF  
18kΩ  
2.2MΩ  
3
2
+
6
CA3140  
-
4
0.1µF  
0.022µF  
2µF  
0.0022µF  
100kΩ  
-15V  
-
+
10kΩ  
1MΩ  
CCW (LOG)  
TONE CONTROL NETWORK  
BOOST  
BASS  
CUT  
TONE CONTROL NETWORK  
FIGURE 19. TONE CONTROL CIRCUIT USING CA3130 SERIES (20dB MIDBAND GAIN)  
FOR SINGLE SUPPLY  
BOOST BASS  
(LINEAR)  
CUT  
0.047µF  
240kΩ  
5MΩ  
240kΩ  
FOR DUAL SUPPLIES  
2.2MΩ  
+32V  
750  
pF  
750  
pF  
+15V  
7
0.1  
µF  
7
0.1µF  
3
+
+
3
2
0.1  
µF  
2.2  
MΩ  
CA3140  
6
CA3140  
6
0.047µF  
-
2
TONE CONTROL  
NETWORK  
2.2MΩ  
-
4
4
0.1µF  
20pF  
ΝΟΤΕΣ:  
-15V  
9. ±15dB Bass and Treble Boost and Cut at 100Hz and 10kHz, Respectively.  
10. 25V Output at 20kHz.  
51kΩ  
5MΩ  
(LINEAR)  
BOOST TREBLE  
51kΩ  
P-P  
11. -3dB at 70kHz from 1kHz Reference.  
12. 0dB Flat Position Gain.  
CUT  
TONE CONTROL NETWORK  
FIGURE 20. BAXANDALL TONE CONTROL CIRCUIT USING CA3140 SERIES  
FN957.10  
July 11, 2005  
15  
CA3140, CA3140A  
Wien Bridge Oscillator  
OUTPUT  
19V TO 22V  
THD <0.3%  
P-P  
P-P  
Another application of the CA3140 that makes excellent use  
of its high input impedance, high slew rate, and high voltage  
qualities is the Wien Bridge sine wave oscillator. A basic Wien  
+15V  
7
R
2
C
1000pF  
2
0.1µF  
CA3109  
8
3
+
9
DIODE  
ARRAY  
Bridge oscillator is shown in Figure 21. When R = R = R  
1
2
6
CA3140  
and C = C = C, the frequency equation reduces to the  
SUBSTRATE  
OF CA3019  
-
1
2
C
1000  
pF  
R
2
1
1
1
3
familiar f = 1/(2πRC) and the gain required for oscillation,  
is equal to 3. Note that if C is increased by a factor of  
4
2
6
0.1µF  
A
7
OSC  
2
0.1µF  
four and R is reduced by a factor of four, the gain required  
2
-15V  
for oscillation becomes 1.5, thus permitting a potentially  
higher operating frequency closer to the gain bandwidth  
product of the CA3140.  
7.5kΩ  
5
4
R
= R = R  
2
1
50Hz, R = 3.3MΩ  
100Hz, R = 1.6MΩ  
1kHz, R = 160MΩ  
10kHz, R = 16MΩ  
30kHz, R = 5.1MΩ  
3.6kΩ  
500Ω  
C
R
2
2
NOTES:  
1
f = ------------------------------------------  
2π R C R C  
1
1
2
2
+
OUTPUT  
C
R
2
R
1
1
-
A
A
= 1 + ------ + ------  
FIGURE 22. WIEN BRIDGE OSCILLATOR CIRCUIT USING  
CA3140  
OSC  
C
2
R
R
F
S
Simple Sample-and-Hold System  
C
R
1
R
1
F
= 1 + -------  
CL  
R
S
Figure 23 shows a very simple sample-and-hold system  
using the CA3140 as the readout amplifier for the storage  
capacitor. The CA3080A serves as both input buffer amplifier  
and low feed-through transmission switch (see Note 13).  
System offset nulling is accomplished with the CA3140 via  
its offset nulling terminals. A typical simulated load of 2kΩ  
and 30pF is shown in the schematic.  
FIGURE 21. BASIC WIEN BRIDGE OSCILLATOR CIRCUIT  
USING AN OPERATIONAL AMPLIFIER  
Oscillator stabilization takes on many forms. It must be  
precisely set, otherwise the amplitude will either diminish or  
reach some form of limiting with high levels of distortion. The  
0
SAMPLE  
HOLD  
30kΩ  
element, R , is commonly replaced with some variable  
S
STROBE  
-15  
resistance element. Thus, through some control means, the  
1N914  
value of R is adjusted to maintain constant oscillator output.  
S
+15V  
7
A FET channel resistance, a thermistor, a lamp bulb, or other  
device whose resistance increases as the output amplitude  
is increased are a few of the elements often utilized.  
1N914  
+15V  
0.1µF  
5
3.5kΩ  
2kΩ  
7
+
3
INPUT  
+
CA3080A  
6
3
2
Figure 22 shows another means of stabilizing the oscillator  
CA3140  
6
2
-
with a zener diode shunting the feedback resistor (R of  
4
F
-
0.1  
µF  
4
1
Figure 21). As the output signal amplitude increases, the  
zener diode impedance decreases resulting in more  
0.1µF  
5
2kΩ  
100kΩ  
-15V  
feedback with consequent reduction in gain; thus stabilizing  
the amplitude of the output signal. Furthermore, this  
2kΩ  
-15V  
200pF  
C
1
200pF  
combination of a monolithic zener diode and bridge rectifier  
circuit tends to provide a zero temperature coefficient for this  
regulating system. Because this bridge rectifier system has  
no time constant, i.e., thermal time constant for the lamp  
bulb, and RC time constant for filters often used in detector  
networks, there is no lower frequency limit. For example, with  
1µF polycarbonate capacitors and 22Mfor the frequency  
determining network, the operating frequency is 0.007Hz.  
2kΩ  
400Ω  
0.1µF  
30pF  
SIMULATED LOAD  
NOT REQUIRED  
FIGURE 23. SAMPLE AND HOLD CIRCUIT  
In this circuit, the storage compensation capacitance (C ) is  
1
only 200pF. Larger value capacitors provide longer “hold”  
As the frequency is increased, the output amplitude must be  
reduced to prevent the output signal from becoming slew-  
rate limited. An output frequency of 180kHz will reach a slew  
periods but with slower slew rates. The slew rate is:  
dv  
I
------ = --- = 0.5mA 200pF = 2.5V ⁄ µs  
dt  
C
rate of approximately 9V/µs when its amplitude is 16V  
.
P-P  
NOTE:  
13. AN6668 “Applications of the CA3080 and CA 3080A High  
Performance Operational Transconductance Amplifiers”.  
FN957.10  
July 11, 2005  
16  
CA3140, CA3140A  
Pulse “droop” during the hold interval is 170pA/200pF which is  
Current Amplifier  
0.85µV/µs; (i.e., 170pA/200pF). In this case, 170pA represents  
the typical leakage current of the CA3080A when strobed off. If  
The low input terminal current needed to drive the CA3140  
makes it ideal for use in current amplifier applications such  
as the one shown in Figure 25 (see Note 14). In this circuit,  
low current is supplied at the input potential as the power  
C were increased to 2000pF, the “hold-droop” rate will  
1
decrease to 0.085µV/µs, but the slew rate would decrease to  
0.25V/µs. The parallel diode network connected between  
Terminal 3 of the CA3080A and Terminal 6 of the CA3140  
prevents large input signal feedthrough across the input  
terminals of the CA3080A to the 200pF storage capacitor when  
the CA3080A is strobed off. Figure 24 shows dynamic  
characteristic waveforms of this sample-and-hold system.  
supply to load resistor R . This load current is increased by  
L
the multiplication factor R /R , when the load current is  
2
1
monitored by the power supply meter M. Thus, if the load  
current is 100nA, with values shown, the load current  
presented to the supply will be 100µA; a much easier current  
to measure in many systems.  
R
1
10kΩ  
+15V  
R
R
2
1
I
x
L
0.1µF  
7
4
3
2
+
R
2
CA3140  
6
M
I
10MΩ  
L
0.1µF  
-
POWER  
SUPPLY  
1
5
R
L
100kΩ  
Top Trace: Output; 50mV/Div., 200ns/Div.  
Bottom Trace: Input; 50mV/Div., 200ns/Div.  
4.3kΩ  
-15V  
FIGURE 25. BASIC CURRENT AMPLIFIER FOR LOW CURRENT  
MEASUREMENT SYSTEMS  
Note that the input and output voltages are transferred at the  
same potential and only the output current is multiplied by  
the scale factor.  
The dotted components show a method of decoupling the  
circuit from the effects of high output load capacitance and  
the potential oscillation in this situation. Essentially, the  
necessary high frequency feedback is provided by the  
capacitor with the dotted series resistor providing load  
decoupling.  
Top Trace: Output Signal; 5V/Div, 2µs/Div.  
Center Trace: Difference of Input and Output Signals through  
Tektronix Amplifier 7A13; 5mV/Div., 2µs/Div.  
Bottom Trace: Input Signal; 5V/Div., 2µs/Div.  
Full Wave Rectifier  
LARGE SIGNAL RESPONSE AND SETTLING TIME  
Figure 26 shows a single supply, absolute value, ideal full-  
wave rectifier with associated waveforms. During positive  
excursions, the input signal is fed through the feedback  
network directly to the output. Simultaneously, the positive  
excursion of the input signal also drives the output terminal  
(No. 6) of the inverting amplifier in a negative going  
excursion such that the 1N914 diode effectively disconnects  
the amplifier from the signal path. During a negative going  
excursion of the input signal, the CA3140 functions as a  
normal inverting amplifier with a gain equal to -R /R . When  
2
1
the equality of the two equations shown in Figure 26 is  
satisfied, the full wave output is symmetrical.  
SAMPLING RESPONSE  
Top Trace: Output; 100mV/Div., 500ns/Div.  
Bottom Trace: Input; 20V/Div., 500ns/Div.  
NOTE:  
14. “Operational Amplifiers Design and Applications”, J. G. Graeme,  
McGraw-Hill Book Company, page 308, “Negative Immittance  
Converter Circuits”.  
FIGURE 24. SAMPLE AND HOLD SYSTEM DYNAMIC  
CHARACTERISTICS WAVEFORMS  
FN957.10  
17  
July 11, 2005  
CA3140, CA3140A  
+15V  
7
R
2
5kΩ  
+15V  
0.1µF  
10kΩ  
SIMULATED  
LOAD  
0.1µF  
R
1
INPUT  
3
2
+
7
4
2
3
-
CA3140  
6
10kΩ  
CA3140  
6
-
1N914  
100pF  
2kΩ  
+
4
5
10kΩ  
PEAK  
1
8
R
3
0.1µF  
ADJUST  
10kΩ  
-15V  
2kΩ  
100kΩ  
OFFSET  
ADJUST  
BW (-3dB) = 4.5MHz  
SR = 9V/µs  
R
R
3
2
GAIN = ------ = X = ----------------------------  
R R + R  
0.05µF  
R
1
1
2
3
FIGURE 28A. TEST CIRCUIT  
2
X + X  
----------------  
R
1
R
=
3
1 X  
R
5kΩ  
10kΩ  
2
--------------  
FOR X = 0.5  
= ------  
R
1
0.75  
-----------  
R
= 10kΩ  
= 15kΩ  
3
0.5  
20V  
P-P  
Input BW (-3dB) = 290kHz, DC Output (Avg) = 3.2V  
OUTPUT  
0
Top Trace: Output; 50mV/Div., 200ns/Div.  
Bottom Trace: Input; 50mV/Div., 200ns/Div.  
FIGURE 28B. SMALL SIGNAL RESPONSE  
INPUT  
0
FIGURE 26. SINGLE SUPPLY, ABSOLUTE VALUE, IDEAL  
FULL WAVE RECTIFIER WITH ASSOCIATED  
WAVEFORMS  
+15V  
0.01µF  
7
R
S
3
2
+
NOISE VOLTAGE  
OUTPUT  
1MΩ  
6
CA3140  
-
4
(Measurement made with Tektronix 7A13 differential amplifier.)  
30.1kΩ  
0.01µF  
Top Trace: Output Signal; 5V/Div., 5µs/Div.  
Center Trace: Difference Signal; 5mV/Div., 5µs/Div.  
Bottom Trace: Input Signal; 5V/Div., 5µs/Div.  
-15V  
BW (-3dB) = 140kHz  
TOTAL NOISE VOLTAGE  
(REFERRED TO INPUT) = 48µV (TYP)  
1kΩ  
FIGURE 28C. INPUT-OUTPUT DIFFERENCE SIGNAL SHOWING  
SETTLING TIME  
FIGURE 27. TEST CIRCUIT AMPLIFIER (30dB GAIN) USED FOR  
WIDEBAND NOISE MEASUREMENT  
FIGURE 28. SPLIT SUPPLY VOLTAGE FOLLOWER TEST  
CIRCUIT AND ASSOCIATED WAVEFORMS  
FN957.10  
18  
July 11, 2005  
CA3140, CA3140A  
Typical Performance Curves  
20  
10  
R
= 2kΩ  
R
C
= 2kΩ  
= 100pF  
L
L
L
o
T
= -55 C  
A
o
o
25 C  
25 C  
125  
100  
75  
50  
25  
0
o
o
125 C  
o
125 C  
T
= -55 C  
A
1
0
5
10  
15  
20  
25  
0
5
10  
15  
20  
25  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
FIGURE 29. OPEN-LOOP VOLTAGE GAIN vs SUPPLY  
VOLTAGE AND TEMPERATURE  
FIGURE 30. GAIN BANDWIDTH PRODUCT vs SUPPLY  
VOLTAGE AND TEMPERATURE  
R
= ∞  
R
C
= 2kΩ  
= 100pF  
L
L
L
7
6
5
4
3
2
1
0
o
T
= -55 C  
A
o
o
25 C  
25 C  
o
125 C  
o
o
20  
15  
10  
5
T
= -55 C  
125 C  
A
0
0
5
10  
15  
20  
25  
0
5
10  
15  
20  
25  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
FIGURE 31. SLEW RATE vs SUPPLY VOLTAGE AND  
TEMPERATURE  
FIGURE 32. QUIESCENT SUPPLY CURRENT vs SUPPLY  
VOLTAGE AND TEMPERATURE  
120  
100  
80  
60  
40  
20  
0
SUPPLY VOLTAGE: V = ±15V  
SUPPLY VOLTAGE: V = ±15V  
S
S
o
o
T
= 25 C  
T
= 25 C  
A
A
25  
20  
15  
10  
5
0
1
2
3
4
5
6
7
10K  
100K  
1M  
4M  
10  
10  
10  
10  
10  
10  
10  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 34. COMMON MODE REJECTION RATIO vs FREQUENCY  
FIGURE 33. MAXIMUM OUTPUT VOLTAGE SWING vs  
FREQUENCY  
FN957.10  
19  
July 11, 2005  
CA3140, CA3140A  
Typical Performance Curves (Continued)  
1000  
100  
10  
SUPPLY VOLTAGE: V = ±15V  
S
SUPPLY VOLTAGE: V = ±15V  
S
o
T
= 25 C  
o
A
T
= 25 C  
A
100  
80  
60  
40  
20  
0
+PSRR  
-PSRR  
POWER SUPPLY REJECTION RATIO  
(PSRR) = V /V  
IO  
S
1
1
2
3
4
5
6
7
1
2
3
4
5
10  
10  
10  
10  
10  
10  
10  
1
10  
10  
10  
10  
10  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FIGURE 35. EQUIVALENT INPUT NOISE VOLTAGE vs  
FREQUENCY  
FIGURE 36. POWER SUPPLY REJECTION RATIO vs FREQUENCY  
FN957.10  
20  
July 11, 2005  
CA3140, CA3140A  
Metallization Mask Layout  
65  
0
10  
20  
30  
40  
50  
60  
61  
60  
50  
40  
30  
20  
10  
0
58-66  
(1.473-1.676)  
4-10  
(0.102-0.254)  
62-70  
(1.575-1.778)  
Dimensions in parenthesis are in millimeters and are derived  
from the basic inch dimensions as indicated. Grid graduations  
-3  
are in mils (10 inch).  
The photographs and dimensions represent a chip when it is  
part of the wafer. When the wafer is cut into chips, the cleavage  
o
ο
angles are 57 instead of 90 with respect to the face of the  
chip. Therefore, the isolated chip is actually 7 mils (0.17mm)  
larger in both dimensions.  
FN957.10  
21  
July 11, 2005  
CA3140, CA3140A  
Dual-In-Line Plastic Packages (PDIP)  
E8.3 (JEDEC MS-001-BA ISSUE D)  
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE  
N
E1  
INDEX  
AREA  
INCHES MILLIMETERS  
1 2  
3
N/2  
SYMBOL  
MIN  
MAX  
0.210  
-
MIN  
-
MAX  
5.33  
-
NOTES  
-B-  
-C-  
A
A1  
A2  
B
-
4
-A-  
D
E
0.015  
0.115  
0.014  
0.045  
0.008  
0.355  
0.005  
0.300  
0.240  
0.39  
2.93  
0.356  
1.15  
0.204  
9.01  
0.13  
7.62  
6.10  
4
BASE  
PLANE  
0.195  
0.022  
0.070  
0.014  
0.400  
-
4.95  
0.558  
1.77  
0.355  
10.16  
-
-
A2  
A
-
SEATING  
PLANE  
L
C
L
B1  
C
8, 10  
D1  
B1  
eA  
-
A
A
1
D1  
e
D
5
eC  
C
B
eB  
D1  
E
5
0.010 (0.25) M  
C
B S  
0.325  
0.280  
8.25  
7.11  
6
NOTES:  
E1  
e
5
1. Controlling Dimensions: INCH. In case of conflict between  
0.100 BSC  
0.300 BSC  
2.54 BSC  
7.62 BSC  
-
English and Metric dimensions, the inch dimensions control.  
e
e
6
A
B
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
-
0.430  
0.150  
-
10.92  
3.81  
7
3. Symbols are defined in the “MO Series Symbol List” in Section  
2.2 of Publication No. 95.  
L
0.115  
2.93  
4
9
4. Dimensions A, A1 and L are measured with the package seated  
N
8
8
in JEDEC seating plane gauge GS-3.  
Rev. 0 12/93  
5. D, D1, and E1 dimensions do not include mold flash or protru-  
sions. Mold flash or protrusions shall not exceed 0.010 inch  
(0.25mm).  
e
6. E and  
pendicular to datum  
7. e and e are measured at the lead tips with the leads uncon-  
are measured with the leads constrained to be per-  
A
-C-  
.
B
C
strained. e must be zero or greater.  
C
8. B1 maximum dimensions do not include dambar protrusions.  
Dambar protrusions shall not exceed 0.010 inch (0.25mm).  
9. N is the maximum number of terminal positions.  
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,  
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch  
(0.76 - 1.14mm).  
FN957.10  
22  
July 11, 2005  
CA3140, CA3140A  
Small Outline Plastic Packages (SOIC)  
M8.15 (JEDEC MS-012-AA ISSUE C)  
N
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC  
PACKAGE  
INDEX  
AREA  
0.25(0.010)  
M
B M  
H
E
INCHES  
MILLIMETERS  
-B-  
SYMBOL  
MIN  
MAX  
MIN  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
MAX  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
NOTES  
A
A1  
B
C
D
E
e
0.0532  
0.0040  
0.013  
0.0688  
0.0098  
0.020  
-
1
2
3
L
-
9
SEATING PLANE  
A
0.0075  
0.1890  
0.1497  
0.0098  
0.1968  
0.1574  
-
-A-  
o
h x 45  
D
3
4
-C-  
α
µ
0.050 BSC  
1.27 BSC  
-
e
A1  
H
h
0.2284  
0.0099  
0.016  
0.2440  
0.0196  
0.050  
5.80  
0.25  
0.40  
6.20  
0.50  
1.27  
-
C
B
0.10(0.004)  
5
0.25(0.010) M  
C A M B S  
L
6
N
α
8
8
7
NOTES:  
o
o
o
o
0
8
0
8
-
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of  
Publication Number 95.  
Rev. 0 12/93  
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.  
3. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006  
inch) per side.  
4. Dimension “E” does not include interlead flash or protrusions. Inter-  
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per  
side.  
5. The chamfer on the body is optional. If it is not present, a visual index  
feature must be located within the crosshatched area.  
6. “L” is the length of terminal for soldering to a substrate.  
7. “N” is the number of terminal positions.  
8. Terminal numbers are shown for reference only.  
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater  
above the seating plane, shall not exceed a maximum value of  
0.61mm (0.024 inch).  
10. Controlling dimension: MILLIMETER. Converted inch dimensions  
are not necessarily exact.  
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.  
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality  
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without  
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and  
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result  
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.  
For information regarding Intersil Corporation and its products, see www.intersil.com  
FN957.10  
23  
July 11, 2005  
配单直通车
CA3140AMZ96产品参数
型号:CA3140AMZ96
是否无铅: 不含铅
是否Rohs认证: 符合
生命周期:Transferred
零件包装代码:SOIC
包装说明:SOP, SOP8,.25
针数:8
Reach Compliance Code:compliant
ECCN代码:EAR99
HTS代码:8542.33.00.01
风险等级:5.05
放大器类型:OPERATIONAL AMPLIFIER
架构:VOLTAGE-FEEDBACK
25C 时的最大偏置电流 (IIB):0.00004 µA
标称共模抑制比:90 dB
频率补偿:YES
最大输入失调电压:5000 µV
JESD-30 代码:R-PDSO-G8
JESD-609代码:e3
长度:4.9 mm
低-偏置:YES
低-失调:NO
湿度敏感等级:1
负供电电压上限:-18 V
标称负供电电压 (Vsup):-15 V
功能数量:1
端子数量:8
最高工作温度:125 °C
最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY
封装代码:SOP
封装等效代码:SOP8,.25
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260
电源:5/+-15 V
认证状态:Not Qualified
座面最大高度:1.75 mm
标称压摆率:9 V/us
子类别:Operational Amplifier
最大压摆率:6 mA
供电电压上限:18 V
标称供电电压 (Vsup):15 V
表面贴装:YES
技术:BIMOS
温度等级:MILITARY
端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING
端子节距:1.27 mm
端子位置:DUAL
处于峰值回流温度下的最长时间:30
标称均一增益带宽:4500 kHz
最小电压增益:19950
宽度:3.9 mm
Base Number Matches:1
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