Detailed Description
A microprocessor’s (µP’s) reset input starts the µP in a known state. The CN803/809/810 series assert reset
to prevent code-execution errors during power-up, power-down, or brownout conditions. The device
consists of a comparator, a low current high precision voltage reference, voltage divider, output delay
circuit and output driver. They assert a reset signal whenever the VCC supply voltage declines below a
preset threshold, keeping it asserted for at least 140ms after VCC has risen above the reset threshold.
The CN809/810 have a CMOS output stage, the CN803 has an open drain output stage. The CN803/809
have an active-low
output, while the CN810 has an active-high RESET output. The reset
comparator is designed to ignore fast transients on VCC, and the outputs are guaranteed to be in the correct
logic state for VCC down to 1.15V over the temperature range.
The operation of the device can be best understood by referring to figure 3.
VCC
VRES + VHYST
VRES
VCCMIN
VCCMIN
RESET
TRES
Fig.2 Timing waveform
Applications Information
Negative-Going VCC Transients
In addition to issuing a reset to the µP during power-up, power-down, and brownout conditions, the
CN803/809/810 series are relatively immune to short-duration negative-going VCC transients (glitches). As
the magnitude of the transient increases (goes farther below the reset threshold), the maximum allowable
pulse width decreases. Typically, a VCC transient that goes 100mV below the reset threshold and lasts 10µs
or less will not cause a reset pulse. A 0.1µF bypass capacitor mounted as close as possible to the VCC pin
provides additional transient immunity.
Ensuring a Valid Reset Output Down to VCC = 0
When VCC falls below 1.15V, the CN809
circuit. Therefore, high-impedance CMOS logic inputs connected to
voltages. This presents no problem in most applications, since most µP and other circuitry is inoperative
output no longer sinks current—it becomes an open
can drift to undetermined
with VCC below 1.15V. However, in applications where
resistor is needed from
must be valid down to 0V, a pull-down
output will be held at
pin to GND as shown in Figure 4, then
low state. The resistor’s value is not critical, it should be about 100KΩ, large enough not to load
,
Rev 1.2
5
QQ：2881495808 复制
