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产品型号CSD18502KCS的概述

芯片CSD18502KCS的概述 CSD18502KCS是一款高性能的N沟道MOSFET,属于Texas Instruments(德州仪器)公司生产的Power MOSFET系列。该芯片专为提高功率效率、降低热损耗而设计,广泛应用于电源管理、DC-DC转换器、负载开关等场合。CSD18502KCS的高开关速度和低导通电阻使其在切换频率较高的应用中表现出色。这种特性使得CSD18502KCS适用于便携式设备、电源适配器、以及各种工业应用。 芯片CSD18502KCS的详细参数 CSD18502KCS的主要参数包括: - 最大漏极-源极电压(V_DS): 20V - 最大漏极电流(I_D): 74A(在特定情况下) - 导通电阻(R_DS(on): 7.5 mΩ @ V_GS = 10V - 门源电压(V_GS): ±20V - 功率耗散(P_D): 1.3W(在25°C环境温度下) - ...

产品型号CSD18502KCS的Datasheet PDF文件预览

CSD18502KCS  
www.ti.com  
SLPS367A AUGUST 2012REVISED OCTOBER 2012  
40-V, N-Channel NexFET™ Power MOSFETs  
Check for Samples: CSD18502KCS  
1
FEATURES  
PRODUCT SUMMARY  
2
Ultra Low Qg and Qgd  
Low Thermal Resistance  
Avalanche Rated  
TA = 25°C  
TYPICAL VALUE  
UNIT  
V
VDS  
Qg  
Drain to Source Voltage  
40  
52  
Gate Charge Total (10V)  
Gate Charge Gate to Drain  
nC  
nC  
m  
mΩ  
V
Qgd  
8.4  
Logic Level  
VGS = 4.5V  
VGS = 10V  
1.8  
3.3  
2.4  
Pb Free Terminal Plating  
RoHS Compliant  
RDS(on) Drain to Source On Resistance  
VGS(th) Threshold Voltage  
Halogen Free  
TO-220 Plastic Package  
ORDERING INFORMATION  
Device  
CSD18502KCS  
Package  
Media  
Qty  
Ship  
Tube  
APPLICATIONS  
TO-220 Plastic  
Package  
Tube  
50  
DC-DC Conversion  
Secondary Side Synchronous Rectifier  
Motor Control  
ABSOLUTE MAXIMUM RATINGS  
TA = 25°C  
VALUE  
UNIT  
VDS  
VGS  
Drain to Source Voltage  
40  
V
V
DESCRIPTION  
The NexFET™ power MOSFET has been designed  
to minimize losses in power conversion applications.  
Gate to Source Voltage  
±20  
Continuous Drain Current (Package limited),  
TC = 25°C  
100  
200  
126  
Continuous Drain Current (Silicon limited),  
TC = 25°C  
ID  
A
Figure 1. Top View  
Continuous Drain Current (Silicon limited),  
TC = 100°C  
IDM  
PD  
TJ,  
Pulsed Drain Current (1)  
211  
216  
A
Power Dissipation  
W
Operating Junction and Storage  
–55 to 150  
330  
°C  
TSTG Temperature Range  
Avalanche Energy, single pulse  
ID = 81A, L = 0.1mH, RG = 25Ω  
EAS  
mJ  
(1) Pulse duration 300μs, duty cycle 2%  
RDS(on) vs VGS  
GATE CHARGE  
12  
10  
TC = 25°C Id = 100A  
ID = 100A  
TC = 125ºC Id = 100A  
VDS = 20V  
10  
8
8
6
4
2
0
6
4
2
0
0
2
4
6
8
10  
12  
14  
16  
18  
20  
0
5
10 15 20 25 30 35 40 45 50 55  
Qg - Gate Charge (nC)  
VGS - Gate-to- Source Voltage (V)  
G001  
G001  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NexFET is a trademark of Texas Instruments.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2012, Texas Instruments Incorporated  
 
CSD18502KCS  
SLPS367A AUGUST 2012REVISED OCTOBER 2012  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
ELECTRICAL CHARACTERISTICS  
(TA = 25°C unless otherwise stated)  
PARAMETER  
Static Characteristics  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
BVDSS  
IDSS  
Drain to Source Voltage  
VGS = 0V, ID = 250μA  
40  
V
Drain to Source Leakage Current  
Gate to Source Leakage Current  
Gate to Source Threshold Voltage  
VGS = 0V, VDS = 32V  
VDS = 0V, VGS = 20V  
VDS = VGS, ID = 250μA  
VGS = 4.5V, ID = 100A  
VGS = 10V, ID = 100A  
VDS = 20V, ID = 100A  
1
100  
2.1  
4.3  
2.9  
μA  
nA  
V
IGSS  
VGS(th)  
1.5  
1.8  
3.3  
2.4  
138  
mΩ  
mΩ  
S
RDS(on)  
Drain to Source On Resistance  
gfs  
Transconductance  
Dynamic Characteristics  
Ciss  
Coss  
Crss  
RG  
Input Capacitance  
3900  
900  
21  
4680  
1080  
26  
pF  
pF  
pF  
Output Capacitance  
Reverse Transfer Capacitance  
Series Gate Resistance  
Gate Charge Total (4.5V)  
Gate Charge Total (10V)  
Gate Charge Gate to Drain  
Gate Charge Gate to Source  
Gate Charge at Vth  
Output Charge  
VGS = 0V, VDS = 20V, f = 1MHz  
1.2  
25  
2.4  
30  
Qg  
nC  
nC  
nC  
nC  
nC  
nC  
ns  
ns  
ns  
ns  
Qg  
52  
62  
Qgd  
Qgs  
Qg(th)  
Qoss  
td(on)  
tr  
VDS = 20V, ID = 100A  
VDS = 20V, VGS = 0V  
8.4  
10.3  
7.5  
52  
Turn On Delay Time  
Rise Time  
11  
7.3  
33  
VDS = 20V, VGS = 10V,  
IDS = 100A, RG = 0Ω  
td(off)  
tf  
Turn Off Delay Time  
Fall Time  
9.3  
Diode Characteristics  
VSD  
Qrr  
trr  
Diode Forward Voltage  
ISD = 100A, VGS = 0V  
0.8  
105  
48  
1
V
Reverse Recovery Charge  
Reverse Recovery Time  
nC  
ns  
VDS= 20V, IF = 100A,  
di/dt = 300A/μs  
THERMAL CHARACTERISTICS  
(TA = 25°C unless otherwise stated)  
PARAMETER  
Thermal Resistance Junction to Case  
MIN  
TYP  
MAX  
UNIT  
°C/W  
°C/W  
RθJC  
RθJA  
0.6  
62  
Thermal Resistance Junction to Ambient  
2
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CSD18502KCS  
www.ti.com  
SLPS367A AUGUST 2012REVISED OCTOBER 2012  
TYPICAL MOSFET CHARACTERISTICS  
(TA = 25°C unless otherwise stated)  
Figure 2. Transient Thermal Impedance  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
180  
200  
180  
160  
140  
120  
100  
80  
VDS = 5V  
160  
140  
120  
100  
80  
60  
60  
40  
VGS =10V  
VGS =6.5V  
VGS =4.5V  
TC = 125°C  
TC = 25°C  
TC = −55°C  
40  
20  
20  
0
0
0
0.5  
1
1.5  
0
1
2
3
4
5
VDS - Drain-to-Source Voltage (V)  
VGS - Gate-to-Source Voltage (V)  
G001  
G001  
Figure 3. Saturation Characteristics  
Figure 4. Transfer Characteristics  
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SLPS367A AUGUST 2012REVISED OCTOBER 2012  
www.ti.com  
TYPICAL MOSFET CHARACTERISTICS (continued)  
(TA = 25°C unless otherwise stated)  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
10  
8
50000  
10000  
Ciss = Cgd + Cgs  
Coss = Cds + Cgd  
Crss = Cgd  
ID = 100A  
VDS = 20V  
6
1000  
100  
10  
4
2
0
0
5
10 15 20 25 30 35 40 45 50 55  
0
10  
20  
30  
40  
Qg - Gate Charge (nC)  
VDS - Drain-to-Source Voltage (V)  
G001  
G001  
Figure 5. Gate Charge  
Figure 6. Capacitance  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
2.5  
2.3  
12  
10  
8
ID = 250uA  
TC = 25°C Id = 100A  
TC = 125ºC Id = 100A  
2
1.7  
1.4  
1.1  
0.8  
0.5  
6
4
2
0
−75  
−25  
25  
75  
125  
175  
0
2
4
6
8
10  
12  
14  
16  
18  
20  
TC - Case Temperature (ºC)  
VGS - Gate-to- Source Voltage (V)  
G001  
G001  
Figure 7. Threshold Voltage vs. Temperature  
TEXT ADDED FOR SPACING  
Figure 8. On-State Resistance vs. Gate-to-Source Voltage  
TEXT ADDED FOR SPACING  
2.4  
2.1  
1.8  
1.5  
1.2  
0.9  
0.6  
0.3  
100  
VGS = 4.5V  
VGS = 10V  
ID =100A  
TC = 25°C  
TC = 125°C  
10  
1
0.1  
0.01  
0.001  
0.0001  
−75  
−25  
25  
75  
125  
175  
0
0.2  
0.4  
0.6  
0.8  
1
TC - Case Temperature (ºC)  
VSD − Source-to-Drain Voltage (V)  
G001  
G001  
Figure 9. Normalized On-State Resistance vs. Temperature  
Figure 10. Typical Diode Forward Voltage  
4
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Product Folder Links: CSD18502KCS  
CSD18502KCS  
www.ti.com  
SLPS367A AUGUST 2012REVISED OCTOBER 2012  
TYPICAL MOSFET CHARACTERISTICS (continued)  
(TA = 25°C unless otherwise stated)  
TEXT ADDED FOR SPACING  
TEXT ADDED FOR SPACING  
5000  
1000  
100  
1ms  
100ms  
1s  
DC  
10ms  
100  
10  
1
0.1  
0.01  
Single Pulse  
TypicalRthetaJA =52ºC/W  
TC = 25ºC  
TC = 125ºC  
10  
0.01  
0.01  
0.1  
1
10  
100  
0.1  
1
VDS - Drain-to-Source Voltage (V)  
TAV - Time in Avalanche (mS)  
G001  
G001  
Figure 11. Maximum Safe Operating Area  
Figure 12. Single Pulse Unclamped Inductive Switching  
TEXT ADDED FOR SPACING  
120  
100  
80  
60  
40  
20  
0
−50 −25  
0
25  
50  
75  
100 125 150 175  
TC - Case Temperature (ºC)  
G001  
Figure 13. Maximum Drain Current vs. Temperature  
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CSD18502KCS  
SLPS367A AUGUST 2012REVISED OCTOBER 2012  
www.ti.com  
MECHANICAL DATA  
KCS Package Dimensions  
Notes:  
1. All linear dimensions are in inches  
2. This drawing is subject to change without notice  
3. Lead Dimensions are not controlled within "C" area  
4. All lead dimensions apply before solder dip  
5. The center lead is in electrical contact with the mounting tab  
6. The chamfer at "F" is optional  
7. Thermal pad contour at "G" optional with these dimensions  
8. "H" Falls within JEDEC TO-220 variation AB, except minimum lead thickness, minimum exposed pad length,  
and maximum body length.  
Table 1. Pin Configuration  
Position  
Pin 1  
Designation  
Gate  
Pin 2 / Tab  
Pin 3  
Drain  
Source  
6
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Product Folder Links: CSD18502KCS  
CSD18502KCS  
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SLPS367A AUGUST 2012REVISED OCTOBER 2012  
REVISION HISTORY  
Changes from Original (August 2012) to Revision A  
Page  
Changed the Transconductance TYP value From: 149 S To: 138 S ................................................................................... 2  
Changed RθJA From: 65°C/W To: 62°C/W ............................................................................................................................ 2  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
20-Dec-2012  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package Qty  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Samples  
Drawing  
(1)  
(2)  
(3)  
(Requires Login)  
CSD18502KCS  
ACTIVE  
TO-220  
KCS  
3
50  
Pb-Free (RoHS  
Exempt)  
CU SN  
N / A for Pkg Type  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
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TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
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