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产品型号CXD2570的Datasheet PDF文件预览

®
HI2570, CXD2570  
1-Bit AD/DA  
Converter For Audio Application  
September 1997  
Features  
Description  
• Two-Channel AD/DA Converters and Their Each Deci-  
mation and Oversampling Digital Filter in a Single Chip  
• Simplified External Parts with a Built-In Analog Circuit  
Around AD Converter  
The HI2570, CXD2570 is a 1-bit stereo AD/DA converter  
which uses a 2nd-order system noise shaper. This LSI is  
especially suited for sampling frequency between 8kHz and  
32kHz.  
• Distortion  
- ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.015%  
- DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.009% (-3dB)  
Function  
• Data Can Be Input/Output at Rate of 1xF with a Built-  
S
• S/N Ratio (Typical Values when F = 16kHz)  
S
In Digital Filter  
- ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80dB  
- DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90dB  
• Ripple in the Digital Filter Pass Band . . . . . . . ±0.05dB<  
• Attenuation in the Digital Filter Rejection Band. . . 45dB>  
• Multi-Channel Systems can be Connected Using Several  
HI2570, CXD2570Qs  
• The 32-Slot Serial Data Interface Enables Independent  
Selection of Data Frontward Truncation/Rearward  
Truncation and MSB First/LSB First  
Applications  
- Telephones, TV Conference Systems, Language Lab-  
oratory Equipment, TV Game Equipment and Elec-  
tronic Musical Instrument  
• 512F /1024F (when F = 8 to 16kHz) or 256F /512F /  
S
S
S
S
S
S
S
S
768F /1024F (When F = 16 to 32kHz) Can be Used  
Ordering Information  
as the Master Clock  
• The Sampling Frequency of Not Only 8kHz or 16kHz, but  
32kHz or 44.1kHz Can Be Used for Audio Equipment  
PART  
NUMBER  
TEMP.  
RANGE ( C)  
o
PACKAGE  
48 Ld MPQF  
48 Ld MPQF  
PKG. NO.  
Q48.12x12-S  
Q48.12x12-S  
HI2570JCQ  
CXD2570Q  
-20 to 55  
• Various Frequency Divided Clocks are Output for LSIs  
Connected  
-20 to 55  
Pinout  
HI2570, CXD2570 (48 LEAD MQFP)  
TOP VIEW  
48 47 46 45 44 43 42 41 40 39 38 37  
XSL2  
XSL1  
XSL0  
36  
1
AV  
3
DD  
AOUT1-  
AV  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
2
3
3
SS  
MLSL  
MASL  
DV  
SS  
UCLK  
XCLK  
4
5
XV  
DD  
6
SOUT  
XTLI  
7
SIN  
BCK  
XTLO  
8
XV  
SS  
9
LRCK  
MS  
AV  
4
10  
11  
12  
SS  
AOUT2-  
AV  
DV  
DD  
4
DD  
13 14 15 16 17 18 19 20 21 22 23 24  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.  
File Number 4122.1  
Copyright © Intersil Americas Inc. 2002. All Rights Reserved  
1
®
File Number  
2
HI2570, CXD2570  
Pin Descriptions  
PIN NO.  
SYMBOL  
I/O  
O
DESCRIPTION  
1
2
3
4
AV  
3
Analog power supply for channel-1 DA converter  
Analog reversed phase output of channel-1 DA converter  
Analog GND for channel-1 DA converter  
DD  
AOUT1 (-)  
AV  
3
O
SS  
UCLK  
Outputs a 1/2 frequency divider of clock input from oscillation pin XTLI (Pin 7).  
User clock output for the externally connected ICs.  
5
XCLK  
O
256Fs/512Fs clock output. This provides the master clock for ICs operating in  
the slave mode when multiple CXD2570Qs are connected.  
6
7
XV  
DD  
I
Digital power supply for the master clock  
XTLI  
Crystal oscillation circuit input. Connects the crystal oscillator selected by the  
crystal selector pins XSL0 to 2 (Pins 34, 35 and 36). To input an external mas-  
ter clock, this pin is used.  
8
9
XTLO  
O
Crystal oscillation circuit output. Connects the crystal oscillator selected by the  
crystal selector pins XSL0 to 2 (Pins 34, 35 and 36).  
XV  
AV  
O
Digital GND for the master clock  
SS  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
4
Analog GND for channel-2 DA converter  
Analog reversed phase output of channel-2 DA converter  
Analog power supply for channel-2 DA converter  
Analog forward phase output of channel-2 DA converter  
Analog GND for channel-2 DA converter  
Analog GND for channel-2 AD converter  
Analog input of channel-2 converter  
SS  
AOUT2 (-)  
AV  
4
O
DD  
AOUT2 (+)  
AV  
AV  
4
2
I
SS  
SS  
AIN1  
AV  
2
Analog power supply for channel-2 AD converter  
DD  
NC  
SUB  
Connected to the substrate in the IC (having the same potential as power sup-  
ply). Connect this pin to GND via a capacitor on the external printed wiring  
board.  
20  
21  
22  
23  
24  
NC  
O
I
DV  
SS  
Digital GND  
XMCK2  
TEST  
CLR  
IC measurement. Normally, Low is output.  
Test. Normally, fixed at Low. Equipped with a pull-down resistor.  
I
System clear input. Normally, fixed at High; cleared at Low. Equipped with a  
pull-up resistor.  
25  
26  
DV  
DD  
I
Digital power supply.  
MS  
Master/slave mode switching input. High = Master mode. Low = Slave mode.  
Equipped with a pull-up resistor.  
27  
LRCK  
I/O  
Sampling frequency clock pin of serial I/O. Outputs in master mode (when Pin  
26 is High). Inputs in slave mode (when Pin 26 is Low). Transfers channel-1  
data at High; transfers channel-2 data at Low.  
3
HI2570, CXD2570  
Pin Descriptions (Continued)  
PIN NO.  
SYMBOL  
I/O  
DESCRIPTION  
28  
BCK  
I/O  
Serial bit transfer clock for serial input data SIN or serial output data SOUT  
(64FS). Outputs in master mode (when Pin 26 is High). Inputs in slave mode  
(when Pin 26 is Low). Retrieves serial input data at  
put data at  
; send serial out-  
.
29  
30  
SIN  
I
Serial data input of 2-channel sampling. The data format is 2’s complement,  
and consists of 32-bit slot.  
SOUT  
O
Serial data output of 2-channel per sampling. The data format is 2’s comple-  
ment, and consists of 32-bit slot.  
31  
32  
DV  
SS  
I
Digital GND  
MASL  
Selects whether 16-bit serial data is applied in the first 16-bits or the last 16-  
bit of 32-bit slot in serial I/O. High = Frontward truncation; Low = Rearward  
truncation  
33  
34  
35  
36  
MLSL  
XSL0  
XSL1  
XSL2  
I
I
I
I
Selects whether 16-bit serial data is input/output at LSB first or MSB first in  
serial I/O. High = MSB first; Low = LSB first  
Crystal oscillator selection. Three bits, XSL0 to 2. Selects the clock frequency  
to be input from XTLI (Pin 7).  
Crystal oscillator selection. Three bits, XSL0 to 2. Selects the clock frequency  
to be input from XTLI (Pin 7).  
Crystal oscillator selection. Three bits, XSL0 to 2. Selects the clock frequency  
to be input from XTLI (Pin 7).  
37  
38  
39  
DASL0  
DASL1  
WO  
I
I
I
IC measurement. Normally, fixed at High.  
IC measurement. Normally fixed at Low.  
Window masked when High; window open when Low (forced synchroniza-  
tion). Equipped with a pull-up resistor.  
40  
41  
42  
43  
DV  
NC  
NC  
Digital power supply  
DD  
SUB  
Connected to the substrate in the IC (having the same potential as power sup-  
ply). Connect this pin to GND via capacitor on the external printed wiring  
board.  
44  
45  
46  
47  
48  
AV  
1
I
Analog power supply for channel-1 AD converter  
Analog input of channel-1 AD converter  
DD  
AIN1  
AV  
AV  
1
3
O
Analog GND for channel-1 AD converter  
SS  
Analog GND for channel-1 DA converter  
SS  
AOUT1 (+)  
Analog forward phase output of channel-1 DA converter  
4
HI2570, CXD2570  
o
Absolute Maximum Ratings  
T
= 25 C  
I/O Capacitance  
A
Supply Voltage (V ). . . . . . . . . . . . . . . . . . . . . . V –0.5V to 7.0V  
DD SS  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MIN  
TYP  
MAX  
9pF  
11pF  
11 pF  
Input Voltage (V ). . . . . . . . . . . . . . . . . . .V – 0.5V to V  
+ 0.5V  
Input Pin (C  
Output Pin (C  
)
. —  
1
SS  
DD  
IN  
Output Voltage (V ) . . . . . . . . . . . . . . . . .V 0.5V to V  
+ 0.5V  
) . . . . . . . . . . . . . . . . . . .  
0
SS  
DD  
OUT  
o
ο
Operating Temperature (Topr) . . . . . . . . . . . . . . . . . . -20 C to 75 C  
Bidirectional Pin (C ) . . . . . . . . . . . . . . . . -—  
I/O  
o
o
Storage Temperature (Tstg . . . . . . . . . . . . . . . . . . . -55 C to 150 C  
Measurement conditions: V  
= V = 0V, f = 1MHz  
1
DD  
Recommended Operating Conditions  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . MIN  
TYP  
MAX  
Supply Voltage (Note 1) (V 4.5V 5.0V  
)
5.5V  
+75 C  
33kHz  
DD  
Ambient Temperature (T ). . . . . . . . . . . . . . -20 C  
o
o
A
Sampling Frequency (Note 2) (F ). . . . . . . . 7kHz  
S
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation  
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTES:  
1. The analog power supplies for AD converters (Pins 17 and 44) must be turned on simultaneously with or before other poser supplies.  
turning on these power supplies after any other power supply may cause the device to fall into latch-up condition. this precaution, how-  
ever, does not apply when turning off the power supplies.  
2. Although the device can operate with F frequencies such as F = 44.1kHz or 48kHz, its analog characteristics deteriorate to extent.  
S
S
When used at only these F frequencies, the CXD255Q is recommended that is pin-compatible with the CXD2570Q.  
S
Electrical Specifications  
PART NUMBER  
OR GRADE  
TEST  
CONDITIONS  
APPLICABLE  
PINS  
PARAMETER  
SYMBOL  
MIN  
TYP  
MAX  
UNITS  
DC Characteristics  
AV 1 = AV 2 = AV 3 = AV 4 = XV  
= DV  
= 5.0V ± 10%, AV 1 = AV 2 = AV 3 = AV 4 =  
DD DD DD DD DD  
DD  
SS  
SS  
SS  
SS  
o
o
XV = DV  
= 0V, T = -20 C to 75 C  
SS  
SS  
A
Input Voltage  
V
V
V
V
V
V
V
V
V
V
V
0.7V  
DD  
Ò
V
*1  
IHC  
Ò
0.3V  
DD  
ILC  
Analog Input  
V
-50  
50  
1M  
43  
V
V
V
*2  
*3  
IN  
SS  
-0.5  
DD  
DD  
Output Voltage  
I
I
I
I
I
I
I
I
= -2mA  
= 4mA  
V
V
V
OH1  
OL1  
OH2  
OL2  
OH3  
OL3  
OH4  
OL4  
OH  
OL  
OH  
OL  
OH  
OL  
OH  
OL  
DD  
0
0.4  
= -4mA  
= 4mA  
-0.5  
V
DD  
0.4  
V
V
V
*4  
*5  
*6  
DD  
0
= -12mA  
= 16mA  
= -2mA  
= 4mA  
V
DD  
0
/2  
V
DD  
/2  
V
DD  
V
-0.8  
V
DD  
DD  
0
0.4  
10  
40  
Input Leak Current 1  
Input Leak Current 2  
Input Leak Current 3  
Input Leak Current 4  
Output Leak Current  
Feedback Resistance  
Supply Current  
I
I
I
I
I
-10  
-40  
-20  
20  
µA  
µA  
µA  
µA  
µA  
*7  
*8  
LI1  
LI2  
LI3  
LI4  
LZ  
-12-  
120  
40  
*9  
*10  
*11  
*12  
-40  
250K  
R
V
= V  
or V  
DD  
‘2.5M  
60  
FB  
IN  
SS  
I
(Note 3)  
mA  
DD  
AC Characteristics  
AV 1 = AV 2 = AV 3 = AV 4 = XV  
DD DD DD DD DD  
= DV  
= 5.0V ± 10%, AV 1 = AV 2 = AV 3 = AV 4 =  
SS SS SS SS  
DD  
o
o
XV = DV  
= 0V, T = -20 C to 75 C  
SS  
SS  
A
SIN Setup Time  
SIN Hold Time  
tsus  
ths  
tsul  
thl  
10  
15  
10  
15  
-40  
30  
ns  
ns  
ns  
ns  
ns  
LRCK Setup Time  
LRCK Hold Time  
LRCK Delay Time  
Slave mode  
Slave mode  
tdl  
Master mode  
CL = 130pF  
5
HI2570, CXD2570  
Electrical Specifications (Continued)  
PART NUMBER  
OR GRADE  
TEST  
CONDITIONS  
APPLICABLE  
PINS  
PARAMETER  
SOUT Delay Time  
SYMBOL  
tds  
MIN  
9
TYP  
MAX  
UNITS  
ns  
CL = 60pF  
65  
42  
SOUT Data Recovery Time  
SOUT Data Erase Time  
tzd  
tdz  
7
ns  
6
40  
ns  
XTLI Pulse Width for Low Period twl  
FS = 16kHz, 256Fs  
40  
200  
ns  
(XSL0 = XSL1 = XSL2 = Low  
NOTES:  
3. This includes current consumption at load resistance (RL = 3.9). Fs = 16kHz  
*1 All input pins except AIN1 and AIN2, and when bidirectional pins (BCK and LRCK) are input mode.  
*2 AIN1, AIN2  
*3 XCLK, XMCK2, SOUT  
*4 AOUT1 (+), AOUT1 (-), AOUT2 (+), AOUT2 (-), UCLK  
*5 XTLO  
*6 When bidirectional pins (BCK and LRCK) are output mode  
*7 All input pins except AIN1 and AIN2  
*8 When directional pins (BCK and LRCK) are input mode  
*9 MS, WO, CLR  
*10 TEST  
*11 SOUT, AOUT1 (+), AOUT1 (-), AOUT2 (+), AOUT2 (-), UCLK  
*12 Resistance between XTLO and XTLI  
Analog Characteristics AV 1 = AV 2 = AV 3 = AV 4 = XV  
= DV = 5.0V ± 10%, AV 1 = AV 2 = AV 3 = AV 4 =  
DD SS SS SS SS  
DD  
DD  
DD  
DD  
DD  
o
XV = DV = 0V, T = 25 C  
SS SS  
A
ITEM  
CONDITIONS  
MIN.  
TYP.  
MAX.  
UNIT  
ADC + DAC Connection Overall Characteristics. Measured under the following conditions unless otherwise specified.  
Input waveform = 1kHz sine wave, 1.4Vrms (= 0dB), R = 16kΩ  
IN  
XTAI = 16.384MHz (= 1024Fs, Fs = 16kHz)  
CLR = MS = WO = open (= 5V)  
SOUT and SIN directly coupled.  
S/N Ratio  
8kHz LPF  
8kHz LPF  
74  
74  
80  
0.015  
80  
0.03  
dB  
%
THD + N  
Dynamic Range  
1kHz, -60dB  
8kHz LPF  
dB  
Channel Separation  
Gain Difference Between Channels  
Gain  
1kHz, 0dB  
-3  
97  
0.1  
0
+3  
dB  
dB  
RL = 3.9kW  
dB  
Input Level  
R
R
= 0Ω  
0.1  
1.4  
030F  
1.2  
Vrms  
Vrms  
Hex  
kΩ  
IN  
IN  
= 16Ω  
DC Offset (ADC Output)  
ADC Input Impedance  
DAC characteristics in a single unit. Measured under the following conditions unless otherwise specified.  
Input data = 1kHz sine wave, full scale (= 0dB)  
XTAI = 16.384MHz (= 1024Fs, Fs = 16kHz  
CLR = WO = open (= 5V), MS = GND  
S/N Ratio  
8kHz LPF  
84  
82  
90  
0.009  
88  
0.03  
dB  
%
THD + N  
8kHz LPF, -3dB  
Dynamic Range  
1kHz, -60dB  
8kHz LPF  
dB  
6
HI2570, CXD2570  
Analog Characteristics AV 1 = AV 2 = AV 3 = AV 4 = XV  
= DV  
= 5.0V ± 10%, AV 1 = AV 2 = AV 3 = AV 4 =  
DD  
DD  
DD  
DD  
DD  
DD SS SS SS SS  
o
XV = DV = 0V, T = 25 C (Continued)  
SS  
SS  
A
ITEM  
Channel Separation  
CONDITIONS  
MIN.  
TYP.  
100  
MAX.  
UNIT  
dB  
1kHz, 0dB  
Gain Difference Between Channels  
Output Level  
0.05  
1.93  
dB  
R
= 3.9kW  
1.80  
2.10  
Vrms  
L
Description of Functions  
CRYSTAL  
OSCILLATOR  
FREQUENCY  
1. Serial data interface  
XSL2  
XSL1  
XSL0  
XCLK UCLK  
256Fs 128Fs  
256Fs 256Fs  
256Fs 384Fs  
256Fs 512Fs  
[Related pins] LRCK, BCK, SOUT, SIN, MASL, MLSL  
L
L
L
L
L
L
L
H
L
256Fs  
512Fs  
768Fs  
1024Fs  
The serial data format is common for both SIN (DA converter  
input) and SOUT (AD converter output), consisting of two  
channels per sampling serial data represented by 2’s com-  
plement. Each channel is divided into 32-bit slots, of which  
16 bits are handled as data.  
H
H
H
*The CXD2555Q, which has the same pin configuration with  
this IC is recommended when using only Fs = 32kHz to  
48kHz.  
MASL is used to select whether the 16 bits of valid data is  
placed in the first or the last half of the 32-bit slots.  
4. Crystal oscillator frequency selection (FS = 8kHz to  
16kHz)  
Similarly, MLSL is used to select whether the serial data is  
arranged at MSB first of LSB first.  
[Related pins] XTLI, XTLO, XSL0, XSL1, XSL2, UCLK,  
XCLK  
MASL  
High  
Low  
MLSL  
High  
Low  
Frontward truncation  
Rearward truncation  
MSB first  
LSB first  
With XSL2 fixed High, the device can be operated with low-  
Fs frequencies. In this case, the frequency of the crystal  
oscillator can be selected by setting a combination of XSL0  
and XSL1 accordingly.  
2. Master mode/slave mode  
[Related pins] MS, LRCK, BCK  
CRYSTAL  
OSCILLATOR  
FREQUENCY*  
When using the CXD2570Q in multiple units or in a pair with  
DA converter such as the CXD2558M, one of these  
CXD2570Qs should be in the master mode to serve as the  
source of clocks LRCK and BCK.  
XSL2  
XSL1  
XSL0  
XCLK UCLK  
H
H
H
H
L
L
L
H
L
512Fs  
512Fs 256Fs  
H
H
1024Fs  
512Fs 512Fs  
The other ICs including CXD2570Qs are used in the slave  
mode, with their clocks LRCK and BCK supplied by the mas-  
ter CXD2570Q.  
H
5. A/D converter input level  
MS  
High  
Low  
MODE  
LRCK AND BCK I/O  
Any desired input level V (m . 0.1Vrms) can be selected by  
IN  
adjusting R to generate the full-scale output of the AD con-  
Master mode  
Slave mode  
Output  
Input  
IN  
verter.  
V
generation of full-scale output varies with the products,  
IN  
3. Crystal oscillator frequency selection (FS = 16kHz to  
48kHz)  
and calculate the V maximum level (approximately -3dB  
below the full-scale) using the following equation to input the  
signal.  
IN  
[Related pins] XTLI, XTLO, XSL0, XSL1, XSL2, UCLK,  
XCLK  
(1) Fs = 16kHz to 48kHz (XSL2 = Low)  
R
= 1230 V [Vrms] -1200 ()  
By setting a combination of XSL0 and XSL1, with XSL2 fixed  
low, the frequency of the external crystal oscillator con-  
nected to XTLI and XTLO can be selected. In this case,  
XCLK outputs a clock whose frequency is always 256 times  
Fs, and UCLK outputs a clock that is half the crystal oscilla-  
tor frequency.  
IN  
IN  
(2) Fs = 8 to 16kHz (XSL2 = High)  
= 26600 V [Vrms] -1200 ()  
R
IN  
IN  
6. D/A converter output level  
To change the D/A converter output level, adjust R15, R17,  
R30 and R32 in Application Circuit on page.  
When supplying the master clock from some other external  
source, not a crystal oscillator, use XTLI for this clock input  
and leave XTLO open.  
7
HI2570, CXD2570  
Metric Plastic Quad Flatpack Packages (MQFP)  
D
Q48.12x12-S  
D1  
48 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE  
INCHES  
MILLIMETERS  
SYMBOL  
MIN  
MAX  
MIN  
2.05  
MAX  
2.55  
NOTES  
A
A1  
B
0.081  
0.000  
0.008  
0.587  
0.469  
0.587  
0.469  
0.028  
0.100  
0.011  
0.017  
0.618  
0.488  
0.618  
0.488  
0.043  
-
0.00  
0.30  
-
0.20  
0.45  
5
D
14.90  
11.90  
14.90  
11.90  
0.70  
15.70  
12.40  
15.70  
12.40  
1.10  
2
E
E1  
D1  
E
3, 4  
2
E1  
L
3, 4  
-
e
N
48  
0.032 BSC  
48  
0.80 BSC  
6
e
-
PIN 1  
Rev. 0 2/96  
SEATING  
PLANE  
NOTES:  
-H-  
A
1. Controlling dimension: MILLIMETER. Converted inch dimen-  
sions are not necessarily exact.  
0.15  
0.006  
-C-  
-H-  
2. Dimensions D and E to be determined at seating plane  
3. Dimensions D1 and E1 to be determined at datum plane  
4. Dimensions D1 and E1 do not include mold protrusion.  
5. Dimension B does not include dambar protrusion.  
6. “N” is the number of terminal positions.  
.
.
-C-  
M
0.24  
B
A1  
o
o
0 -10  
L
0.10/0.25  
0.004/0.010  
8
配单直通车
CXD2570Q产品参数
型号:CXD2570Q
生命周期:Obsolete
IHS 制造商:INTERSIL CORP
零件包装代码:QFP
包装说明:,
针数:48
Reach Compliance Code:unknown
HTS代码:8542.39.00.01
风险等级:5.84
模拟集成电路 - 其他类型:ANALOG CIRCUIT
JESD-30 代码:S-PQFP-F48
端子数量:48
最高工作温度:75 °C
最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY
封装形状:SQUARE
封装形式:FLATPACK
认证状态:Not Qualified
最大供电电流 (Isup):60 mA
最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V
表面贴装:YES
温度等级:COMMERCIAL EXTENDED
端子形式:FLAT
端子位置:QUAD
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