DAC7744EB应用文章市场行情现货热卖使用介绍供应商报价-中国IC网-芯三七

®

DAC7744

For most current data sheet and other product

information, visit www.burr-brown.com

16-Bit, Quad Voltage Output

DIGITAL-TO-ANALOG CONVERTER

FEATURES

● LOW POWER: 200mW

DESCRIPTION

The DAC7744 is a 16-bit, quad voltage output digital-

to-analog converter with guaranteed 16-bit monotonic

performance over the specified temperature range. It

accepts 16-bit parallel input data, has double-buffered

DAC input logic (allowing simultaneous update of all

DACs), and provides a readback mode of the internal

input registers. Programmable asynchronous reset

clears all registers to a mid-scale code of 8000_Hor to

a zero-scale of 0000_H. The DAC7744 operates from

either a single +15V supply or from a +15V, –15V,

and +5V supply.

● UNIPOLAR OR BIPOLAR OPERATION

● SINGLE-SUPPLY OUTPUT RANGE: +10V

● DUAL SUPPLY OUTPUT RANGE: ±10V

● SETTLING TIME: 10µs to 0.003%

● 16-BIT MONOTONICITY: –40°C to +85°C

● PROGRAMMABLE RESET TO MID-SCALE

OR ZERO-SCALE

● DATA READBACK

● DOUBLE-BUFFERED DATA INPUTS

Low power and small size per DAC make the DAC7744

ideal for automatic test equipment, DAC-per-pin pro-

grammers, data acquisition systems, and closed-loop

servo-control. The DAC7744 is available in a 48-

lead SSOP package, and offers guaranteed specifica-

tions over the –40°C to +85°C temperature range.

APPLICATIONS

● PROCESS CONTROL

● ATE PIN ELECTRONICS

● CLOSED-LOOP SERVO-CONTROL

● MOTOR CONTROL

● DATA ACQUISITION SYSTEMS

● DAC-PER-PIN PROGRAMMERS

V_REF

L

V_REF

H

AB Sense

V_REFL AB V_REFH AB

V_DD

V_SS

V_CC

DAC7744

16

I/O

Buffer

Input

Register A

DAC

Register A

DATA I/O

DAC A

V_OUTA

V_OUT

A

Sense

Input

Register B

DAC

Register B

DAC B

DAC C

DAC D

V_OUTB

A1

A0

Input

Register C

DAC

Register C

Control

Logic

V_OUTC

CS

R/W

V_OUTC

Input

Register D

DAC

Register D

V_OUTD

V_REFL CD V_REFH CD

V_REF

CD Sense

L

V_REF

CD Sense

H

AGND DGND

RST

RSTSEL LOADDACs

International Airport Industrial Park

•

Mailing Address: PO Box 11400, Tucson, AZ 85734

•

Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706

• Tel: (520) 746-1111

Twx: 910-952-1111

•

Internet: http://www.burr-brown.com/

•

Cable: BBRCORP Telex: 066-6491

•

FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132

•

®

^PDS-1^1534A

^PD^rintA^edC^{in U}7^.S7^.A4^.4^{November, 1999}

SPECIFICATIONS (Dual Supply)

At T_A= T_MINto T_MAX, V_CC= +15V, V_DD= +5V, V_SS= –15V, V_REFH = +10V, and V_REFL = –10V, unless otherwise noted.

DAC7744E

TYP

DAC7744EB

TYP

DAC7744EC

TYP

PARAMETER

CONDITIONS

MIN

MAX

MIN

MAX

MIN

MAX

UNITS

ACCURACY

Linearity Error

T_MINto T_MAX

T = 25°C

±3

±4

✻

±2

±3

LSB

Linearity Match

Differential Linearity Error

±4

✻

±2

LSB

T = 25°C

±3

±2

±1

T

_MINto T_MAX

Monotonicity, T_MINto T_MAX

Bipolar Zero Error

Bipolar Zero Error, T_MINto T_MAX

Full-Scale Error

Full-Scale Error, T_MINto T_MAX

Bipolar Zero Matching

14

15

16

Bits

T = 25°C

±0.01

±0.025

±0.05

±0.025

±0.05

✻

% of FSR

Channel-to-Channel

Matching

±0.024

Full-Scale Matching

Channel-to-Channel

Matching

±0.024

✻

% of FSR

ppm/V

Power Supply Rejection Ratio (PSRR)

At Full Scale

25

ANALOG OUTPUT

Voltage Output

Output Current

Maximum Load Capacitance

Short-Circuit Current

Short-Circuit Duration

V_REF

±5

L

V_REF

H

✻

V

mA

pF

500

±20

Indefinite

✻

mA

To V_SS, V_DDor GND

REFERENCE INPUT

Ref High Input Voltage Range

Ref Low Input Voltage Range

Ref High Input Current

V_REFL + 1.25

–10

–0.3

+10

V_REFH – 1.25

2.6

✻

V

mA

✻

Ref Low Input Current

–3.2

–0.3

DYNAMIC PERFORMANCE

Settling Time

To ±0.003%, 20V

Output Step

9

11

✻

µs

Channel-to-Channel Crosstalk

Digital Feedthrough

Output Noise Voltage

See Figure 5

0.5

2

60

✻

LSB

nV-s

nV/√Hz

f = 10kHz

DIGITAL INPUT

V_IH

V_IL

I_IH

0.7 • V_DD

0

V_DD

0.3 • V_DD

±10

✻

V

µA

✻

I_IL

±10

DIGITAL OUTPUT

V_OH

V_OL

I_OH= –0.8mA

I_OL= 1.6mA

3.6

4.5

0.3

✻

V

0.4

✻

POWER SUPPLY

V_DD

V_CC

V_SS

I_DD

I_CC

I_SS

+4.75

+14.25

–14.25

+5.0

+15.0

–15.0

50

6

–5

+5.25

+15.75

–15.75

✻

V

µA

mA

mW

Power

170

200

+85

TEMPERATURE RANGE

Specified Performance

–40

✻

°C

✻ Specifications same as grade to the left.

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant

any BURR-BROWN product for use in life support devices and/or systems.

®

2

DAC7744

SPECIFICATIONS (Single Supply)

At T_A= T_MINto T_MAX, V_CC= +15V, V_DD= +5V, V_SS= GND, V_REFH = +10V, and V_REFL = +50mV, unless otherwise noted.

DAC7744E

TYP

DAC7744EB

TYP

DAC7744EC

TYP

PARAMETER

CONDITIONS

MIN

MAX

MIN

MAX

MIN

MAX

UNITS

ACCURACY

Linearity Error⁽¹⁾

T = 25°C

±3

±4

✻

±2

±3

LSB

T

_MINto T_MAX

Linearity Match

±4

✻

±2

LSB

Differential Linearity Error

T = 25°C

±3

±2

±1

LSB

T

_MINto T_MAX

Monotonicity, T_MINto T_MAX

Unipolar Zero

Unipolar Zero Error, T_MINto T_MAX

Full-Scale Error

Full-Scale Error, T_MINto T_MAX

Unipolar Zero Matching

14

15

16

Bits

T = 25°C

±0.01

±0.025

±0.05

±0.025

±0.05

✻

% of FSR

Channel-to-Channel

Matching

±0.024

Full-Scale Matching

Channel-to-Channel

Matching

±0.024

✻

% of FSR

ppm/V

Power Supply Rejection Ratio (PSRR)

At Full Scale

25

ANALOG OUTPUT

Voltage Output

V_REFL = 0V, V_SS= 0V

0

V_REF

H

✻

V

R = 10kΩ

Output Current

±5

mA

pF

mA

Maximum Load Capacitance

Short-Circuit Current

Short-Circuit Duration

500

±20

Indefinite

✻

To V_SS, V_CCor GND

REFERENCE INPUT

Ref High Input Voltage Range

Ref Low Input Voltage Range

Ref High Input Current

V_REFL + 1.25

0

–0.3

–1.5

+10

V_REFH – 1.25

1.0

✻

V

mA

✻

Ref Low Input Current

–0.3

DYNAMIC PERFORMANCE

Settling Time

To ±0.003%, 10V

Output Step

8

10

✻

µs

Channel-to-Channel Crosstalk

Digital Feedthrough

Output Noise Voltage

See Figure 6

0.5

2

60

✻

LSB

nV-s

nV/√Hz

f = 10kHz

DIGITAL INPUT

V_IH

V_IL

I_IH

0.7 • V_DD

0

V_DD

0.3 • V_DD

±10

✻

V

µA

✻

I_IL

±10

DIGITAL OUTPUT

V_OH

V_OL

I_OH= –0.8mA

I_OL= 1.6mA

3.6

4.5

0.3

✻

V

0.4

✻

POWER SUPPLY

V_DD

V_CC

V_SS

I_DD

I_CC

Power

+4.75

+14.25

+5.0

+15.0

0

50

3.5

50

+5.25

+15.75

✻

V

µA

mA

mW

70

TEMPERATURE RANGE

Specified Performance

–40

+85

✻

°C

✻ Specifications same as grade to the left.

NOTE: (1) If V_SS= 0V, the specification applies at code 0021_Hand above, due to possible negative zero scale error.

®

3

DAC7744

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

ELECTROSTATIC

DISCHARGE SENSITIVITY

V_CCto V_SS........................................................................... –0.3V to +32V

V

_CCto AGND ...................................................................... –0.3V to +16V

_SSto AGND ...................................................................... +0.3V to –16V

This integrated circuit can be damaged by ESD. Burr-Brown

recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

AGND to DGND ................................................................. –0.3V to +0.3V

V

_REFH to AGND ..................................................................... –9V to +11V

_REFL to AGND ...................................................................... –11V to +9V

_DDto GND ........................................................................... –0.3V to +6V

_REFH to V_REFL ........................................................................ –1V to 22V

Digital Input Voltage to GND ................................... –0.3V to V_DD+ 0.3V

Digital Output Voltage to GND ................................. –0.3V to V_DD+ 0.3V

Maximum Junction Temperature ................................................... +150°C

Operating Temperature Range ........................................–40°C to +85°C

Storage Temperature Range .........................................–65°C to +150°C

Lead Temperature (soldering, 10s) ............................................... +300°C

ESD damage can range from subtle performance degradation

to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric

changes could cause the device not to meet its published

specifications.

NOTE: (1) Stresses above those listed under “Absolute Maximum Ratings”

may cause permanent damage to the device. Exposure to absolute maximum

conditions for extended periods may affect device reliability.

PACKAGE/ORDERING INFORMATION

LINEARITY

ERROR

(LSB)

DIFFERENTIAL

NONLINEARITY

(LSB)

PACKAGE

DRAWING

NUMBER

SPECIFICATION

TEMPERATURE

RANGE

ORDERING

NUMBER⁽¹⁾

TRANSPORT

MEDIA

PRODUCT

PACKAGE

DAC7744E

±4

±3

48-Lead SSOP

333

–40°C to +85°C

DAC7744E

Rails

"

DAC7744E/1K

Tape and Reel

DAC7744EB

±4

±2

48-Lead SSOP

333

–40°C to +85°C

DAC7744EB

Rails

"

DAC7744EB/1K

Tape and Reel

DAC7744EC

±3

±1

48-Lead SSOP

333

–40°C to +85°C

DAC7744EC

Rails

"

DAC7744EC/1K

Tape and Reel

NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces

of “DAC7744E/1K” will get a single 1000-piece Tape and Reel.

ESD PROTECTION CIRCUITS

V_CC

V_OUTSense

RefH

RefH Sense

V_OUT

AGND

RefL Sense

RefL

V_SS

4

1 of 2

1 of 4

V_DD

Typ of Each

Logic Input Pin

DGND

Typ of Each

I/O Pin

®

4

DAC7744

PIN DESCRIPTIONS

PIN CONFIGURATION

NAME

DESCRIPTION

Top View

SSOP

1

2

DB15

DB14

DB13

DB12

DB11

DB10

DB9

Data Bit 15, MSB

Data Bit 14

Data Bit 13

Data Bit 12

Data Bit 11

Data Bit 10

Data Bit 9

3

DB15 (MSB)

DB14

DB13

DB12

DB11

DB10

DB9

1

2

3

4

5

6

7

8

9

48 NC

47 NC

46 NC

45 NC

4

5

6

7

8

DB8

Data Bit 8

9

DB7

Data Bit 7

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

V

_OUTA Sense

10

11

12

13

14

15

16

17

DB6

Data Bit 6

_OUTA

DB5

Data Bit 5

DB4

Data Bit 4

_REFL AB Sense

_REFL AB

DB3

Data Bit 3

DB8

DB2

Data Bit 2

DB7

_REFH AB

DB1

Data Bit 1

DB0

Data Bit 0, LSB

DB6 10

DB5 11

_REFH AB Sense

_OUTB Sense

_OUTB

RSTSEL

Reset Select. Determines the action of RST. If

HIGH, a RST command will set the DAC regis-

ters to mid-scale. If LOW, a RST command will

set the DAC registers to zero.

DB4 12

DAC7744

DB3 13

_OUTC Sense

_OUTC

18

RST

Reset, Edge-Triggered. Depending on the state

of RSTSEL, the DAC Input and Output registers

are set to either mid-scale or zero.

DB2 14

DB1 15

_REFH CD Sense

_REFH CD

19

20

21

22

LOADDACs

DACOutputRegistersLoadControl.Risingedge

triggered.

DB0 (LSB) 16

RSTSEL 17

RST 18

R/W

A1

Enabled by the CS, controls data read and write

from the input register.

_REFL CD

Enabled by the CS, in combination with A0

selects the Individual DAC Input Registers.

_REFL CD Sense

_OUTD Sense

_OUTD

A0

Enabled by the CS, in combination with A1

selects the individual DAC input registers.

LOADDACs 19

R/W 20

23

24

CS

Chip Select, Active LOW.

Digital Ground

A1 21

28 V_SS

27 AGND

26 V_CC

25 V_DD

DGND

25

26

27

28

29

30

V_DD

V_CC

Positive Power Supply

Analog Ground

A0 22

CS 23

AGND

V_SS

Negative Power Supply

DAC D Voltage Output

DGND 24

V

_OUTD

V_OUTD Sense

DAC D’s Output Amplifier Inverting Input. Used

to close the feedback loop at the load.

31

32

33

34

35

36

V_REFL CD Sense DAC C and D Reference Low Sense Input

V

_REFL CD

DAC C and D Reference Low Input

DAC C and D Reference High Input

V_REFH CD

V

_REFH CD Sense DAC C and D Reference High Sense Input

V

_OUTC

DAC C Voltage Output

V

_OUTC Sense

DAC C’s Output Amplifier Inverting Input. Used

to close the feedback loop at the load.

37

38

V

_OUTB

DAC B Voltage Output

_OUTB Sense

DAC B’s Output Amplifier Inverting Input. Used

to close the feedback loop at the load.

39

40

41

42

43

44

V

_REFH AB Sense DAC A and B Reference High Sense Input

V

_REFH AB

DAC A and B Reference High Input

DAC A and B Reference Low Input

V

_REFL AB

V

_REFL AB Sense DAC A and B Reference Low Sense Input

V

_OUTA

DAC A Voltage Input

V

_OUTA Sense

DAC A’s Output Amplifier Inverting Input. Used

to close the feedback loop at the load.

45

46

47

48

NC

No Connection

®

5

DAC7744

TYPICAL PERFORMANCE CURVES: V_SS= 0V

At T_A= +25°C, V_DD= +5V, V_CC= +15V, V_SS= 0, V_REFH = +10V, and V_REFL = 0V, representative unit, unless otherwise specified.

+25°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, +25°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, +25°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC C, +25°C)

2.0

1.5

1.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0.5

0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

+85°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +85°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, +85°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

®

6

DAC7744

TYPICAL PERFORMANCE CURVES: V_SS= 0V (Cont.)

At T_A= +25°C, V_DD= +5V, V_CC= +15V, V_SS= 0, V_REFH = +10V, and V_REFL = 0V, representative unit, unless otherwise specified.

+85°C (cont.)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC C, +85°C)

(DAC D, +85°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

–40°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, –40°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, –40°C)

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0.5

0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC C, –40°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, –40°C)

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

®

7

DAC7744

TYPICAL PERFORMANCE CURVES: V_SS= 0V (Cont.)

At T_A= +25°C, V_DD= +5V, V_CC= +15V, V_SS= 0, V_REFH = +10V, and V_REFL = 0V, representative unit, unless otherwise specified.

ZERO-SCALE ERROR vs TEMPERATURE

Code (004201_H)

FULL-SCALE ERROR vs TEMPERATURE

Code (FFFF_H)

2

1.5

1

2

1.5

1

DAC B

DAC D

0.5

0

0.5

0

–0.5

–1

–0.5

–1

DAC A

DAC C

DAC A

DAC C

–1.5

–2

–1.5

–2

–40 –30 –20 –10

0

10 20 30 40 50 60 70 80 90

–40 –30 –20 –10

0

10 20 30 40 50 60 70 80 90

Temperature (°C)

CURRENT vs CODE

All DACs Sent to Indicated Code

(DAC A and B)

All DACS Sent to Indicated Code

(DAC C and D)

V_REFH

1.0

0.8

0.6

0.4

0.2

0

1.0

0.8

0.6

0.4

0.2

0

–0.2

–0.4

–0.2

–0.4

V_REFL

0

–0.2

–0.4

–0.6

–0.8

–1.0

–1.2

–1.4

0

–0.2

–0.4

–0.6

–0.8

–1.0

–1.2

–1.4

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

POSITIVE SUPPLY CURRENT

vs DIGITAL INPUT CODE

POWER SUPPLY CURRENT vs TEMPERATURE

4.0

No Load

Data = FFFF_H(all DACs)

No Load

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

I_CC

I_DD

–0.5

0

2000_H

4000_H

6000_H

8000_H

A000_H

C000_H

E000_H

FFFF_H

–40 –30 –20 –10

0

10 20 30 40 50 60 70 80 90

Digital Input Code

Temperature (°C)

®

8

DAC7744

TYPICAL PERFORMANCE CURVES: V_SS= 0V (Cont.)

At T_A= +25°C, V_DD= +5V, V_CC= +15V, V_SS= 0, V_REFH = +10V, and V_REFL = 0V, representative unit, unless otherwise specified.

OUTPUT VOLTAGE vs SETTLING TIME

(0V to +10V)

(+10V to 0V)

Large-Signal Settling Time: 5V/div

Small-Signal Settling Time: 3LSB/div

Large-Signal Settling Time: 5V/div

+5V

LDAC

0

+5V

LDAC

0

Time (2µs/div)

OUTPUT VOLTAGE

MIDSCALE GLITCH PERFORMANCE

7FFF_Hto 8000_H

8000_Hto 7FFF_H

+5V

LDAC

0

+5V

LDAC

0

Time (1µs/div)

OUTPUT NOISE VOLTAGE vs FREQUENCY

BROADBAND NOISE

120

100

80

60

40

20

0

BW = 10kHz

Code = 8000_H

100

1k

10k

100k

1M

Time (100µs/div)

Frequency (Hz)

®

9

DAC7744

TYPICAL PERFORMANCE CURVES: V_SS= 0V (Cont.)

At T_A= +25°C, V_DD= +5V, V_CC= +15V, V_SS= 0, V_REFH = +10V, and V_REFL = 0V, representative unit, unless otherwise specified.

LOGIC SUPPLY CURRENT

vs LOGIC INPUT LEVEL FOR DATA BITS

OUTPUT VOLTAGE vs R_LOAD

12

10

8

16

14

12

10

8

Source

6

4

2

Sink

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

0.01

0.1

1

10

100

Logic Input Level for Data Bits (V)

R_LOAD(kΩ)

SINGLE-SUPPLY CURRENT LIMIT

vs INPUT CODE

POWER SUPPLY REJECTION RATIO vs FREQUENCY

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

20

15

Short to Ground

10

5

+15V

0

–5

+5V

–10

–15

–20

Short to V_CC

100

1k

10k

100k

1M

0000_H2000_H4000_H6000_H8000_HA000_H0000_HE000_HFFFF_H

Frequency (Hz)

Input Code

DIGITAL-TO-ANALOG OUTPUT GLITCH

2LSB/div

+5V

CS

0

Time (500ns/div)

®

10

DAC7744

TYPICAL PERFORMANCE CURVES: V_SS= –15V

At T_A= +25°C, V_DD= +5V, V_CC= +15V, V_SS= –15V, V_REFH = +10V, and V_REFL = –10V, representative unit, unless otherwise specified.

+25°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, +25°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, +25°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC C, +25°C)

2.0

1.5

1.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0.5

0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

+85°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +85°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, +85°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

®

11

DAC7744

TYPICAL PERFORMANCE CURVES: V_SS= –15V (Cont.)

At T_A= +25°C, V_DD= +5V, V_CC= +15V, V_SS= –15V, V_REFH = +10V, and V_REFL = –10V, representative unit, unless otherwise specified.

+85°C (cont.)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC C, +85°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, +85°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

–40°C

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, –40°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, –40°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC C, –40°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, –40°C)

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

®

12

DAC7744

TYPICAL PERFORMANCE CURVES: V_SS= –15V (Cont.)

At T_A= +25°C, V_DD= +5V, V_CC= +15V, V_SS= –15V, V_REFH = +10V, and V_REFL = –10V, representative unit, unless otherwise specified.

CURRENT vs CODE

All DACs Sent to Indicated Code

(DAC A and B)

CURRENT vs CODE

All DACs Sent to Indicated Code

(DAC C and D)

V_REFH

2.0

1.5

1.0

0.5

0

2.0

1.5

1.0

0.5

0

-0.5

–1.0

–1.5

–0.5

–1.0

–1.5

V_REFL

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

POSITIVE FULL-SCALE ERROR vs TEMPERATURE

(Code FFFF_H)

BIPOLAR ZERO SCALE ERROR vs TEMPERATURE

(Code 8000_H)

2

1.5

1.0

1.5

1

DAC B

DAC A

DAC D

DAC B

0.5

0

DAC A

–0.5

–1.0

–1.5

–2.0

–0.5

–1

DAC C

–1.5

–2

–40 –30 –20 –10

0

10 20 30 40 50 60 70 80 90

–40

–20

0

20

40

60

80

100

Temperature (°C)

NEGATIVE FULL-SCALE ERROR vs TEMPERATURE

(Code 0000_H)

POWER SUPPLY CURRENT vs TEMPERTURE

7

6

5

2

1.5

4

3

2

1

DAC B

I_CC

1.0

DAC D

0.5

0

–1

–2

–3

–4

–5

–6

–7

DAC A

I_DD

–0.5

–1.0

–1.5

–2.0

I_SS

DAC C

Data = FFFF_H(all DACs)

No Load

–40 –30 –20 –10

0

10 20 30 40 50 60 70 80 90

–40 –30 –20 –10

0

10 20 30 40 50 60 70 80 90

Temperature (°C)

®

13

DAC7744

TYPICAL PERFORMANCE CURVES: V_SS= –15V (Cont.)

At T_A= +25°C, V_DD= +5V, V_CC= +15V, V_SS= –15V, V_REFH = +10V, and V_REFL = –10V, representative unit, unless otherwise specified.

SUPPLY CURRENT vs CODE

OUTPUT VOLTAGE vs R_LOAD

7

6

5

4

3

2

1

0

1

2

3

4

5

6

7

15

10

5

I_CC

Source

I_DD

0

–5

–10

–15

I_SS

Sink

0000_H

2000_H

4000_H

6000_H

8000_H

A000_H

C000_H

E000_H

FFFF_H

0.01

0.1

1

10

100

Digital Input Code

R_LOAD(kΩ)

OUTPUT VOLTAGE vs SETTLING TIME

(–10V to +10V)

OUTPUT VOLTAGE vs SETTLING TIME

(+10V to –10V)

Large-Signal Settling Time: 5V/div

Small-Signal Settling Time: 3LSB/div

Large-Signal Settling Time: 5V/div

+5V

LDAC

0

+5V

LDAC

0

Time (2µs/div)

DUAL SUPPLY CURRENT LIMIT vs INPUT CODE

Short to Ground

POWER SUPPLY REJECTION RATIO vs FREQUENCY

20

15

0

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

10

5

0

–15V

+15V

–5

–10

–15

–20

+5V

0000_H

2000_H

4000_H

6000_H

8000_H

A000_H

C000_H

E000_H

FFFF_H

100

1k

10k

100k

1M

Digital Input Code

Frequency (Hz)

®

14

DAC7744

TYPICAL PERFORMANCE CURVES: V_SS= –15V (Cont.)

At T_A= +25°C, V_DD= +5V, V_CC= +15V, V_SS= –15V, V_REFH = +10V, and V_REFL = –10V, representative unit, unless otherwise specified.

OUTPUT VOLTAGE

MID-SCALE GLITCH PERFORMANCE

7FFF_Hto 8000_H

8000_Hto 7FFF_H

+5V

LDAC

0

+5V

LDAC

0

Time (1µs/div)

®

15

DAC7744

by the external voltage references (V_REFL and V_REFH, re-

spectively). The digital input is a 16-bit parallel word and

the DAC input registers offer a readback capability. The

converters can be powered from either a single +15V supply

or a dual ±15V supply. The device offers a reset function

which immediately sets all DAC output voltages and DAC

registers to mid-scale code 8000_Hor to zero scale, code

0000_H. See Figures 2 and 3 for the basic operation of the

DAC7744.

THEORY OF OPERATION

The DAC7744 is a quad voltage output, 16-bit digital-to-

analog converter (DAC). The architecture is an R-2R ladder

configuration with the three MSB’s segmented followed by

an operational amplifier that serves as a buffer. Each DAC

has its own R-2R ladder network, segmented MSBs and

output op amp (see Figure 1). The minimum voltage output

(zero scale) and maximum voltage output (full scale) are set

R_F

V_OUTSense

V_OUT

R

2R

V_REF

V_REFH Sense

V_REF

V_REFL Sense

H

L

FIGURE 1. DAC7744 Architecture.

1

2

3

4

5

6

7

8

9

DB15 (MSB)

DB14

DB13

DB12

DB11

DB10

DB9

NC 48

NC 47

NC 46

NC 45

V_OUTA Sense 44

0V to +10V

+10.000V

V_OUT

V_REFL AB Sense 42

_REFL AB 41

A

43

DB8

V

Data

Bus

DB7

V_REFH AB 40

V_REFH AB Sense 39

V_OUTB Sense 38

10 DB6

11 DB5

0V to +10V

+10.000V

12 DB4

V_OUT

V_OUTC Sense 36

V_OUT

35

B

37

DAC7744

13 DB3

14 DB2

C

15 DB1

V_REFH CD Sense 34

V_REFH CD 33

16 DB0 (LSB)

17 RSTSEL

18 RST

19 LOADDACS

20 R/W

V_REFL CD 32

Reset DACs

Load DAC Registers

READ/WRITE

V_REFL CD Sense 31

V_OUTD Sense 30

0V to +10V

V_OUTD

29

21 A1

V_SS28

AGND 27

V_CC26

Address

22 A0

+15V

Chip Select

23 CS

+

0.1µF

1µF

24 DGND

V_DD25

NC = No Connection

+5V

1µF

FIGURE 2. Basic Single-Supply Operation of the DAC7744.

®

16

DAC7744

1

2

3

4

5

6

7

8

9

DB15 (MSB)

DB14

DB13

DB12

DB11

DB10

DB9

NC 48

NC 47

NC 46

NC 45

V

_OUTA Sense 44

–10V to +10V

V_OUT

A

43

V_REFL AB Sense 42

V_REFL AB 41

–10V

+10V

DB8

Data

Bus

DB7

V_REFH AB 40

10 DB6

V_REFH AB Sense 39

V_OUTB Sense 38

11 DB5

–10V to +10V

12 DB4

V_OUT

_OUTC Sense 36

V_OUT

35

B

37

DAC7744

13 DB3

V

14 DB2

C

15 DB1

V_REFH CD Sense 34

V_REFH CD 33

+10V

–10V

16 DB0 (LSB)

17 RSTSEL

18 RST

19 LOADDACS

20 R/W

+5V

Reset DACs

V_REFL CD 32

V

_REFL CD Sense 31

V_OUTD Sense 30

Load DAC Registers

READ/WRITE

–10V to +10V

V_OUT

D

29

–15V

+15V

+5V

21 A1

V_SS28

AGND 27

V_CC26

Address

0.1µF

1µF

+

22 A0

Chip Select

23 CS

0.1µF

24 DGND

V_DD25

NC = No Connection

+

1µF

FIGURE 3. Basic Dual-Supply Operation of the DAC7744.

ANALOG OUTPUTS

allows the loop around the output amplifier to be closed at

the load, thus ensuring an accurate output voltage, as shown

in Figure 4.

When V_SS= –15V (dual supply operation), the output ampli-

fier can swing to within 4V of the supply rails, guaranteed

over the –40°C to +85°C temperature range. With V_SS= 0V

(single-supply operation), and with R_LOADalso connected to

ground, the output can swing to ground. Care must also be

taken when measuring the zero-scale error when V_SS= 0V.

Since the output voltage cannot swing below ground, the

output voltage may not change for the first few digital input

codes (0000_H, 0001_H, 0002_H, etc.), if the output amplifier has

a negative offset. At the negative limit of –5mV, the first

specified output starts at code 0021_H.

DAC7744

NC 48

NC 47

NC 46

NC 45

R_W1

V

_OUTA Sense 44

_OUTA 43

_REFL AB Sense 42

_REFL AB 41

_REFH AB 40

_REFH AB Sense 39

_OUTB Sense 38

_OUTB 37

R_W2

V_OUT

R_LOAD

V

Due to the high accuracy of these D/A converters, system

design problems such as grounding and contact resistance

become very important. A 16-bit converter with a 10V full-

scale range has a 1LSB value of 152µV. With a load current

of 1mA, series wiring and connector resistance of only

150mΩ (R_W2) will cause a voltage drop of 150µV, as shown

in Figure 4. To understand what this means in terms of a

system layout, the resistivity of a typical 1 ounce copper-clad

printed circuit board is 1/2 mΩ per square. For a 1mA load,

a 20 milli-inch wide printed circuit conductor 6 inches long

will result in a voltage drop of 150µV.

V

+V

V

+10V

V

R_W1

V

R_W2

V_OUT

R_LOAD

FIGURE 4. Analog Output Closed-Loop Configuration

(1/2 DAC7744). R_Wrepresents wiring resis-

tances.

The DAC7744 offers a force and sense output configuration

for the high open-loop gain output amplifiers. This feature

®

17

DAC7744

REFERENCE INPUTS

microamps to approximately 2.0mA. The reference input

appears as a varying load to the reference. If the reference

can sink or source the required current, a reference buffer is

not required. The DAC7744 features a reference drive and

sense connection such that the internal errors caused by the

changing reference current and the circuit impedances can be

minimized. Figures 5 through 12 show different reference

configurations and the effect on the linearity and differential

linearity.

The reference inputs, V_REFL and V_REFH, can be any voltage

between V_SS+ 4V and V_CC– 4V, provided that V_REFH is at

least 1.25V greater than V_REFL. The minimum output of

each DAC is equal to V_REFL plus a small offset voltage

(essentially, the offset of the output op amp). The maximum

output is equal to V_REFH plus a similar offset voltage. Note

that V_SS(the negative power supply) must either be

connected to ground or must be in the range of –14.25V to

–15.75V. The voltage on V_SSsets several bias points within

the converter. If V_SSis not in one of these two configura-

tions, the bias values may be in error and proper operation

of the device is not guaranteed.

The analog supplies (or the analog supplies and the reference

power supplies) have to come up first. If the power supplies

for the reference come up first, then the V_CCand V_SS

supplies will be “powered from the reference via the ESD

protection diode”, see page 4.

The current into the V_REFH input and out of V_REFL depends

on the DAC output voltages and can vary from a few

NC 48

NC 47

NC 46

NC 45

+V

V

_OUTA Sense 44

_OUTA 43

_REFL AB Sense 42

_REFL AB 41

_REFH AB 40

_REFH AB Sense 39

_OUTB Sense 38

_OUTB 37

OPA2234

V_OUT

V

DAC7744

V

100Ω

2200pF

–10V

V

1000pF

V

100Ω

–V

+V

V

+10V

V_OUT

FIGURE 5. Dual Supply Configuration-Buffered References, used for Dual Supply Performance Curves (1/2 DAC7744).

NC 48

NC 47

NC 46

+V

NC 45

V_OUTA Sense 44

V_OUT

V

_OUTA 43

_REFL AB Sense 42

_REFL AB 41

_REFH AB 40

_REFH AB Sense 39

_OUTB Sense 38

_OUTB 37

DAC7744

V

2kΩ

100Ω

2200pF

OPA350

OPA227

V

1000pF

+0.050V

V

99kΩ

V

+V

V

+10V

V_OUT

NOTE: V_REFL has been chosen to be 50mV to allow for current sinking voltage

drops across the 100Ω resistor and the output stage of the buffer op amp.

FIGURE 6. Single-Supply Buffered Reference with a Reference Low of 50mV Used for Single-Supply Performance Curves

(1/2 DAC7744).

®

18

DAC7744

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC B, +25°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

1.0

0.5

1.0

0.5

0

–0.5

–1.0

–0.5

–1.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC C, +25°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, +25°C)

2.0

1.5

1.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

1.0

0.5

1.0

0.5

0

–0.5

–1.0

–0.5

–1.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

FIGURE 7. Integral Linearity and Differential Linearity Error Curves for Figure 8.

NC 48

NC 47

NC 46

NC 45

+V

V

_OUTA Sense 44

_OUTA 43

V_REFL AB Sense 42

_REFL AB 41

_REFH AB 40

V_REFH AB Sense 39

_OUTB Sense 38

_OUTB 37

OPA2234

V_OUT

V

DAC7744

100Ω

2200pF

–5V

–V

V

1000pF

V

+V

+5V

V

V_OUT

–V

FIGURE 8. Dual-Supply Buffered Referenced with V_REFL = –5V and V_REFH = +5V (1/2 DAC7744).

19

®

DAC7744

NC 48

NC 47

NC 46

+V

NC 45

V_OUTA Sense 44

V_OUT

A

43

DAC7744

V_REFL AB Sense 42

V_REFL AB 41

1kΩ

100Ω

2200pF

OPA350

OPA227

1000pF

0.05V

V_REFH AB 40

99kΩ

V_REFH AB Sense 39

V_OUTB Sense 38

+V

V_OUT

B

37

+5V

V_OUT

FIGURE 9. Single-Supply Buffered Reference with a Reference Low of 50mV and Reference High of +5V.

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC A, +25°C)

(DAC B, +25°C)

2.0

1.5

2.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

1.0

0.5

1.0

0.5

0

–0.5

–1.0

–0.5

–1.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC C, +25°C)

LINEARITY ERROR AND

DIFFERENTIAL LINEARITY ERROR vs CODE

(DAC D, +25°C)

2.0

1.5

1.0

1.5

1.0

0.5

0

0.5

0

–0.5

–1.0

–1.5

–2.0

–0.5

–1.0

–1.5

–2.0

1.0

0.5

1.0

0.5

0

–0.5

–1.0

–0.5

–1.0

0000_H2000_H4000_H6000_H8000_HA000_HC000_HE000_HFFFF_H

Digital Input Code

FIGURE 10. Integral Linearity and Differential Linearity Error Curves for Figure 9.

®

20

DAC7744

INPUT

DAC

A1

A0

R/W

CS

RST

RSTSEL LOADDACS

REGISTER

MODE

DAC

L

H

L

H

L

H

L

H

X

↑

X

L

X

↑

Write

Read

Hold

Write

Write Input

Read Input

Update

A

B

C

D

A

B

C

D

All

L

H

X

L

H

L

H

X

H

X

H

X

Hold

Reset to Zero

Reset to Midscale

Hold

Reset to Zero

Reset to Midscale

↑

H

TABLE I. DAC7744 Logic Truth Table.

DIGITALLY-PROGRAMMABLE

CURRENT SOURCE

DIGITAL INTERFACE

Table I shows the basic control logic for the DAC7744. Note

that each DAC register is edge triggered and not level

triggered. When the LOADDACS signal is transitioned to

HIGH, the digital word currently in the DAC register is

latched. The first set of registers (the input registers) are

triggered via the A0, A1, R/W, and CS inputs. Only one of

these registers is transparent at any given time.

The DAC7744 offers a unique set of features that allows a

wide range of flexibility in designing applications circuits

such as programmable current sources. The DAC7744 offers

both a differential reference input as well as an open-loop

configuration around the output amplifier. The open-loop

configuration around the output amplifier allows transistor

to be placed within the loop to implement a digitally-

programmable, uni-directional current source. The availabil-

ity of a differential reference also allows programmability

for both the full-scale and zero-scale currents. The output

current is calculated as:

The double-buffered architecture is designed mainly so that

each DAC input register can be written to at any time and

then all DAC voltages updated simultaneously by the rising

edge of LOADDACS. It also allows a DAC input register to

be written to at any point then the DAC output voltages can

be synchronously changed via a trigger signal connected to

LOADDACS.

V_REFH – V_REF

R_SENSE

L

N

I_OUT

=

•

(2)

65,536

DIGITAL TIMING

+ V_REFL / R_SENSE

(

)

Figure 11 and Table II provide detailed timing for the digital

interface of the DAC7744.

Figure 12 shows a DAC7744 in a 4-to-20mA current output

configuration. The output current can be determined by

Equation 3:

DIGITAL INPUT CODING

The DAC7744 input data is in Straight Binary format. The

output voltage is given by Equation 1.

(3)

5V –1V

N

1V

I_OUT

=

•

+

V

_REFH – V_REFL • N

(

)

(1)

250Ω

65,536

250Ω

V_OUT= V_REFL +

65,536

where N is the digital input code. This equation does not

include the effects of offset (zero scale) or gain (full scale)

errors.

At full scale, the output current is 16mA plus the 4mA for

the zero current. At zero scale, the output current is the offset

current of 4mA (1V/250Ω).

®

21

DAC7744

t_WCS

CS

t_WS

t_WH

R/W

t_RCS

t_AH

CS

t_AS

t_RDH

t_RDS

A0/A1

t_LH

R/W

t_LS

t_LWD

t_LX

t_AS

t_AH

LOADDACS

Data In

±0.003% of FSR

Error Band

A0/A1

t_DH

t_DS

t_DZ

t_S

Data Out

Data Valid

t_CSD

V_OUT

Data Read Timing

Data Write Timing

±0.003% of FSR

Error Band

t_SS

t_SH

RESET SEL

t_RSH

t_RSS

RST

+FS

V_OUT,RESET SEL LOW

–FS

+FS

V_OUT,RESET SEL HIGH

–FS

MS

DAC7744 Reset Timing

FIGURE 11. Digital Input and Output Timing.

SYMBOL

DESCRIPTION

CS LOW for Read

R/W HIGH to CS LOW

R/W HIGH after CS HIGH

CS HIGH to Data Bus in High Impedance

CS LOW to Data Bus Valid

CS LOW for Write

MIN

TYP

MAX

UNITS

t_RCS

t_RDS

t_RDH

t_DZ

t_CSD

t_WCS

t_WS

t_WH

t_AS

t_AH

t_LS

t_LH

t_LX

t_DS

t_DH

t_LWD

t_SS

t_SH

t_RSS

t_RSH

t_S

100

10

ns

µs

10

70

130

85

40

0

10

0

15

40

80

40

0

15

40

0

R/W LOW to CS LOW

R/W LOW after CS HIGH

Address Valid to CS LOW

Address Valid after CS HIGH

CS LOW to LOADDACS HIGH

CS LOW after LOADDACS HIGH

LOADDACS HIGH

Data Valid to CS LOW

Data Valid after CS HIGH

LOADDACS LOW

RSTSEL Valid Before RESET HIGH

RSTSEL Valid After RESET HIGH

RESET LOW Before RESET HIGH

RESET LOW After RESET HIGH

Settling Time

120

10

11

TABLE II. Timing Specifications (T_A= –40°C to +85°C).

®

22

DAC7744

I_OUT

V_PROGRAMMED

DAC7744

NC 48

NC 47

NC 46

NC 45

R_SENSE

250Ω

+V

V

_OUTA Sense 44

_OUTA 43

_REFL AB Sense 42

_REFL AB 41

_REFH AB 40

_REFH AB Sense 39

_OUTB Sense 38

_OUTB 37

OPA2350

V

20kΩ

100Ω

2200pF

V

1000pF

+1.0V

V

80kΩ

V

+V

V

I_OUT

V_PROGRAMMED

R_SENSE

250Ω

GND

FIGURE 12. 4-to-20mA Digitally-Controlled Current Source (1/2 DAC7744).

®

23

DAC7744

型号:	DAC7744EB
是否Rohs认证：	不符合
生命周期：	Transferred
IHS 制造商：	BURR-BROWN CORP
包装说明：	SSOP-48
Reach Compliance Code：	unknown
风险等级：	5.79
Is Samacsys：	N
最大模拟输出电压：	10 V
最小模拟输出电压：	-10 V
转换器类型：	D/A CONVERTER
输入位码：	BINARY
输入格式：	PARALLEL, WORD
JESD-30 代码：	R-PDSO-G48
JESD-609代码：	e0
最大线性误差 (EL)：	0.0061%
标称负供电电压：	-15 V
位数：	16
功能数量：	1
端子数量：	48
最高工作温度：	85 °C
最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY
封装代码：	SSOP
封装等效代码：	SSOP48,.4
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
电源：	5,15/+-15 V
认证状态：	Not Qualified
最大稳定时间：	11 µs
标称安定时间 (tstl)：	9 µs
子类别：	Other Converters
标称供电电压：	15 V
表面贴装：	YES
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING
端子节距：	0.635 mm
端子位置：	DUAL
Base Number Matches：	1

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