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  • DAC900E图
  • 深圳市正纳电子有限公司

     该会员已使用本站15年以上
  • DAC900E 现货库存
  • 数量20800 
  • 厂家BB 
  • 封装TSSOP28 
  • 批号21+ 
  • 原装现货 欢迎咨询0755- 83790645
  • QQ:2881664479QQ:2881664479 复制
  • 755-83790645 QQ:2881664479
  • DAC900E图
  • 深圳市宏捷佳电子科技有限公司

     该会员已使用本站12年以上
  • DAC900E 现货库存
  • 数量60030 
  • 厂家TI/德州仪器 
  • 封装TSSOP28 
  • 批号2023+ 
  • 专营原装正品量大可定货
  • QQ:2885134554QQ:2885134554 复制
    QQ:2885134398QQ:2885134398 复制
  • 0755-22669259 QQ:2885134554QQ:2885134398
  • DAC900E图
  • 上海意淼电子科技有限公司

     该会员已使用本站14年以上
  • DAC900E 现货库存
  • 数量20000 
  • 厂家TI 
  • 封装TSSOP 
  • 批号23+ 
  • 原装现货热卖!请联系吴先生 13681678667
  • QQ:617677003QQ:617677003 复制
  • 15618836863 QQ:617677003
  • DAC900E【优势库存】图
  • 齐创科技(上海北京青岛)有限公司

     该会员已使用本站14年以上
  • DAC900E【优势库存】 现货库存
  • 数量7600 
  • 厂家TI代理 
  • 封装28TSSOP 
  • 批号24+热销 
  • 中国区代理全新热卖原装正品
  • QQ:2394092314QQ:2394092314 复制
    QQ:792179102QQ:792179102 复制
  • 021-62153656 QQ:2394092314QQ:792179102
  • DAC900E图
  • 深圳市芯脉实业有限公司

     该会员已使用本站11年以上
  • DAC900E 现货库存
  • 数量50 
  • 厂家TI 
  • 封装TSSOP (PW) 
  • 批号新批次 
  • 新到现货、一手货源、当天发货、bom配单
  • QQ:2881512844QQ:2881512844 复制
  • 075584507705 QQ:2881512844
  • DAC900E图
  • 深圳市广百利电子有限公司

     该会员已使用本站6年以上
  • DAC900E 现货库存
  • 数量18500 
  • 厂家TI(德州仪器) 
  • 封装TSSOP-28 
  • 批号23+ 
  • ★★全网低价,原装原包★★
  • QQ:1483430049QQ:1483430049 复制
  • 0755-83235525 QQ:1483430049
  • DAC900E图
  • 上海磐岳电子有限公司

     该会员已使用本站11年以上
  • DAC900E 优势库存
  • 数量9000 
  • 厂家TI/BB 
  • 封装 
  • 批号2024+ 
  • 全新原装现货,全网最低价(上海,北京,深圳,青岛均可交货)
  • QQ:3003653665QQ:3003653665 复制
    QQ:1325513291QQ:1325513291 复制
  • 021-60341766 QQ:3003653665QQ:1325513291
  • DAC900E/2K5图
  • 深圳市华宇金电子有限公司

     该会员已使用本站5年以上
  • DAC900E/2K5 热卖库存
  • 数量660000 
  • 厂家Texas Instruments(德州仪器) 
  • 封装28-TSSOP (0.173, 4.40mm Width) 
  • 批号24+ 
  • 支持实单/只做原装
  • QQ:645072385QQ:645072385 复制
    QQ:2208088051QQ:2208088051 复制
  • 0755-28275702 QQ:645072385QQ:2208088051
  • DAC900E图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • DAC900E
  • 数量85000 
  • 厂家TI/德州仪器 
  • 封装SSOP 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
  • QQ:2881495753QQ:2881495753 复制
  • 0755-23605827 QQ:2881495753
  • DAC900E图
  • 深圳市芯福林电子有限公司

     该会员已使用本站15年以上
  • DAC900E
  • 数量36000 
  • 厂家BB 
  • 封装TSSOP-28 
  • 批号23+ 
  • 真实库存全新原装正品!代理此型号
  • QQ:2881495751QQ:2881495751 复制
  • 0755-88917743 QQ:2881495751
  • DAC900E图
  • 深圳市芯鹏泰科技有限公司

     该会员已使用本站8年以上
  • DAC900E
  • 数量7536 
  • 厂家Texas Instruments 
  • 封装28-TSSOP 
  • 批号23+ 
  • 数模转换器DAC原装现货
  • QQ:892152356QQ:892152356 复制
  • 0755-82777852 QQ:892152356
  • DAC900E图
  • 深圳市美思瑞电子科技有限公司

     该会员已使用本站12年以上
  • DAC900E
  • 数量12245 
  • 厂家TI/德州仪器 
  • 封装TSSOP28 
  • 批号22+ 
  • 现货,原厂原装假一罚十!
  • QQ:2885659458QQ:2885659458 复制
    QQ:2885657384QQ:2885657384 复制
  • 0755-83952260 QQ:2885659458QQ:2885657384
  • DAC900E图
  • 深圳市能元时代电子有限公司

     该会员已使用本站10年以上
  • DAC900E
  • 数量65300 
  • 厂家BB/TI 
  • 封装TSSOP20 
  • 批号24+ 
  • 公司原装现货可含税!假一罚十!
  • QQ:2885637848QQ:2885637848 复制
    QQ:2885658492QQ:2885658492 复制
  • 0755-84502810 QQ:2885637848QQ:2885658492
  • DAC900E图
  • 深圳市和诚半导体有限公司

     该会员已使用本站11年以上
  • DAC900E
  • 数量5600 
  • 厂家TI 
  • 封装TSSOP28 
  • 批号23+ 
  • 100%深圳原装现货库存
  • QQ:2276916927QQ:2276916927 复制
    QQ:1977615742QQ:1977615742 复制
  • 18929336553 QQ:2276916927QQ:1977615742
  • DAC900E图
  • 深圳市得捷芯城科技有限公司

     该会员已使用本站11年以上
  • DAC900E
  • 数量12 
  • 厂家TI/德州仪器 
  • 封装NA/ 
  • 批号23+ 
  • 优势代理渠道,原装正品,可全系列订货开增值税票
  • QQ:3007977934QQ:3007977934 复制
    QQ:3007947087QQ:3007947087 复制
  • 0755-82546830 QQ:3007977934QQ:3007947087
  • DAC900E图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站15年以上
  • DAC900E
  • 数量5800 
  • 厂家TI/德州仪器 
  • 封装TSSOP28 
  • 批号24+ 
  • 假一罚十,原装进口正品现货供应
  • QQ:198857245QQ:198857245 复制
  • 0755-82865294 QQ:198857245
  • DAC900E图
  • 集好芯城

     该会员已使用本站13年以上
  • DAC900E
  • 数量13841 
  • 厂家BB 
  • 封装TSSOP28 
  • 批号最新批次 
  • 原装原厂 现货现卖
  • QQ:3008092965QQ:3008092965 复制
    QQ:3008092965QQ:3008092965 复制
  • 0755-83239307 QQ:3008092965QQ:3008092965
  • DAC900E图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站14年以上
  • DAC900E
  • 数量13510 
  • 厂家TI 
  • 封装TSSOP28 
  • 批号23+ 
  • 只做全新原装正品现货
  • QQ:2885348317QQ:2885348317 复制
    QQ:2885348339QQ:2885348339 复制
  • 0755-83209630 QQ:2885348317QQ:2885348339
  • DAC900E图
  • 深圳市晶美隆科技有限公司

     该会员已使用本站14年以上
  • DAC900E
  • 数量18310 
  • 厂家TI 
  • 封装TSSOP-28 
  • 批号23+ 
  • 全新原装正品现货热卖
  • QQ:2885348339QQ:2885348339 复制
    QQ:2885348317QQ:2885348317 复制
  • 0755-82519391 QQ:2885348339QQ:2885348317
  • DAC900E图
  • 深圳市雅维特电子有限公司

     该会员已使用本站15年以上
  • DAC900E
  • 数量5000 
  • 厂家TI 
  • 封装信誉保证正品原装0755-83975781 
  • 批号原厂原装 
  • QQ:767621813QQ:767621813 复制
    QQ:1152937841QQ:1152937841 复制
  • 0755-83975781 QQ:767621813QQ:1152937841
  • DAC900E图
  • 深圳市华科泰电子商行

     该会员已使用本站13年以上
  • DAC900E
  • 数量80 
  • 厂家TI/BB 
  • 封装TSSOP-28 
  • 批号2008+ 
  • 绝对原装现货特价
  • QQ:405945546QQ:405945546 复制
    QQ:1439873477QQ:1439873477 复制
  • 0755-82567800 QQ:405945546QQ:1439873477
  • DAC900E图
  • 深圳市拓亿芯电子有限公司

     该会员已使用本站12年以上
  • DAC900E
  • 数量9800 
  • 厂家BURR-BROWN 
  • 封装TSSOP28 
  • 批号23+ 
  • 进口原装原盘原标签假一赔十
  • QQ:2103443489QQ:2103443489 复制
    QQ:2924695115QQ:2924695115 复制
  • 0755-82702619 QQ:2103443489QQ:2924695115
  • DAC900E图
  • 深圳市拓亿芯电子有限公司

     该会员已使用本站12年以上
  • DAC900E
  • 数量30000 
  • 厂家TI 
  • 封装SSOP 
  • 批号23+ 
  • 代理全新原装现货,价格优势
  • QQ:1774550803QQ:1774550803 复制
    QQ:2924695115QQ:2924695115 复制
  • 0755-82777855 QQ:1774550803QQ:2924695115
  • DAC900E图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • DAC900E
  • 数量12500 
  • 厂家BB 
  • 封装TSSOP 
  • 批号2023+ 
  • 绝对原装全新正品现货/优势渠道商、原盘原包原盒
  • QQ:364510898QQ:364510898 复制
    QQ:515102657QQ:515102657 复制
  • 0755-83777708“进口原装正品专供” QQ:364510898QQ:515102657
  • DAC900E图
  • 深圳市华斯顿电子科技有限公司

     该会员已使用本站16年以上
  • DAC900E
  • 数量12500 
  • 厂家TI/德州仪器 
  • 封装TSSOP-28 
  • 批号2023+ 
  • 绝对原装正品全新深圳进口现货,优质渠道供应商!
  • QQ:1002316308QQ:1002316308 复制
    QQ:515102657QQ:515102657 复制
  • 美驻深办0755-83777708“进口原装正品专供” QQ:1002316308QQ:515102657
  • DAC900E图
  • 深圳市西源信息科技有限公司

     该会员已使用本站9年以上
  • DAC900E
  • 数量8800 
  • 厂家TI 
  • 封装TSSOP28 
  • 批号最新批号 
  • 原装现货零成本有接受价格就出
  • QQ:3533288158QQ:3533288158 复制
    QQ:408391813QQ:408391813 复制
  • 0755-84876394 QQ:3533288158QQ:408391813
  • DAC900E.图
  • 深圳市集创讯科技有限公司

     该会员已使用本站5年以上
  • DAC900E.
  • 数量25000 
  • 厂家TI/德州仪器 
  • 封装 
  • 批号24+ 
  • 原装进口正品现货,假一罚十价格优势
  • QQ:2885393494QQ:2885393494 复制
    QQ:2885393495QQ:2885393495 复制
  • 0755-83244680 QQ:2885393494QQ:2885393495
  • DAC900E /2K5图
  • 北京中其伟业科技有限公司

     该会员已使用本站16年以上
  • DAC900E /2K5
  • 数量184 
  • 厂家TI 
  • 封装TSSOP(PW)|28 
  • 批号16+ 
  • 特价,原装正品,绝对公司现货库存,原装特价!
  • QQ:2880824479QQ:2880824479 复制
  • 010-62104891 QQ:2880824479
  • DAC900E图
  • 深圳市金嘉锐电子有限公司

     该会员已使用本站14年以上
  • DAC900E
  • 数量28620 
  • 厂家TI 
  • 封装28-TSSOP 
  • 批号24+ 
  • 【原装优势★★★绝对有货】
  • QQ:2643490444QQ:2643490444 复制
  • 0755-22929859 QQ:2643490444
  • DAC900E图
  • 深圳市欧立现代科技有限公司

     该会员已使用本站12年以上
  • DAC900E
  • 数量5412 
  • 厂家BB 
  • 封装SOP 
  • 批号24+ 
  • 全新原装现货,欢迎询购!
  • QQ:1950791264QQ:1950791264 复制
    QQ:221698708QQ:221698708 复制
  • 0755-83222787 QQ:1950791264QQ:221698708
  • DAC900E图
  • 深圳市正信鑫科技有限公司

     该会员已使用本站12年以上
  • DAC900E
  • 数量3115 
  • 厂家TI 
  • 封装原厂封装 
  • 批号22+ 
  • 原装正品★真实库存★价格优势★欢迎来电洽谈
  • QQ:1686616797QQ:1686616797 复制
    QQ:2440138151QQ:2440138151 复制
  • 0755-22655674 QQ:1686616797QQ:2440138151
  • DAC900E图
  • 深圳市华芯盛世科技有限公司

     该会员已使用本站13年以上
  • DAC900E
  • 数量865000 
  • 厂家TI/德州仪器 
  • 封装TSSOP28 
  • 批号最新批号 
  • 一级代理,原装特价现货!
  • QQ:2881475757QQ:2881475757 复制
  • 0755-83225692 QQ:2881475757
  • DAC900E图
  • HECC GROUP CO.,LIMITED

     该会员已使用本站17年以上
  • DAC900E
  • 数量5000 
  • 厂家BB 
  • 封装SOP 
  • 批号2021+ 
  • 原装假一赔十!可提供正规渠道证明!
  • QQ:3003818780QQ:3003818780 复制
    QQ:3003819484QQ:3003819484 复制
  • 755-83950019 QQ:3003818780QQ:3003819484
  • DAC900E图
  • 深圳市恒意法科技有限公司

     该会员已使用本站17年以上
  • DAC900E
  • 数量9000 
  • 厂家Texas Instruments 
  • 封装28-TSSOP 
  • 批号21+ 
  • 正规渠道/品质保证/原装正品现货
  • QQ:2881514372QQ:2881514372 复制
  • 0755-83247729 QQ:2881514372
  • DAC900E图
  • 深圳市惊羽科技有限公司

     该会员已使用本站11年以上
  • DAC900E
  • 数量2368 
  • 厂家TI-德州仪器 
  • 封装TSSOP-28 
  • 批号▉▉:2年内 
  • ▉▉¥85.5元一有问必回一有长期订货一备货HK仓库
  • QQ:43871025QQ:43871025 复制
  • 131-4700-5145---Q-微-恭-候---有-问-秒-回 QQ:43871025

产品型号DAC900E的概述

DAC900E芯片概述 DAC900E是一款高精度的数模转换器(DAC),广泛应用于通信、医疗、工业控制和消费电子等领域。其设计目标主要是提供高线性度、高速转换和低功耗的应用性能,使其满足现代电子设备对高性能信号处理的需求。 DAC900E的核心功能是将数字信号转换为模拟信号,以便在各种系统中进行处理。数字信号通常由微控制器或数字信号处理器产生,而DAC900E能够将这些信号以高精度和高速度转换成模拟形式。此特性使得DAC900E在音频、视频、传感器信号处理上有着重要的应用价值。 DAC900E详细参数 DAC900E拥有众多优良参数,使其在激烈的市场竞争中脱颖而出。以下是一些关键的技术参数: - 分辨率:DAC900E通常提供16位的分辨率,能够满足很多高精度应用的需求。 - 转换速率:DAC的转换速率最高可达1MSample/s,这对于动态信号表现尤为重要。 - 线性度:总升高和整...

产品型号DAC900E的Datasheet PDF文件预览

®
DAC900  
DAC900  
For most current data sheet and other product  
information, visit www.burr-brown.com  
TM  
10-Bit, 165MSPS  
DIGITAL-TO-ANALOG CONVERTER  
APPLICATIONS  
FEATURES  
COMMUNICATION TRANSMIT CHANNELS  
WLL, Cellular Base Station  
Digital Microwave Links  
SINGLE +5V OR +3V OPERATION  
HIGH SFDR: 5MHz Output at 100MSPS: 68dBc  
LOW GLITCH: 3pV-s  
Cable Modems  
LOW POWER: 170mW at +5V  
WAVEFORM GENERATION  
INTERNAL REFERENCE:  
Optional Ext. Reference  
Adjustable Full-Scale Range  
Multiplying Option  
Direct Digital Synthesis (DDS)  
Arbitrary Waveform Generation (ARB)  
MEDICAL/ULTRASOUND  
HIGH-SPEED INSTRUMENTATION AND  
CONTROL  
VIDEO, DIGITAL TV  
For noncontinuous operation of the DAC900, a power-down  
mode results in only 45mW of standby power.  
DESCRIPTION  
The DAC900 is a high-speed, digital-to-analog converter (DAC)  
offering a 10-bit resolution option within the SpeedPlus family  
of high-performance converters. Featuring pin compatibility  
among family members, the DAC908, DAC902, and DAC904  
provide a component selection option to an 8-, 12-, and 14-bit  
resolution, respectively. All models within this family of D/A  
converters support update rates in excess of 165MSPS with  
excellent dynamic performance, and are especially suited to  
fulfill the demands of a variety of applications.  
The DAC900 comes with an integrated 1.24V bandgap refer-  
ence and edge-triggered input latches, offering a complete  
converter solution. Both +3V and +5V CMOS logic families  
can be interfaced to the DAC900.  
The reference structure of the DAC900 allows for additional  
flexibility by utilizing the on-chip reference, or applying an  
external reference. The full-scale output current can be adjusted  
over a span of 2mA to 20mA, with one external resistor, while  
maintaining the specified dynamic performance.  
The advanced segmentation architecture of the DAC900 is  
optimized to provide a high Spurious-Free Dynamic Range  
(SFDR) for single-tone, as well as for multi-tone signals—  
essential when used for the transmit signal path of communica-  
tion systems.  
The DAC900 is available in SO-28 and TSSOP-28 packages.  
+VA  
BW  
+VD  
DAC900  
The DAC900 has a high impedance (200k) current output with  
a nominal range of 20mA and an output compliance of up to  
1.25V. The differential outputs allow for both a differential, or  
single-ended analog signal interface. The close matching of the  
current outputs ensures superior dynamic performance in the  
differential configuration, which can be implemented with a  
transformer.  
IOUT  
IOUT  
BYP  
LSB  
Switches  
FSA  
Current  
Sources  
REFIN  
Segmented  
Switches  
INT/EXT  
Utilizing a small geometry CMOS process, the monolithic  
DAC900 can be operated on a wide, single-supply range of  
+2.7V to +5.5V. Its low power consumption allows for use in  
portable and battery operated systems. Further optimization can  
be realized by lowering the output current with the adjustable  
full-scale option.  
Latches  
PD  
+1.24V Ref.  
10-Bit Data Input  
D9...D0  
AGND  
CLK  
DGND  
International Airport Industrial Park  
Mailing Address: PO Box 11400, Tucson, AZ 85734  
Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706  
• Tel: (520) 746-1111  
Twx: 910-952-1111 Internet: http://www.burr-brown.com/  
Cable: BBRCORP Telex: 066-6491  
FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132  
©1999 Burr-Brown Corporation  
Printed in U.S.A. May, 2000  
PDS-1446B  
SPECIFICATIONS  
At TA = full specified temperature range, +VA = +5V, +VD = +5V, differential transformer coupled output, 50doubly terminated, unless otherwise specified.  
DAC900U/E  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
Resolution  
Output Update Rate (fCLOCK  
Output Update Rate  
10  
200  
165  
Bits  
MSPS  
MSPS  
°C  
)
4.5V to 5.5V  
2.7V to 3.3V  
Ambient, TA  
165  
125  
–40  
Full Specified Temperature Range, Operating  
+85  
STATIC ACCURACY(1)  
TA = +25°C  
Differential Nonlinearity (DNL)  
Integral Nonlinearity (INL)  
fCLOCK = 25MSPS, fOUT = 1.0MHz  
–0.5  
–1.0  
±0.3  
±0.5  
+0.5  
+1.0  
LSB  
LSB  
DYNAMIC PERFORMANCE  
TA = +25°C  
Spurious Free Dynamic Range (SFDR)  
fOUT = 1.0MHz, fCLOCK = 25MSPS  
fOUT = 2.1MHz, fCLOCK = 50MSPS  
fOUT = 5.04MHz, fCLOCK = 50MSPS  
fOUT = 5.04MHz, fCLOCK = 100MSPS  
fOUT = 20.2MHz, fCLOCK = 100MSPS  
fOUT = 25.3MHz, fCLOCK = 125MSPS  
fOUT = 41.5MHz, fCLOCK = 125MSPS  
fOUT = 27.4MHz, fCLOCK = 165MSPS  
fOUT = 54.8MHz, fCLOCK = 165MSPS  
Spurious Free Dynamic Range within a Window  
fOUT = 5.04MHz, fCLOCK = 50MSPS  
fOUT = 5.04MHz, fCLOCK = 100MSPS  
Total Harmonic Distortion (THD)  
fOUT = 2.1MHz, fCLOCK = 50MSPS  
fOUT = 2.1MHz, fCLOCK = 125MSPS  
Two Tone  
To Nyquist  
70  
76  
75  
68  
68  
62  
62  
53  
59  
53  
dBc  
dBc  
dBc  
dBc  
dBc  
dBc  
dBc  
dBc  
dBc  
2MHz Span  
4MHz Span  
78  
78  
dBc  
dBc  
–74  
–73  
dBc  
dBc  
fOUT1 = 13.5MHz, fOUT2 = 14.5MHz, fCLOCK = 100MSPS  
Output Settling Time(2)  
60  
30  
2
dBc  
ns  
ns  
to 0.1%  
10% to 90%  
10% to 90%  
Output Rise Time(2)  
Output Fall Time(2)  
2
ns  
Glitch Impulse  
3
pV-s  
DC-ACCURACY  
Full-Scale Output Range(3)(FSR)  
Output Compliance Range  
Gain Error  
Gain Error  
Gain Drift  
All Bits High, IOUT  
2.0  
–1.0  
–10  
–10  
20.0  
+1.25  
+10  
mA  
V
With Internal Reference  
With External Reference  
With Internal Reference  
With Internal Reference  
With Internal Reference  
±1  
±2  
±120  
%FSR  
%FSR  
ppmFSR/°C  
%FSR  
ppmFSR/°C  
%FSR/V  
%FSR/V  
pA/Hz  
kΩ  
+10  
Offset Error  
Offset Drift  
–0.025  
+0.025  
±0.1  
Power Supply Rejection, +VA  
Power Supply Rejection, +VD  
Output Noise  
Output Resistance  
Output Capacitance  
–0.2  
–0.025  
+0.2  
+0.025  
IOUT = 20mA, RLOAD = 50Ω  
50  
200  
12  
IOUT, IOUT to Ground  
pF  
REFERENCE  
Reference Voltage  
Reference Tolerance  
+1.24  
±10  
±50  
10  
V
%
Reference Voltage Drift  
Reference Output Current  
Reference Input Resistance  
Reference Input Compliance Range  
Reference Small Signal Bandwidth(4)  
ppmFSR/°C  
µA  
MΩ  
V
1
0.1  
1.25  
1.3  
MHz  
DIGITAL INPUTS  
Logic Coding  
Straight Binary  
Latch Command  
Rising Edge of Clock  
Logic High Voltage, VIH  
Logic Low Voltage, VIL  
Logic High Voltage, VIH  
Logic Low Voltage, VIL  
+VD = +5V  
+VD = +5V  
+VD = +3V  
+VD = +3V  
+VD = +5V  
+VD = +5V  
3.5  
2
5
0
3
V
V
V
1.2  
0.8  
0
V
(5)  
Logic High Current, IIH  
±20  
±20  
5
µA  
µA  
pF  
Logic Low Current, IIL  
Input Capacitance  
Theinformationprovidedhereinisbelievedtobereliable;however,BURR-BROWNassumesnoresponsibilityforinaccuraciesoromissions.BURR-BROWNassumes  
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change  
withoutnotice. Nopatentrightsorlicensestoanyofthecircuitsdescribedhereinareimpliedorgrantedtoanythirdparty. BURR-BROWNdoesnotauthorizeorwarrant  
any BURR-BROWN product for use in life support devices and/or systems.  
®
2
DAC900  
SPECIFICATIONS (Cont.)  
At TA = +25°C, +VA = +5V, +VD = +5V, differential transformer coupled output, 50doubly terminated, unless otherwise specified.  
DAC900U/E  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
POWER SUPPLY  
Supply Voltages  
+VA  
+VD  
+2.7  
+2.7  
+5  
+5  
+5.5  
+5.5  
V
V
Supply Current(6)  
IVA  
24  
1.1  
8
170  
50  
45  
30  
2
15  
230  
mA  
mA  
mA  
mW  
mW  
mW  
IVA, Power-Down Mode  
IVD  
Power Dissipation  
+5V, IOUT = 20mA  
+3V, IOUT = 2mA  
Power Dissipation, Power-Down Mode  
Thermal Resistance, θJA  
SO-28  
75  
50  
°C/W  
°C/W  
TSSOP-28  
NOTES: (1) At output IOUT, while driving a virtual ground. (2) Measured single-ended into 50Load. (3) Nominal full-scale output current is 32x IREF; see Application  
Section for details. (4) Reference bandwidth depends on size of external capacitor at the BW pin and signal level. (5) Typically 45µA for the PD pin, which has an  
internal pull-down resistor. (6) Measured at fCLOCK = 50MSPS and fOUT = 1.0MHz.  
ABSOLUTE MAXIMUM RATINGS  
ELECTROSTATIC  
+VA to AGND ........................................................................ –0.3V to +6V  
DISCHARGE SENSITIVITY  
+VDto DGND ........................................................................ –0.3V to +6V  
AGNDto DGND ................................................................. –0.3V to +0.3V  
This integrated circuit can be damaged by ESD. Burr-Brown  
+VA to +VD .............................................................................. –6V to +6V  
recommends that all integrated circuits be handled with  
CLK, PD to DGND ...................................................... –0.3V to VD + 0.3V  
D0-D9 to DGND .......................................................... –0.3V to VD + 0.3V  
appropriate precautions. Failure to observe proper handling  
and installation procedures can cause damage.  
IOUT, IOUT to AGND............................................................ –1V to VA + 0.3V  
BW, BYP to AGND....................................................... –0.3V to VA + 0.3V  
ESD damage can range from subtle performance degradation  
REFIN, FSA to AGND .................................................. –0.3V to VA + 0.3V  
INT/EXT to AGND ........................................................ –0.3V to VA + 0.3V  
to complete device failure. Precision integrated circuits may  
be more susceptible to damage because very small parametric  
Junction Temperature .................................................................... +150°C  
Case Temperature ......................................................................... +100°C  
changes could cause the device not to meet its published  
Storage Temperature ..................................................................... +125°C  
specifications.  
PACKAGE/ORDERING INFORMATION  
PACKAGE  
DRAWING  
NUMBER  
SPECIFIED  
TEMPERATURE  
RANGE  
PACKAGE  
MARKING  
ORDERING  
NUMBER(1)  
TRANSPORT  
MEDIA  
PRODUCT  
PACKAGE  
DAC900U  
SO-28  
217  
"
360  
"
–40°C to +85°C  
DAC900U  
DAC900U  
DAC900U/1K  
DAC900E  
Rails  
Tape and Reel  
Rails  
"
DAC900E  
"
"
"
"
TSSOP-28  
–40°C to +85°C  
DAC900E  
"
"
"
DAC900E/2K5  
Tape and Reel  
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces  
of “DAC900E/2K5” will get a single 2500-piece Tape and Reel.  
DEMO BOARD ORDERING INFORMATION  
DEMO BOARD  
PRODUCT  
ORDERING NUMBER  
COMMENT  
DAC900U  
DAC900E  
DEM-DAC90xU  
DEM-DAC900E  
Populated evaluation board without D/A converter. Order sample of desired DAC90x model separately.  
Populated evaluation board including the DAC900E.  
®
3
DAC900  
PIN CONFIGURATION  
PIN DESCRIPTIONS  
PIN  
DESIGNATOR  
DESCRIPTION  
Top View  
SO/TSSOP  
1
2
Bit 1  
Bit 2  
Bit 3  
Bit 4  
Bit 5  
Bit 6  
Bit 7  
Bit 8  
Bit 9  
Bit 10  
NC  
Data Bit 1 (D9), MSB  
Data Bit 2 (D8)  
Data Bit 3 (D7)  
Data Bit 4 (D6)  
Data Bit 5 (D5)  
Data Bit 6 (D4)  
Data Bit 7 (D3)  
Data Bit 8 (D2)  
Data Bit 9 (D1)  
Data Bit 10 (D0), LSB  
No Connection  
No Connection  
No Connection  
No Connection  
3
4
5
6
Bit 1  
Bit 2  
Bit 3  
Bit 4  
Bit 5  
Bit 6  
Bit 7  
Bit 8  
Bit 9  
1
2
3
4
5
6
7
8
9
28 CLK  
27 +VD  
26 DGND  
25 NC  
7
8
9
10  
11  
12  
13  
14  
15  
NC  
24 +VA  
NC  
NC  
23 BYP  
22 IOUT  
21 IOUT  
20 AGND  
19 BW  
PD  
Power Down, Control Input; Active  
High. Contains internal pull-down circuit;  
may be left unconnected if not used.  
DAC900  
16  
17  
INT/EXT  
REFIN  
Reference Select Pin; Internal ( = 0) or  
External ( = 1) Reference Operation.  
Reference Input/Ouput. See Applications  
section for further details.  
Bit 10 10  
NC 11  
NC 12  
NC 13  
NC 14  
18  
19  
FSA  
BW  
Full-Scale Output Adjust  
18 FSA  
17 REFIN  
16 INT/EXT  
15 PD  
Bandwidth/Noise Reduction Pin:  
Bypass with 0.1µF to +VA for Optimum  
Performance.  
20  
21  
22  
23  
24  
25  
26  
27  
28  
AGND  
IOUT  
Analog Ground  
Complementary DAC Current Output  
DAC Current Output  
IOUT  
BYP  
+VA  
Bypass Node: Use 0.1µF to AGND  
Analog Supply Voltage, 2.7V to 5.5V  
No Connection  
NC  
DGND  
+VD  
Digital Ground  
Digital Supply Voltage, 2.7V to 5.5V  
Clock Input  
CLK  
TYPICAL CONNECTION CIRCUIT  
+5V  
+5V  
0.1µF  
+VA  
+VD  
BW  
DAC900  
IOUT  
IOUT  
1:1  
LSB  
FSA  
Switches  
BYP  
Current  
Sources  
REFIN  
Segmented  
MSB  
50Ω  
0.1µF  
20pF  
50Ω  
20pF  
RSET  
Switches  
0.1µF  
INT/EXT  
PD  
Latches  
+1.24V Ref.  
10-Bit Data Input  
D9.......D0  
AGND  
CLK  
DGND  
®
4
DAC900  
TIMING DIAGRAM  
t1  
t2  
CLK  
tS  
tH  
D9 - D0  
tSET  
tPD  
IOUT  
SYMBOL  
DESCRIPTION  
MIN  
TYP  
MAX  
UNITS  
t1  
t2  
tS  
tH  
tPD  
tSET  
Clock Pulse High Time  
Clock Pulse Low Time  
Data Setup Time  
Data Hold Time  
Propagation Delay Time  
6.25  
6.25  
2
2
(t1+t2)+1  
25  
ns  
ns  
ns  
ns  
ns  
ns  
Output Settling Time to 0.1%  
®
5
DAC900  
TYPICAL PERFORMANCE CURVES, VD = VA = +5V  
At TA = +25°C, Differential IOUT = 20mA, 50double-terminated load, SFDR up to Nyquist, unless otherwise specified.  
TYPICAL DNL  
TYPICAL INL  
1.00  
0.75  
0.50  
0.25  
0
1.00  
0.75  
0.50  
0.25  
0
–0.25  
–0.50  
–0.75  
–1.00  
–0.25  
–0.50  
–0.75  
–1.00  
DAC Code  
DAC Code  
SFDR vs fOUT AT 25MSPS  
SFDR vs fOUT AT 50MSPS  
90  
85  
80  
75  
70  
65  
60  
85  
80  
75  
70  
65  
60  
55  
–6dBFS  
–6dBFS  
0dBFS  
0dBFS  
0
2.0  
4.0  
6.0  
8.0  
10.0  
12.0  
0
5.0  
10.0  
15.0  
20.0  
25.0  
Frequency (MHz)  
Frequency (MHz)  
SFDR vs fOUT AT 100MSPS  
SFDR vs fOUT AT 125MSPS  
85  
80  
75  
70  
65  
60  
55  
50  
45  
85  
80  
75  
70  
65  
60  
55  
50  
45  
–6dBFS  
–6dBFS  
0dBFS  
0dBFS  
0
10.0  
20.0  
30.0  
40.0  
50.0  
0
10.0  
20.0  
30.0  
40.0  
50.0  
60.0  
Frequency (MHz)  
Frequency (MHz)  
®
6
DAC900  
TYPICAL PERFORMANCE CURVES, VD = VA = +5V (Cont.)  
At TA = +25°C, Differential IOUT = 20mA, 50double-terminated load, SFDR up to Nyquist, unless otherwise specified.  
SFDR vs fOUT AT 165MSPS  
SFDR vs fOUT AT 200MSPS  
80  
75  
70  
65  
60  
55  
50  
45  
40  
80  
75  
70  
65  
60  
55  
50  
45  
40  
–6dBFS  
0dBFS  
–6dBFS  
0dBFS  
0
0
0
10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0  
Frequency (MHz)  
0
10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0 90.0  
Frequency (MHz)  
DIFFERENTIAL vs SINGLE-ENDED SFDR vs fOUT  
AT 100MSPS  
SFDR vs IOUTFS and fOUT AT 100MSPS, 0dBFS  
85  
80  
75  
70  
65  
60  
55  
50  
45  
80  
75  
70  
65  
60  
55  
50  
45  
40  
2.1MHz  
X
5.04MHz  
X
IOUT (–6dBFS)  
*
*
*
*
10.1MHz  
Diff (–6dBFS)  
X
X
X
40.4MHz  
X
X
X
X
X
X
IOUT (0dBFS)  
Diff (0dBFS)  
10.0  
20.0  
30.0  
40.0  
50.0  
2
5
10  
20  
Frequency (MHz)  
I
OUTFS (mA)  
SFDR vs TEMPERATURE AT 100MSPS, 0dBFS  
2.1MHz  
THD vs fCLOCK AT fOUT = 2.1MHz  
85  
80  
75  
70  
65  
60  
55  
50  
45  
–70  
–75  
–80  
–85  
–90  
–95  
–100  
2HD  
3HD  
10.1MHz  
40.4MHz  
X
X
X
X
X
X
X
–40  
–20  
0
25  
50  
70  
85  
25  
50  
100  
125  
150  
Temperature (°C)  
f
CLOCK (MSPS)  
®
7
DAC900  
TYPICAL PERFORMANCE CURVES, VD = VA = +5V (Cont.)  
At TA = +25°C, Differential IOUT = 20mA, 50double-terminated load, SFDR up to Nyquist, unless otherwise specified.  
DUAL-TONE OUTPUT SPECTRUM  
FOUR-TONE OUTPUT SPECTRUM  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
0
5
10  
15 20  
25  
30  
35  
40  
45 50  
0
5
10  
15  
20  
25  
Frequency (MHz)  
Frequency (MHz)  
®
8
DAC900  
TYPICAL PERFORMANCE CURVES, VD = VA = +3V  
At TA = +25°C, Differential IOUT = 20mA, 50double-terminated load, SFDR up to Nyquist, unless otherwise specified.  
SFDR vs fOUT AT 25MSPS (3V)  
SFDR vs fOUT AT 50MSPS (3V)  
85  
80  
75  
70  
65  
60  
55  
85  
80  
75  
70  
65  
60  
55  
–6dBFS  
–6dBFS  
0dBFS  
0dBFS  
0
0
0
2.0  
4.0  
6.0  
8.0  
10.0  
12.0  
0
0
0
5.0  
10.0  
15.0  
20.0  
25.0  
60.0  
50.0  
Frequency (MHz)  
Frequency (MHz)  
SFDR vs fOUT AT 100MSPS (3V)  
SFDR vs fOUT AT 125MSPS (3V)  
85  
80  
75  
70  
65  
60  
55  
50  
45  
85  
80  
75  
70  
65  
60  
55  
50  
45  
–6dBFS  
–6dBFS  
0dBFS  
10.0  
0dBFS  
10.0  
20.0  
30.0  
40.0  
50.0  
20.0  
30.0  
40.0  
50.0  
Frequency (MHz)  
Frequency (MHz)  
DIFFERENTIAL vs SINGLE-ENDED SFDR vs fOUT  
AT 100MSPS (3V)  
SFDR vs fOUT AT 165MSPS (3V)  
85  
80  
75  
70  
65  
60  
55  
50  
45  
80  
75  
70  
65  
60  
55  
50  
45  
40  
X
X
Diff (–6dBFS)  
–6dBFS  
X
X
Diff (0dBFS)  
X
0dBFS  
IOUT (0dBFS)  
X
X
IOUT (–6dBFS)  
10.0  
20.0  
30.0  
40.0  
10.0 20.0 30.0 40.0 50.0 60.0 70.0 80.0  
Frequency (MHz)  
Frequency (MHz)  
®
9
DAC900  
TYPICAL PERFORMANCE CURVES, VD = VA = +3V (Cont.)  
At TA = +25°C, Differential IOUT = 20mA, 50double-terminated load, SFDR up to Nyquist, unless otherwise specified.  
SFDR vs IOUTFS and fOUT AT 100MSPS (3V)  
2.1MHz  
THD vs fCLOCK AT fOUT = 2.1MHz (3V)  
2HD  
80  
75  
70  
65  
60  
55  
50  
45  
40  
–70  
–75  
–80  
–85  
–90  
–95  
–100  
5.04MHz  
40.4MHz  
X
X
X
X
10.1MHz  
3HD  
*
*
*
*
2
5
10  
20  
0
25  
50  
100  
125  
150  
IOUTFS (mA)  
f
CLOCK (MSPS)  
SFDR vs TEMPERATURE AT 100MSPS, 0dBFS (3V)  
2.1MHz  
DUAL-TONE OUTPUT SPECTRUM  
80  
75  
70  
65  
60  
55  
50  
45  
40  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
10.1MHz  
40.4MHz  
X
X
X
X
X
X
X
–40  
–20  
0
25  
50  
70  
85  
0
5
10  
15 20  
25  
30  
35  
40  
45 50  
Temperature (°C)  
Frequency (MHz)  
FOUR-TONE OUTPUT SPECTRUM  
0
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
0
5
10  
15  
20  
25  
Frequency (MHz)  
®
10  
DAC900  
DAC TRANSFER FUNCTION  
APPLICATION INFORMATION  
THEORY OF OPERATION  
The total output current, IOUTFS, of the DAC900 is the  
summation of the two complementary output currents:  
The architecture of the DAC900 uses the current steering  
technique to enable fast switching and a high update rate.  
The core element within the monolithic D/A converter is an  
array of segmented current sources, which are designed to  
deliver a full-scale output current of up to 20mA (see  
Figure 1). An internal decoder addresses the differential  
current switches each time the DAC is updated and a  
corresponding output current is formed by steering all  
IOUTFS = IOUT + IOUT  
(1)  
The individual output currents depend on the DAC code and  
can be expressed as:  
IOUT = IOUTFS • (Code/1024)  
(2)  
(3)  
currents to either output summing node, IOUT or IOUT  
.
The complementary outputs deliver a differential output  
signal, which improves the dynamic performance through  
reduction of even-order harmonics, common-mode signals  
(noise), and double the peak-to-peak output signal swing by  
a factor of two, compared to single-ended operation.  
IOUT = IOUTFS • (1023 - Code/1024)  
where ‘Code’ is the decimal representation of the DAC data  
input word. Additionally, IOUTFS is a function of the refer-  
ence current IREF, which is determined by the reference  
The segmented architecture results in a significant reduc-  
tion of the glitch energy, and improves the dynamic perfor-  
mance (SFDR) and DNL. The current outputs maintain a  
very high output impedance of greater than 200k.  
voltage and the external setting resistor, RSET  
.
IOUTFS = 32 • IREF = 32 • VREF/RSET  
(4)  
The full-scale output current is determined by the ratio of  
the internal reference voltage (1.24V) and an external  
resistor, RSET. The resulting IREF is internally multiplied by  
a factor of 32 to produce an effective DAC output current  
that can range from 2mA to 20mA, depending on the value  
In most cases the complementary outputs will drive resistive  
loads or a terminated transformer. A signal voltage will  
develop at each output according to:  
of RSET  
.
VOUT = IOUT • RLOAD  
VOUT = IOUT • RLOAD  
(5)  
(6)  
The DAC900 is split into a digital and an analog portion,  
each of which is powered through its own supply pin. The  
digital section includes edge-triggered input latches and the  
decoder logic, while the analog section comprises the cur-  
rent source array with its associated switches and the  
reference circuitry.  
+3V to +5V  
Digital  
+3V to +5V  
Analog  
0.1µF  
Bandwidth  
Control  
BW  
+VA  
+VD  
DAC900  
Full-Scale  
Adjust  
Resistor  
IOUT  
IOUT  
1:1  
VOUT  
LSB  
Switches  
FSA  
PMOS  
Current  
Source  
Array  
Ref  
Control  
Amp  
Ref  
Input REFIN  
Segmented  
MSB  
Switches  
50Ω  
400pF  
RSET  
2kΩ  
20pF  
50Ω  
20pF  
0.1µF  
0.1µF  
BYP  
INT/EXT  
Ref  
Buffer  
Latches and Switch  
Decoder Logic  
PD  
Power Down  
(internal pull-down)  
+1.24V Ref  
10-Bit Data Input  
D9...D0  
AGND  
Analog  
CLK  
DGND  
Clock  
Input  
Digital  
Ground  
Ground  
NOTE: Supply bypassing not shown.  
FIGURE 1. Functional Block Diagram of the DAC900.  
®
11  
DAC900  
IOUT and IOUT. Furthermore, using the differential output  
configuration in combination with a transformer will be  
instrumental for achieving excellent distortion performance.  
Common-mode errors, such as even-order harmonics or  
noise, can be substantially reduced. This is particularly the  
case with high output frequencies and/or output amplitudes  
below full-scale.  
The value of the load resistance is limited by the output  
compliance specification of the DAC900. To maintain speci-  
fied linearity performance, the voltage for IOUT and IOUT  
should not exceed the maximum allowable compliance range.  
The two single-ended output voltages can be combined to  
find the total differential output swing:  
(2 Code – 1023)  
For those applications requiring the optimum distortion and  
noise performance, it is recommended to select a full-scale  
output of 20mA. A lower full-scale range down to 2mA may  
be considered for applications that require a low power  
consumption, but can tolerate a reduced performance level.  
VOUTDIFF = VOUT – VOUT  
=
IOUTFS RLOAD  
(7)  
1024  
ANALOG OUTPUTS  
The DAC900 provides two complementary current outputs,  
IOUT and IOUT. The simplified circuit of the analog output  
stage representing the differential topology is shown in  
Figure 2. The output impedance of 200k|| 12pF for IOUT  
and IOUT results from the parallel combination of the differ-  
ential switches, along with the current sources and associ-  
ated parasitic capacitances.  
INPUT CODE (D9 - D0)  
IOUT  
IOUT  
11 1111 1111  
10 0000 0000  
00 0000 0000  
20mA  
10mA  
0mA  
0mA  
10mA  
20mA  
Table I. Input Coding vs Analog Output Current.  
OUTPUT CONFIGURATIONS  
The current output of the DAC900 allows for a variety of  
configurations, some of which are illustrated below. As  
mentioned previously, utilizing the converter’s differential  
outputs will yield the best dynamic performance. Such a  
differential output circuit may consist of an RF transformer  
(see Figure 3) or a differential amplifier configuration (see  
Figure 4). The transformer configuration is ideal for most  
applications with ac coupling, while op amps will be suitable  
for a dc-coupled configuration.  
+VA  
DAC900  
The single-ended configuration (see Figure 6) may be con-  
sidered for applications requiring a unipolar output voltage.  
Connecting a resistor from either one of the outputs to  
ground will convert the output current into a ground-refer-  
enced voltage signal. To improve on the dc linearity an I to  
V converter can be used instead. This will result in a  
negative signal excursion and, therefore, requires a dual  
supply amplifier.  
IOUT  
IOUT  
RL  
RL  
FIGURE 2. Equivalent Analog Output.  
DIFFERENTIAL WITH TRANSFORMER  
The signal voltage swing that may develop at the two  
outputs, IOUT and IOUT, is limited by a negative and positive  
compliance. The negative limit of –1V is given by the  
breakdown voltage of the CMOS process, and exceeding it  
will compromise the reliability of the DAC900, or even  
cause permanent damage. With the full-scale output set to  
20mA, the positive compliance equals 1.25V, operating with  
+VD = 5V. Note that the compliance range decreases to  
about 1V for a selected output current of IOUTFS = 2mA.  
Care should be taken that the configuration of DAC900 does  
not exceed the compliance range to avoid degradation of the  
distortion performance and integral linearity.  
Using an RF transformer provides a convenient way of  
converting the differential output signal into a single-ended  
signal while achieving excellent dynamic performance (see  
Figure 3). The appropriate transformer should be carefully  
selected based on the output frequency spectrum and imped-  
ance requirements. The differential transformer configura-  
tion has the benefit of significantly reducing common-mode  
signals, thus improving the dynamic performance over a  
wide range of frequencies. Furthermore, by selecting a  
suitable impedance ratio (winding ratio), the transformer can  
be used to provide optimum impedance matching while  
controlling the compliance voltage for the converter outputs.  
The model shown, ADT1-1WT (by Mini-Circuits), has a 1:1  
ratio and may be used to interface the DAC900 to a 50Ω  
load. This results in a 25load for each of the outputs, IOUT  
and IOUT. The output signals are ac coupled and inherently  
isolated because of the transformer's magnetic coupling .  
Best distortion performance is typically achieved with the  
maximum full-scale output signal limited to approximately  
0.5V. This is the case for a 50doubly terminated load and  
a 20mA full-scale output current. A variety of loads can be  
adapted to the output of the DAC900 by selecting a suitable  
transformer while maintaining optimum voltage levels at  
®
12  
DAC900  
As shown in Figure 3, the transformer’s center tap is con-  
nected to ground. This forces the voltage swing on IOUT and  
IOUT to be centered at 0V. In this case the two resistors, RS,  
may be replaced with one, RDIFF, or omitted altogether. This  
approach should only be used if all components are close to  
each other, and if the VSWR is not important. A complete  
power transfer from the DAC output to the load can be  
realized, but the output compliance range should be ob-  
served. Alternatively, if the center tap is not connected, the  
signal swing will be centered at RS • IOUTFS/2. However, in  
this case, the two resistors, RS, must be used to enable the  
necessary dc-current flow for both outputs.  
The OPA680 is configured for a gain of two. Therefore,  
operating the DAC900 with a 20mA full-scale output will  
produce a voltage output of ±1V. This requires the amplifier  
to operate off of a dual power supply (±5V). The tolerance  
of the resistors typically sets the limit for the achievable  
common-mode rejection. An improvement can be obtained  
by fine tuning resistor R4.  
This configuration typically delivers a lower level of ac  
performance than the previously discussed transformer solu-  
tion because the amplifier introduces another source of  
distortion. Suitable amplifiers should be selected based on  
their slew-rate, harmonic distortion, and output swing capa-  
bilities. High-speed amplifiers like the OPA680 or OPA687  
may be considered. The ac performance of this circuit may  
be improved by adding a small capacitor, CDIFF, between the  
ADT1-1WT  
outputs IOUT and IOUT, as shown in Figure 4. This will intro-  
(Mini-Circuits)  
1:1  
duce a real pole to create a low-pass filter in order to slew-  
limit the DACs fast output signal steps, which otherwise  
could drive the amplifier into slew-limitations or into an  
overload condition; both would cause excessive distortion.  
The difference amplifier can easily be modified to add a  
level shift for applications requiring the single-ended output  
voltage to be unipolar, i.e., swing between 0V and +2V.  
IOUT  
RS  
50  
Optional  
RDIFF  
DAC900  
RL  
IOUT  
RS  
50Ω  
DUAL TRANSIMPEDANCE OUTPUT CONFIGURATION  
FIGURE 3. Differential Output Configuration Using an RF  
Transformer.  
The circuit example of Figure 5 shows the signal output  
currents connected into the summing junction of the  
OPA2680, which is set up as a transimpedance stage, or  
‘I to V converter’. With this circuit, the DAC’s output will  
be kept at a virtual ground, minimizing the effects of output  
impedance variations, and resulting in the best dc linearity  
(INL). However, as mentioned previously, the amplifier  
may be driven into slew-rate limitations, and produce un-  
wanted distortion. This may occur, especially, at high DAC  
update rates.  
DIFFERENTIAL CONFIGURATION USING AN OP AMP  
If the application requires a dc-coupled output, a difference  
amplifier may be considered, as shown in Figure 4. Four  
external resistors are needed to configure the voltage-feed-  
back op amp OPA680 as a difference amplifier performing  
the differential to single-ended conversion. Under the shown  
configuration, the DAC900 generates a differential output  
signal of 0.5Vp-p at the load resistors, RL. The resistor  
values shown were selected to result in a symmetric 25Ω  
loading for each of the current outputs since the input  
impedance of the difference amplifier is in parallel to resis-  
tors RL, and should be considered.  
+5V  
50  
1/2  
OPA2680  
–VOUT = IOUT • RF  
RF1  
CF1  
DAC900  
R2  
402  
IOUT  
CD1  
R1  
200Ω  
IOUT  
RF2  
CF2  
VOUT  
DAC900  
IOUT  
OPA680  
R3  
200Ω  
CDIFF  
CD2  
IOUT  
–5V +5V  
RL  
28.7Ω  
R4  
402Ω  
RL  
26.1Ω  
1/2  
OPA2680  
–VOUT = IOUT • RF  
50Ω  
–5V  
FIGURE 4. Difference Amplifier Provides Differential to  
Single-Ended Conversion and DC-Coupling.  
FIGURE 5. Dual, Voltage-Feedback Amplifier OPA2680  
Forms Differential Transimpedance Amplifier.  
®
13  
DAC900  
INTERNAL REFERENCE OPERATION  
The DC gain for this circuit is equal to feedback resistor RF.  
At high frequencies, the DAC output impedance (CD1, CD2)  
will produce a zero in the noise gain for the OPA2680 that  
may cause peaking in the closed-loop frequency response.  
CF is added across RF to compensate for this noise gain  
peaking. To achieve a flat transimpedance frequency re-  
sponse, the pole in each feedback network should be set to:  
The DAC900 has an on-chip reference circuit which com-  
prises a 1.24V bandgap reference and a control amplifier.  
Grounding of pin 16, INT/EXT, enables the internal refer-  
ence operation. The full-scale output current, IOUTFS, of the  
DAC900 is determined by the reference voltage, VREF, and  
the value of resistor RSET. IOUTFS can be calculated by:  
IOUTFS = 32 • IREF = 32 • VREF / RSET  
(10)  
1
GBP  
=
(8)  
2πRFCF 4πRFCD  
As shown in Figure 7, the external resistor RSET connects to  
the FSA pin (Full-Scale Adjust). The reference control  
amplifier operates as a V to I converter producing a refer-  
ence current, IREF, which is determined by the ratio of VREF  
and RSET (see Equation 10). The full-scale output current,  
IOUTFS, results from multiplying IREF by a fixed factor of 32.  
with GBP = Gain Bandwidth Product of OPA  
which will give a corner frequency f-3dB of approximately:  
GBP  
f3dB  
=
(9)  
2πRFCD  
+5V  
CCOMPEXT  
0.1µF  
The full-scale output voltage is defined by the product of  
IOUTFS • RF, and has a negative unipolar excursion. To  
improve on the ac performance of this circuit, adjustment of  
RF and/or IOUTFS should be considered. Further extensions of  
this application example may include adding a differential  
filter at the OPA2680’s output followed by a transformer, in  
order to convert to a single-ended signal.  
BW  
+VA  
DAC900  
VREF  
RSET  
IREF  
=
FSA  
Ref  
Control  
Amp  
Current  
Sources  
REFIN  
RSET  
2k  
SINGLE-ENDED CONFIGURATION  
CCOMP  
400pF  
0.1µF  
Using a single load resistor connected to the one of the DAC  
outputs, a simple current-to-voltage conversion can be ac-  
complished. The circuit in Figure 6 shows a 50resistor  
connected to IOUT, providing the termination of the further  
connected 50cable. Therefore, with a nominal output  
current of 20mA, the DAC produces a total signal swing of  
0 to 0.5V into the 25load.  
INT/EXT  
+1.24V Ref.  
FIGURE 7. Internal Reference Configuration.  
Using the internal reference, a 2kresistor value results in  
a 20mA full-scale output. Resistors with a tolerance of 1%  
or better should be considered. Selecting higher values, the  
converter output can be adjusted from 20mA down to 2mA.  
Operating the DAC900 at lower than 20mA output currents  
may be desirable for reasons of reducing the total power  
consumption, improving the distortion performance, or ob-  
serving the output compliance voltage limitations for a given  
load condition.  
IOUTFS = 20mA  
VOUT = 0V to +0.5V  
IOUT  
DAC900  
IOUT  
50  
50Ω  
25Ω  
It is recommended to bypass the REFIN pin with a ceramic chip  
capacitor of 0.1µF or more. The control amplifier is internally  
compensated, and its small signal bandwidth is approximately  
1.3MHz. To improve the ac performance, an additional capaci-  
tor (CCOMPEXT) should be applied between the BW pin and the  
analog supply, +VA, as shown in Figure 7. Using a 0.1µF  
capacitor, the small-signal bandwidth and output impedance of  
the control amplifier is further diminished, reducing the noise  
that is fed into the current source array. This also helps  
shunting feedthrough signals more effectively, and improving  
the noise performance of the DAC900.  
FIGURE6. DrivingaDoublyTerminated50CableDirectly.  
Different load resistor values may be selected as long as the  
output compliance range is not exceeded. Additionally, the  
output current, IOUTFS, and the load resistor, may be mutu-  
ally adjusted to provide the desired output signal swing and  
performance.  
®
14  
DAC900  
EXTERNAL REFERENCE OPERATION  
POWER-DOWN MODE  
The DAC900 features a power-down function which can be  
used to reduce the supply current to less than 9mA over the  
specified supply range of 2.7V to 5.5V. Applying a logic  
High to the PD pin will initiate the power-down mode, while  
a logic Low enables normal operation. When left uncon-  
nected, an internal active pull-down circuit will enable the  
normal operation of the converter.  
The internal reference can be disabled by applying a logic  
High (+VA) to pin INT/EXT. An external reference voltage  
can then be driven into the REFIN pin, which in this case  
functions as an input, as shown in Figure 8. The use of an  
external reference may be considered for applications that  
require higher accuracy and drift performance, or to add the  
ability of dynamic gain control.  
While a 0.1µF capacitor is recommended to be used with the  
internal reference, it is optional for the external reference  
operation. The reference input, REFIN, has a high input  
impedance (1M) and can easily be driven by various  
sources. Note that the voltage range of the external reference  
should stay within the compliance range of the reference  
input (0.1V to 1.25V).  
GROUNDING, DECOUPLING AND  
LAYOUT INFORMATION  
Proper grounding and bypassing, short lead length, and the  
use of ground planes are particularly important for high  
frequency designs. Multilayer pc-boards are recommended  
for best performance since they offer distinct advantages  
such as minimization of ground impedance, separation of  
signal layers by ground layers, etc.  
DIGITAL INPUTS  
The DAC900 uses separate pins for its analog and digital  
supply and ground connections. The placement of the decou-  
pling capacitor should be such that the analog supply (+VA)  
is bypassed to the analog ground (AGND), and the digital  
supply bypassed to the digital ground (DGND). In most  
cases 0.1uF ceramic chip capacitors at each supply pin are  
adequate to provide a low impedance decoupling path. Keep  
in mind that their effectiveness largely depends on the  
proximity to the individual supply and ground pins. There-  
fore they should be located as close as physically possible to  
those device leads. Whenever possible, the capacitors should  
be located immediately under each pair of supply/ground  
pins on the reverse side of the pc board. This layout ap-  
proach will minimize the parasitic inductance of component  
leads and pcb runs.  
The digital inputs, D0 (LSB) through D9 (MSB) of the  
DAC900 accept standard positive binary coding. The digital  
input word is latched into a master-slave latch with the rising  
edge of the clock. The DAC output becomes updated with  
the following rising clock edge (refer to the specification  
table and timing diagram for details). The best performance  
will be achieved with a 50% clock duty cycle, however, the  
duty cycle may vary as long as the timing specifications are  
met. Additionally, the setup and hold times may be chosen  
within their specified limits.  
All digital inputs are CMOS compatible. The logic thresh-  
olds depend on the applied digital supply voltage such that  
they are set to approximately half the supply voltage;  
Vth = +VD/2 (±20% tolerance). The DAC900 is designed to  
operate over a supply range of 2.7V to 5.5V.  
+5V  
CCOMPEXT  
0.1µF  
BW  
+VA  
DAC900  
VREF  
RSET  
IREF  
=
FSA  
Ref  
Control  
Amp  
Current  
Sources  
REFIN  
External  
Reference  
CCOMP  
400pF  
INT/EXT  
RSET  
+5V  
+1.24V Ref.  
FIGURE 8. External Reference Configuration.  
®
15  
DAC900  
Further supply decoupling with surface mount tantalum  
capacitors (1uF to 4.7uF) may be added as needed in  
proximity of the converter.  
The power to the DAC900 should be provided through the  
use of wide pcb runs or planes. Wide runs will present a  
lower trace impedance, further optimizing the supply decou-  
pling. The analog and digital supplies for the converter  
should only be connected together at the supply connector of  
the pc board. In the case of only one supply voltage being  
available to power the DAC, ferrite beads along with bypass  
capacitors may be used to create an LC filter. This will  
generate a low noise analog supply voltage, which can then  
be connected to the +VA supply pin of the DAC900.  
Low noise is required for all supply and ground connections  
to the DAC900. It is recommended to use a multilayer pc-  
board utilizing separate power and ground planes. Mixed  
signal designs require particular attention to the routing of  
the different supply currents and signal traces. Generally,  
analog supply and ground planes should only extend into  
analog signal areas, such as the DAC output signal and the  
reference signal. Digital supply and ground planes must be  
confined to areas covering digital circuitry, including the  
digital input lines connecting to the converter, as well as the  
clock signal. The analog and digital ground planes should be  
joined together at one point underneath the D/A converter.  
This can be realized with a short track of approximately  
1/8inch (3mm).  
While designing the layout, it is important to keep the analog  
signal traces separated from any digital line, in order to  
prevent noise coupling onto the analog signal path.  
®
16  
DAC900  
配单直通车
DAC900E产品参数
型号:DAC900E
是否Rohs认证: 不符合
生命周期:Transferred
IHS 制造商:BURR-BROWN CORP
包装说明:TSSOP-28
Reach Compliance Code:unknown
风险等级:5.78
Is Samacsys:N
最大模拟输出电压:1.25 V
最小模拟输出电压:-1 V
转换器类型:D/A CONVERTER
输入位码:BINARY
输入格式:PARALLEL, WORD
JESD-30 代码:R-PDSO-G28
JESD-609代码:e0
最大线性误差 (EL):0.0488%
标称负供电电压:-5 V
位数:10
功能数量:1
端子数量:28
最高工作温度:85 °C
最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP
封装等效代码:TSSOP28,.25
封装形状:RECTANGULAR
封装形式:SMALL OUTLINE
电源:5 V
认证状态:Not Qualified
标称安定时间 (tstl):0.03 µs
子类别:Other Converters
最大压摆率:30 mA
标称供电电压:5 V
表面贴装:YES
技术:CMOS
温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING
端子节距:0.635 mm
端子位置:DUAL
Base Number Matches:1
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