DM8108
8 port 10/100M Fast Ethernet Switching Controller
Auto-Negotiation
Enabling Partition Mode
Partitioned mode is enabled always.
Entering Partition State
Auto-negotiation disabled
When ANEG* (MA[7:0]) strap pin is high, auto-
negotiation is disabled, and the corresponding port
can be selected as half- or full- duplex mode
respectively. Following the RESET the port duplex
mode is set by the state sampled on the TXEN(7:0)
A port will enter the Partition state when PAEN* strap pin
sampled low during reset and when either of the following
conditions occurs:
pins.
The speed that each port operates in (10Mbps
or 100Mbps) is determined by the frequency of
TxCLK(7:0) and RxCLK(7:0) generated by PHY. The
PHY generates 25MHz clock for both TxCLK and
RxCLK in 100Mbps operation and 2.5MHz clock in
10Mbps operation.
The port detects a collision on every one of 64
consecutive re-transmit attempts to the same packet.
The port detects a single collision which occurs for
more than 512 bit times.
Auto-negotiation enabled
While in Partition state:
When ANEG* (MA[7:0]) pins are tied low, the MAC
decodes the duplex mode from the values of the
Auto-Negotiation Advertisement Register and the
Auto-Negotiation Link Partner Ability Register at the
end of Auto-negotiation process. Once the duplex
mode is resolved, the DM8108 updates the port
control registers. The DM8108 will continuously
perform the following operations for each port (PHY
address 0-7 alternatively), implemented as READ
commands issued via the MDCLK/MDIO interface:
The portwill continue to transmit its pending packet,
regardless of the collision detection, and will not allow
the usual Back-off Algorithm. Additional packets
pending for transmission, will be transmitted, while
ignoring the internal collision indication. This frees up
the port’s transmit buffers which would otherwise be
filled up at the expense of other ports buffers. The
assumption is that the partition is signifying a system
failure situation (bad connection/cable/station), thus
dropping packets is a small price to pay vs. the cost of
halting the switch due to a buffer full condition. The
partition indication is available via the LED interface.
Link Detection and Link Detection Bypass
(FLNK*)
Exiting from Partition State
The DM8108 will continuously query the PHY devices
for their link status associated with Auto-Negotiation
Process. The DM8108 will alternatively read
registers from PHY address 0 to 7 and update the
internal link bits according to the value of bit 2 of
register 1. In case of link down (bit 1.2=0), that port
will enter “link test fail state”. In this state, all the port’s
logic go to a reset state. The port will enter the “link
up state” if the bit 1.2 is “1” or the FLNK* (force link,
LEDSTB* strobed low during reset) pin is sampled low
during reset.
The Port exits from Partition State, following the end of a
successful packet transmission. A successful packet
transmission is defined as no collisionswere detected on the
first 512 bits of the transmission.
Expansion Bus
The expansion bus operates at Full-Duplex mode that
provides up-to 7200Mbps bandwidth for device to
device connection. Several DM8108 can be
cascaded as a pipe to provide a robust Ethernet
Switching system.
Partition Mode
A port enters partition mode when more than 64
consecutive collisions are seen on the port. In partition
mode the port continuous to transmit but itwill not receive.
A port returned to normal operation mode when a good
packet is seen on the wire.
The bus itself is very simple. The transmit and receive ports
contain independent data, valid and handshake signals.
No bus arbitration is involved.
20
Preliminary
Version: DM8108-DS-P02
November 25, 1999
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