DS1820芯片引脚定义引脚图及功能IC贸易商引脚图技术参数-中国IC网-芯三七

DS1820

1–Wire^TMDigital Thermometer

FEATURES

PIN ASSIGNMENT

TM

• Unique 1–Wire interface requires only one port pin

for communication

DALLAS

DS1820

DS2434

1

2

3

• Multidropcapabilitysimplifiesdistributedtemperature

sensing applications

BOTTOM VIEW

• Requires no external components

• Can be powered from data line

• Zero standby power required

1

2 3

NC

VDD

DQ

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

NC

GND

• Measures temperatures from –55°C to +125°C in

0.5°C increments. Fahrenheit equivalent is –67°F to

+257°F in 0.9°F increments

• Temperature is read as a 9–bit digital value.

DS1820

DS1820S

• Converts temperature to digital word in 200 ms (typ.)

PR35 PACKAGE

See Mech. Drawings

Section

16–PIN SSOP

See Mech. Drawings

Section

• User–definable, nonvolatile temperature alarm set-

tings

PIN DESCRIPTION

• Alarm search command identifies and addresses

devices whose temperature is outside of pro-

grammed limits (temperature alarm condition)

GND

–

Ground

Data In/Out

Optional V

DQ

V

DD

• Applications include thermostatic controls, industrial

systems, consumer products, thermometers, or any

thermally sensitive system

NC

No Connect

DESCRIPTION

The DS1820 Digital Thermometer provides 9–bit tem-

perature readings which indicate the temperature of the

device.

Because each DS1820 contains a unique silicon serial

number, multiple DS1820s can exist on the same

1–Wire bus. This allows for placing temperature sen-

sors in many different places. Applications where this

feature is useful include HVAC environmental controls,

sensing temperatures inside buildings, equipment or

machinery, and in process monitoring and control.

Information is sent to/from the DS1820 over a 1–Wire

interface, sothatonlyonewire(andground)needstobe

connected from a central microprocessor to a DS1820.

Power for reading, writing, and performing temperature

conversions can be derived from the data line itself with

no need for an external power source.

030598 1/27

DS1820

DETAILED PIN DESCRIPTION

16–PIN SSOP

PR35

SYMBOL

GND

DESCRIPTION

9

8

1

2

Ground.

DQ

Data Input/Output pin. For 1–Wire operation: Open drain. (See

“Parasite Power” section.)

7

3

V

DD

Optional V pin. See “Parasite Power” section for details of

connection.

DD

DS1820S (16–pin SSOP): All pins not specified in this table are not to be connected.

a specific device if many are present on the 1–Wire line

OVERVIEW

The block diagram of Figure 1 shows the major compo-

nents of the DS1820. The DS1820 has three main data

components: 1) 64–bit lasered ROM, 2) temperature

sensor, and 3) nonvolatile temperature alarm triggers

TH and TL. The device derives its power from the

1–Wire communication line by storing energy on an

internalcapacitor during periods of time when the signal

line is high and continues to operate off this power

source during the low times of the 1–Wire line until it

returnshigh to replenish the parasite (capacitor) supply.

As an alternative, the DS1820 may also be powered

from an external 5 volts supply.

as well as indicate to the Bus Master how many and

what types of devices are present. After a ROM function

sequencehasbeensuccessfullyexecuted, thememory

and control functions are accessible and the master

may then provide any one of the six memory and control

function commands.

One control function command instructs the DS1820 to

perform a temperature measurement. The result of this

measurement will be placed in the DS1820’s scratch-

pad memory, and may be read by issuing a memory

function command which reads the contents of the

scratchpad memory. The temperature alarm triggers

TH and TL consist of one byte EEPROM each. If the

alarm search command is not applied to the DS1820,

these registers may be used as general purpose user

memory. Writing TH and TL is done using a memory

function command. Read access to these registers is

through the scratchpad. All data is read and written

least significant bit first.

CommunicationtotheDS1820isviaa1–Wireport.With

the 1–Wire port, the memory and control functions will

not be available before the ROM function protocol has

been established. The master must first provide one of

five ROM function commands: 1) Read ROM, 2) Match

ROM, 3) Search ROM, 4) Skip ROM, or 5) Alarm

Search. These commands operate on the 64–bit

lasered ROM portion of each device and can single out

DS1820 BLOCK DIAGRAM Figure 1

MEMORY AND

CONTROL LOGIC

64–BIT ROM

AND

DQ

1–WIRE PORT

TEMPERATURE SENSOR

SCRATCHPAD

INTERNAL V

DD

HIGH TEMPERATURE

TRIGGER, TH

LOW TEMPERATURE

TRIGGER, TL

POWER

SUPPLY

SENSE

8–BIT CRC

GENERATOR

V

DD

030598 2/27

DS1820

V

DD

pin, as shown in Figure 3. The advantage to this is

PARASITE POWER

The block diagram (Figure 1) shows the parasite pow-

eredcircuitry. Thiscircuitry“steals”powerwheneverthe

thatthestrongpull–upisnotrequiredontheI/Oline, and

the bus master need not be tied up holding that line high

during temperature conversions. This allows other data

traffic on the 1–Wire bus during the conversion time. In

addition,anynumberofDS1820’s may beplacedonthe

1–Wire bus, and if they all use external power, they may

all simultaneously perform temperature conversions by

issuing the Skip ROM command and then issuing the

Convert T command. Note that as long as the external

power supply is active, the GND pin may not be floating.

I/O or V pins are high. I/O will provide sufficientpower

DD

as long as the specified timing and voltage require-

ments are met (see the section titled “1–Wire Bus Sys-

tem”). The advantages of parasite power are two–fold:

1) by parasiting off this pin, no local power source is

needed for remote sensing of temperature, and 2) the

ROM may be read in absence of normal power.

In order for the DS1820 to be able to perform accurate

temperature conversions, sufficient power must be pro-

videdovertheI/Olinewhenatemperatureconversionis

taking place. Since the operating current of the DS1820

is up to 1 mA, the I/O line will not have sufficient drive

due to the 5K pull–up resistor. This problem is particu-

larly acute if several DS1820’s are on the same I/O and

attempting to convert simultaneously.

The use of parasite power is not recommended above

100°C, since it may not be able to sustain communica-

tions given the higher leakage currents the DS1820

exhibits at these temperatures. For applications in

which such temperatures are likely, it is strongly recom-

mended that V be applied to the DS1820.

DD

For situations where the bus master does not know

whether the DS1820’s on the bus are parasite powered

Thereare two ways to assure that the DS1820 has suffi-

cient supply current during its active conversion cycle.

The first is to provide a strong pull–up on the I/O line

or supplied with external V , a provision is made in the

DD

DS1820 to signal the power supply scheme used. The

bus master can determine if any DS1820’s are on the

bus which require the strong pull–up by sending a Skip

ROM protocol, then issuing the read power supply com-

mand. After this command is issued, the master then

issues read time slots. The DS1820 will send back “0”

on the 1–Wire bus if it is parasite powered; it will send

2

whenever temperature conversions or copies to the E

memory are taking place. This may be accomplished by

using a MOSFET to pull the I/O line directly to the power

supply as shown in Figure 2. The I/O line must be

switched over to the strong pull–up within 10 µs maxi-

mum after issuing any protocol that involves copying to

2

the E memory or initiates temperature conversions.

back a “1” if it is powered from the V pin. If the master

DD

When using the parasite power mode, the V pin must

be tied to ground.

receives a “0”, it knows that it must supply the strong

pull–up on the I/O line during temperature conversions.

See “Memory Command Functions” section for more

detail on this command protocol.

DD

Another method of supplying current to the DS1820 is

through the use of an external power supply tied to the

STRONG PULL–UP FOR SUPPLYING DS1820 DURING TEMPERATURE CONVERSION Figure 2

+5V

DS1820

+5V

GND

V

DD

4.7K

µP

I/O

030598 3/27

DS1820

USING V_DDTO SUPPLY TEMPERATURE CONVERSION CURRENT Figure 3

TO OTHER 1–WIRE

DEVICES

DS1820

+5V

4.7K

V

DD

EXTERNAL +5V SUPPLY

I/O

µP

provided in a 16–bit, sign–extended two’s complement

reading. Table 1 describes the exact relationship of out-

put data to measured temperature. The data is trans-

mitted serially over the 1–Wire interface. The DS1820

can measure temperature over the range of –55°C to

+125°C in 0.5°C increments. For Fahrenheit usage, a

lookup table or conversion factor must be used.

OPERATION – MEASURING TEMPERATURE

The DS1820 measures temperature through the use of

an on–board proprietary temperature measurement

technique. A block diagram of the temperature mea-

surement circuitry is shown in Figure 4.

The DS1820 measures temperature by counting the

number of clock cycles that an oscillator with a low tem-

perature coefficient goes through during a gate period

determined by a high temperature coefficient oscillator.

The counter is preset with a base count that corre-

sponds to –55°C. If the counter reaches zero before the

gate period is over, the temperature register, which is

also preset to the –55°C value, is incremented, indicat-

ing that the temperature is higher than –55°C.

Note that temperature is represented in the DS1820 in

1

terms of a / °C LSB, yielding thefollowing9–bitformat:

2

MSB

1

LSB

0

1

0

1

=

–25°C

The most significant (sign) bit is duplicated into all of the

bits in the upper MSB of the two–byte temperature reg-

ister in memory. This “sign–extension” yields the 16–bit

temperature readings as shown in Table 1.

At the same time, the counter is then preset with a value

determined by the slope accumulator circuitry. This cir-

cuitry is needed to compensate for the parabolic behav-

ior of the oscillators over temperature. The counter is

then clocked again until it reaches zero. If the gate

period is still not finished, then this process repeats.

Higher resolutions may be obtained by the following

procedure. First, read the temperature, and truncate

the0.5°C bit (the LSB) from the read value. This value is

TEMP_READ. The value left in the counter may then be

read. This value is the count remaining

(COUNT_REMAIN) after the gate period has ceased.

The last value needed is the number of counts per

degree C (COUNT_PER_C) at that temperature. The

actual temperature may be then be calculated by the

user using the following:

The slope accumulator is used to compensate for the

non–linearbehavior of the oscillators over temperature,

yielding a high resolution temperature measurement.

This is done by changing the number of counts neces-

sary for the counter to go through for each incremental

degreein temperature. To obtain the desired resolution,

therefore, both the value of the counter and the number

of counts per degree C (the value of the slope accumu-

lator) at a given temperature must be known.

(COUNT_PER_C – COUNT_REMAIN)

)

TEMPERATURE = TEMP_READ – 0.25

COUNT_PER_C

Internally, this calculation is done inside the DS1820 to

provide 0.5°C resolution. The temperature reading is

030598 4/27

DS1820

TEMPERATURE MEASURING CIRCUITRY Figure 4

SLOPE ACCUMULATOR

PRESET

COMPARE

SET/CLEAR

LSB

PRESET

LOW TEMPERATURE

COUNTER

COEFFICIENT OSCILLATOR

INC

=0

TEMPERATURE REGISTER

HIGH TEMPERATURE

COUNTER

COEFFICIENT OSCILLATOR

STOP

=0

TEMPERATURE/DATA RELATIONSHIPS Table 1

DIGITAL OUTPUT

(Hex)

TEMPERATURE

(Binary)

+125°C

00000000 11111010

00000000 00110010

00000000 00000001

00000000 00000000

11111111 11111111

11111111 11001110

11111111 10010010

00FA

0032h

0001h

0000h

FFFFh

FFCEh

FF92h

+25°C

1

+

°C

/2

+0°C

1

– / °C

2

–25°C

–55°C

This flag is updated with every temperature measure-

ment. As long as the alarm flag is set, the DS1820 will

respond to the alarm search command. This allows

many DS1820s to be connected in parallel doing simul-

taneoustemperaturemeasurements. Ifsomewherethe

temperature exceeds the limits, the alarming device(s)

canbeidentifiedandreadimmediatelywithouthavingto

read non–alarming devices.

OPERATION – ALARM SIGNALING

After the DS1820 has performed a temperature conver-

sion, the temperature value is compared to the trigger

values stored in TH and TL. Since these registers are

8–bit only, the 0.5°C bit is ignored for comparison. The

most significant bit of TH or TL directly corresponds to

the sign bit of the 16–bit temperature register. If the

result of a temperature measurement is higher than TH

or lower than TL, an alarm flag inside the device is set.

030598 5/27

DS1820

videsthisvaluetothebusmastertovalidatethetransfer

ofdatabytes. IneachcasewhereaCRCisusedfordata

transfer validation, the bus master must calculate a

CRC value using the polynomial function given above

and compare the calculated value to either the 8–bit

CRC value stored in the 64–bit ROM portion of the

DS1820 (for ROM reads) or the 8–bit CRC value com-

puted within the DS1820 (which is read as a ninth byte

when the scratchpad is read). The comparison of CRC

values and decision to continue with an operation are

determined entirely by the bus master. There is no cir-

cuitry inside the DS1820 that prevents a command

sequencefromproceedingiftheCRCstoredinorcalcu-

lated by the DS1820 does not match the value gener-

ated by the bus master.

64–BIT LASERED ROM

Each DS1820 contains a unique ROM code that is

64–bits long. The first eight bits are a 1–Wire family

code (DS1820 code is 10h). The next 48 bits are a

unique serial number. The last eight bits are a CRC of

the first 56 bits. (See Figure 5.) The 64–bit ROM and

ROM Function Control section allow the DS1820 to

operateas a1–Wiredeviceandfollowthe1–Wireproto-

col detailed in the section “1–Wire Bus System”. The

functionsrequired to control sections of the DS1820 are

notaccessible until the ROM function protocol has been

satisfied. This protocol is described in the ROM function

protocol flowchart (Figure 6). The 1–Wire bus master

must first provide one of five ROM function commands:

1) Read ROM, 2) Match ROM, 3) Search ROM, 4) Skip

ROM, or 5) Alarm Search. After a ROM functions

sequence has been successfully executed, the func-

tions specific to the DS1820 are accessible and the bus

mastermaythenprovideandoneofthesixmemoryand

control function commands.

The 1–Wire CRC can be generated using a polynomial

generator consisting of a shift register and XOR gates

as shown in Figure 7. Additional information about the

Dallas 1–Wire Cyclic Redundancy Check is available in

Application Note 27 entitled “Understanding and Using

Cyclic Redundancy Checks with Dallas Semiconductor

Touch Memory Products”.

CRC GENERATION

TheDS1820 has an 8–bit CRC stored in the mostsignif-

icant byte of the 64–bit ROM. The bus master can com-

pute a CRC value from the first 56–bits of the 64–bit

ROM and compare it to the value stored within the

DS1820 to determine if the ROM data has been

received error–free by the bus master. The equivalent

polynomial function of this CRC is:

The shift register bits are initialized to zero. Then start-

ingwiththeleastsignificantbitofthefamilycode, onebit

at a time is shifted in. After the 8th bit of the family code

has been entered, then the serial number is entered.

After the 48th bit of the serial number has been entered,

the shift register contains the CRC value. Shifting in the

eight bits of CRC should return the shift register to all

zeros.

8

5

4

CRC = X + X + X + 1

The DS1820 also generates an 8–bit CRC value using

the same polynomial function shown above and pro-

64–BIT LASERED ROM Figure 5

8–BIT CRC CODE

48–BIT SERIAL NUMBER

LSB MSB

8–BIT FAMILY CODE (10h)

LSB MSB

MSB

LSB

030598 6/27

DS1820

ROM FUNCTIONS FLOW CHART Figure 6

MASTER T

X

RESET PULSE

DS1820 T

X

PRESENCE

PULSE

MASTER T ROM

X

FUNCTION COMMAND

33h

READ ROM

COMMAND

55h

MATCH ROM

COMMAND

F0h

SEARCH ROM

COMMAND

CCh

SKIP ROM

COMMAND

N

ECh

N

ALARM SEARCH

COMMAND

Y

ALARM

CONDITION

?

N

DS1820 T FAMILY

X

MASTER T BIT 0

X

CODE

1 BYTE

Y

DS1820 T BIT 0

X

DS1820 T BIT 0

X

MASTER T BIT 0

X

N

DS1820 T

X

SERIAL NUMBER

6 BYTES

BIT 0

MATCH?

BIT 0

MATCH?

Y

DS1820 T BIT 1

X

DS1820 T

X

CRC BYTE

DS1820 T BIT 1

X

MASTER T BIT 1

X

MASTER T BIT 1

X

N

BIT 1

MATCH?

Y

DS1820 T BIT 63

X

MASTER T BIT 63

X

DS1820 T BIT 63

X

MASTER T BIT 63

X

N

BIT 63

MATCH?

Y

MASTER T MEMORY OR CONTROL

X

FUNCTION COMMAND

030598 7/27

DS1820

1–WIRE CRC CODE Figure 7

INPUT

XOR

(MSB)

(LSB)

information. The third and fourth bytes are volatile

copies of TH and TL and are refreshed with every pow-

er–on reset. The next two bytes are not used; upon

reading back, however, they will appear as all logic 1’s.

Theseventhandeighthbytesarecountregisters, which

may be used in obtaining higher temperature resolution

(see “Operation–measuring Temperature” section).

MEMORY

The DS1820’s memory is organized as shown in

Figure 8. The memory consists of a scratchpad RAM

anda nonvolatile, electrically erasable (E ) RAM, which

stores the high and low temperature triggers TH and TL.

The scratchpad helps insure data integrity when com-

municating over the 1–Wire bus. Data is first written to

the scratchpad where it can be read back. After the data

has been verified, a copy scratchpad command will

2

There is a ninth byte which may be read with a Read

Scratchpad command. This byte contains a cyclic

redundancycheck (CRC) byte which is the CRC over all

of the eight previous bytes. This CRC is implemented in

thefashiondescribedinthesectiontitled“CRCGenera-

tion”.

2

transfer the data to the nonvolatile (E ) RAM. This pro-

cess insures data integrity when modifying the memory.

The scratchpad is organized as eight bytes of memory.

The first two bytes contain the measured temperature

DS1820 MEMORY MAP Figure 8

2

E RAM

SCRATCHPAD

BYTE

TEMPERATURE LSB

TEMPERATURE MSB

TH/USER BYTE 1

TL/USER BYTE 2

RESERVED

0

1

2

3

4

5

6

7

TH/USER BYTE 1

TL/USER BYTE 2

RESERVED

COUNT REMAIN

COUNT PER °C

CRC

8

030598 8/27

DS1820

at the appropriate time. To facilitate this, each device

attached to the 1–Wire bus must have open drain or

3–state outputs. The 1–Wire port of the DS1820 (I/O

pin) is open drain with an internal circuit equivalent to

that shown in Figure 9. A multidrop bus consists of a

1–Wire bus with multiple slaves attached. The 1–Wire

bus requires a pullup resistor of approximately 5KΩ.

1–WIRE BUS SYSTEM

The1–Wirebusisasystemwhichhasasinglebusmas-

ter and one or more slaves. The DS1820 behaves as a

slave. The discussion of this bus system is broken down

into three topics: hardware configuration, transaction

sequence, and 1–Wire signaling (signal types and tim-

ing).

HARDWARE CONFIGURATION

The 1–Wire bus has only a single line by definition; it is

important that each device on the bus be able to drive it

HARDWARE CONFIGURATION Figure 9

+5V

BUS MASTER

4.7K

DS1820 1–WIRE PORT

R

X

R

X

5 µA

Typ.

T

X

1OO OHM

MOSFET

T

X

R

T

= RECEIVE

= TRANSMIT

X

Theidlestateforthe1–Wirebusishigh.Ifforanyreason

a transaction needs to be suspended, the bus MUST be

leftintheidlestateifthetransactionistoresume. Infinite

recovery time can occur between bits so long as the

1–Wire bus is in the inactive (high) state during the re-

covery period. If this does not occur and the bus is left

low for more than 480 µs, all components on the bus will

be reset.

INITIALIZATION

All transactions on the 1–Wire bus begin with an initial-

ization sequence. The initialization sequence consists

of a reset pulse transmitted by the bus master followed

by presence pulse(s) transmitted by the slave(s).

The presence pulse lets the bus master know that the

DS1820 is on the bus and is ready to operate. For more

details, see the “1–Wire Signaling” section.

TRANSACTION SEQUENCE

The protocol for accessing the DS1820 via the 1–Wire

port is as follows:

ROM FUNCTION COMMANDS

Once the bus master has detected a presence, it can

issue one of the five ROM function commands. All ROM

function commands are 8–bits long. A list of these com-

mands follows (refer to flowchart in Figure 6):

• Initialization

• ROM Function Command

• Memory Function Command

• Transaction/Data

030598 9/27

DS1820

conversion should be done to validate any alarm condi-

tions.

Read ROM [33h]

This command allows the bus master to read the

DS1820’s 8–bit family code, unique 48–bit serial num-

ber, and 8–bit CRC. This command can only be used if

there is a single DS1820 on the bus. If more than one

slave is present on the bus, a data collision will occur

when all slaves try to transmit at the same time (open

drain will produce a wired AND result).

Example of a ROM Search

The ROM search process is the repetition of a simple

3–step routine: read a bit, read the complement of the

bit, then write the desired value of that bit. The bus mas-

ter performs this simple, 3–step routine on each bit of

the ROM. After one complete pass, the bus master

knows the contents of the ROM in one device. The

remainingnumber of devices and their ROM codes may

be identified by additional passes.

Match ROM [55h]

The match ROM command, followed by a 64–bit ROM

sequence, allows the bus master to address a specific

DS1820 on a multidrop bus. Only the DS1820 that

exactly matches the 64–bit ROM sequence will respond

to the following memory function command. All slaves

that do not match the 64–bit ROM sequence will wait for

a reset pulse. This command can be used with a single

or multiple devices on the bus.

The following example of the ROM search process

assumes four different devices are connected to the

same 1–Wire bus. The ROM data of the four devices is

as shown:

ROM1

ROM2

ROM3

ROM4

00110101...

10101010...

11110101...

00010001...

Skip ROM [CCh]

This command can save time in a single drop bus sys-

tem by allowing the bus master to access the memory

functions without providing the 64–bit ROM code. If

more than one slave is present on the bus and a read

command is issued following the Skip ROM command,

data collision will occur on the bus as multiple slaves

transmit simultaneously (open drain pulldowns will pro-

duce a wired AND result).

The search process is as follows:

1. Thebusmasterbeginstheinitializationsequenceby

issuing a reset pulse. The slave devices respond by

issuing simultaneous presence pulses.

2. The bus master will then issue the Search ROM

command on the 1–Wire bus.

3. The bus master reads a bit from the 1–Wire bus.

Each device will respond by placing the value of the

first bit of their respective ROM data onto the 1–Wire

bus. ROM1 and ROM4 will place a 0 onto the

1–Wire bus, i.e., pull it low. ROM2 and ROM3 will

place a 1 onto the 1–Wire bus by allowing the line to

stay high. The result is the logical AND of all devices

on the line, therefore the bus master sees a 0. The

bus master reads another bit. Since the Search

ROM data command is being executed, all of the

devices on the 1–Wire bus respond to this second

readbyplacingthecomplementofthefirstbitoftheir

respective ROM data onto the 1–Wire bus. ROM1

and ROM4 will place a 1 onto the 1–Wire, allowing

the line to stay high. ROM2 and ROM3 will place a

0 onto the 1–Wire, thus it will be pulled low. The bus

masteragainobservesa0forthecomplementofthe

first ROM data bit. The bus master has determined

that there are some devices on the 1–Wire bus that

have a 0 in the first position and others that have a 1.

Search ROM [F0h]

When a system is initially brought up, the bus master

might not know the number of devices on the 1–Wire

bus or their 64–bit ROM codes. The search ROM com-

mandallows the bus master to use a process ofelimina-

tiontoidentifythe64–bitROMcodesofallslavedevices

on the bus.

Alarm Search [ECh]

The flowchart of this command is identical to the Search

ROM command. However, the DS1820 will respond to

this command only if an alarm condition has been

encountered at the last temperature measurement. An

alarm condition is defined as a temperature higher than

THorlowerthanTL. Thealarmconditionremainssetas

long as the DS1820 is powered up, or until another tem-

perature measurement reveals a non–alarming value.

For alarming, the trigger values stored in EEPROM are

taken into account. If an alarm condition exists and the

TH or TL settings are changed, another temperature

030598 10/27

DS1820

The data obtained from the two reads of the 3–step

routine have the following interpretations:

15.The bus master executes two read time slots and

receives two zeros.

16.The bus master writes a 0–bit. This decouples

ROM3, and leaving only ROM2.

00 There are still devices attached which have

conflicting bits in this position.

17.ThebusmasterreadstheremainderoftheROMbits

for ROM2 and communicates to the underlying logic

if desired. This completes the third ROM search

pass, in which another of the ROMs was found.

01 All devices still coupled have a 0–bit in this

bit position.

10 All devices still coupled have a 1–bit in this

bit position.

18.Thebus master starts a new ROM search by repeat-

ing steps 13 through 15.

11 Therearenodevicesattachedtothe1–Wire

bus.

19.The bus master writes a 1–bit. This decouples

ROM2, leaving only ROM3.

4. The bus master writes a 0. This deselects ROM2

and ROM3 for the remainder of this search pass,

leaving only ROM1 and ROM4 connected to the

1–Wire bus.

20.ThebusmasterreadstheremainderoftheROMbits

for ROM3 and communicates to the underlying logic

if desired. This completes the fourth ROM search

pass, in which another of the ROMs was found.

5. The bus master performs two more reads and

receives a 0–bit followed by a 1–bit. This indicates

that all devices still coupled to the bus have 0’s as

their second ROM data bit.

Note the following:

ThebusmasterlearnstheuniqueIDnumber(ROMdata

pattern) of one 1–Wire device on each ROM Search

operation. The time required to derive the part’s unique

ROM code is:

6. The bus master then writes a 0 to keep both ROM1

and ROM4 coupled.

7. The bus master executes two reads and receives

two 0–bits. This indicates that both 1–bits and 0–bits

exist as the third bit of the ROM data of the attached

devices.

960 µs + (8 + 3 x 64) 61 µs = 13.16 ms

Thebusmasteristhereforecapableofidentifying75dif-

ferent 1–Wire devices per second.

8. Thebusmasterwritesa0–bit. ThisdeselectsROM1

leaving ROM4 as the only device still connected.

9. ThebusmasterreadstheremainderoftheROMbits

for ROM4 and continues to access the part if

desired. This completes the first pass and uniquely

identifies one part on the 1–Wire bus.

I/O SIGNALING

The DS1820 requires strict protocols to insure data

integrity. The protocol consists of several types of

signaling on one line: reset pulse, presence pulse, write

0, write 1, read 0, and read 1. All of these signals, with

the exception of the presence pulse, are initiated by the

bus master.

10.The bus master starts a new ROM search sequence

by repeating steps 1 through 7.

11. The bus master writes a 1–bit. This decouples

ROM4, leaving only ROM1 still coupled.

The initialization sequence required to begin any com-

munication with the DS1820 is shown in Figure 11. A

reset pulse followed by a presence pulse indicates the

DS1820 is ready to send or receive data given the cor-

rect ROM command and memory function command.

12.ThebusmasterreadstheremainderoftheROMbits

for ROM1 and communicates to the underlying logic

if desired. This completes the second ROM search

pass, in which another of the ROMs was found.

13.Thebus master starts a new ROM search by repeat-

ing steps 1 through 3.

The bus master transmits (TX) a reset pulse (a low sig-

nal for a minimum of 480 µs). The bus master then

releases the line and goes into a receive mode (RX).

The 1–Wire bus is pulled to a high state via the 5K

pull–up resistor . After detecting the rising edge on the

14.The bus master writes a 1–bit. This deselects

ROM1 and ROM4 for the remainder of this search

pass, leaving only ROM2 and ROM3 coupled to the

system.

030598 11/27

DS1820

I/O pin, the DS1820 waits 15–60 µs and then transmits

the presence pulse (a low signal for 60–240 µs).

Write Scratchpad [4Eh]

This command writes to the scratchpad of the DS1820,

starting at address 2. The next two bytes written will be

saved in scratchpad memory, at address locations 2

and 3. Writing may be terminated at any point by issuing

a reset.

MEMORY COMMAND FUNCTIONS

The following command protocols are summarized in

Table 2, and by the flowchart of Figure 10.

030598 12/27

DS1820

MEMORY FUNCTIONS FLOW CHART Figure 10

MASTER T MEMORY

X

OR CONTROL COMMAND

4Eh

WRITE

SCRATCHPAD

?

BEh

READ

SCRATCHPAD

?

N

Y

DS1820 SETS ADDRESS

COUNTER TO 2

DS1820 SETS ADDRESS

COUNTER TO 0

MASTER T DATA BYTE

X

TO SCRATCHPAD

MASTER R DATA

X

FROM SCRATCHPAD

Y

MASTER

T

RESET

?

T

RESET

?

X

N

ADDRESS

=3

?

=7

?

N

DS1820 INCREMENTS

ADDRESS

DS1820 INCREMENTS

ADDRESS

MASTER R 8–BIT

X

CRC OF DATA

N

MASTER

T

RESET

?

X

Y

MASTER

T

RESET

?

X

N

MASTER R “1s”

X

DS1820 T

X

PRESENCE PULSE

030598 13/27

DS1820

MEMORY FUNCTIONS FLOW CHART Figure 10 (cont’d)

48h

COPY

44h

CONVERT

N

SCRATCHPAD

?

TEMPERATURE

?

Y

N

Y

N

Y

PARASITE

POWER

?

PARASITE

POWER

?

MASTER ENABLES

STRONG PULL–UP

MASTER ENABLES

STRONG PULLUP FOR

10 ms

DS1820 CONVERTS

TEMPERATURE

MASTER DISABLES

STRONG PULLUP

MASTER DISABLES

STRONG PULL–UP

DS1820 BEGINS

CONVERSION

Y

MASTER T

RESET

?

MASTER T

RESET

?

X

N

DEVICE BUSY

CONVERTING

TEMPERATURE

?

NONVOLATILE

MEMORY

BUSY

N

Y

N

Y

?

MASTER

“1”s

MASTER

“1”s

MASTER

“0”s

R

“0”s

R

X

030598 14/27

DS1820

MEMORY FUNCTIONS FLOW CHART Figure 10 (cont’d)

B8h

B4h

READ

POWER SUPPLY

?

N

RECALL

2

E

?

Y

DS1820 RECALLS

2

FROM E PROM

Y

MASTER

T

RESET

?

T

RESET

?

X

N

PARASITE

POWERED

?

MASTER

N

Y

DEVICE

BUSY CONVERTING

TEMPERATURE

?

N

Y

T

RESET

?

X

Y

MASTER

“0”s

R

“1”s

R

X

MASTER

“0”s

R

“1”s

R

X

030598 15/27

DS1820

INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 11

Master T “reset pulse”

X

480 µs minimum

960 µs maximum

Master R

480 µs minimum

X

DS1820

waits

15 - 60 µs

DS1820 T

“presence pulse”

60 - 240 µs

X

V

CC

1–WIRE

BUS

GND

LINE TYPE LEGEND:

Bus master active low

DS1820 active low

Both bus master and

DS1820 active low

Resistor pull–up

DS1820 COMMAND SET Table 2

1–WIRE BUS

AFTER ISSUING

PROTOCOL

INSTRUCTION

DESCRIPTION

PROTOCOL

NOTES

TEMPERATURE CONVERSION COMMANDS

Convert T

Initiates temperature conversion.

44h

<read temperature

busy status>

1

MEMORY COMMANDS

Read Scratchpad

Write Scratchpad

Reads bytes from scratchpad and

reads CRC byte.

BEh

<read data up to 9

bytes>

Writes bytes into scratchpad at

addresses 2 and 3 (TH and TL

temperature triggers).

4Eh

<write data into 2

bytes at addr. 2 and

addr. 3>

Copy Scratchpad

Copies scratchpad into nonvolatile

memory (addresses 2 and 3 only).

48h

B8h

2

Recall E

Recalls values stored in nonvolatile

memory into scratchpad (tempera-

ture triggers).

<read temperature

busy status>

Read Power Supply

Signals the mode of DS1820

power supply to the master.

B4h

NOTES:

1. Temperature conversion takes up to 500 ms. After receiving the Convert T protocol, if the part does not

receive power from the V pin, the I/O line for the DS1820 must be held high for at least 500 ms to provide

DD

power during the conversion process. As such, no other activity may take place on the 1–Wire bus for at least

this period after a Convert T command has been issued.

2. After receiving the Copy Scratchpad protocol, if the part does not receive power from the V pin, the I/O line

DD

for the DS1820 must be held high for at least 10 ms to provide power during the copy process. As such, no

other activity may take place on the 1–Wire bus for at least this period after a Copy Scratchpad command has

been issued.

030598 16/27

DS1820

Read Scratchpad [BEh]

READ/WRITE TIME SLOTS

This command reads the contents of the scratchpad.

Reading will commence at byte 0, and will continue

through the scratchpad until the 9th (byte–8, CRC) byte

isread. Ifnotalllocationsaretoberead, themastermay

issue a reset to terminate reading at any time.

DS1820 data is read and written through the use of time

slots to manipulate bits and a command word to specify

the transaction.

Write Time Slots

A write time slot is initiated when the host pulls the data

line from a high logic level to a low logic level. There are

two types of write time slots: Write One time slots and

Write Zero time slots. All write time slots must be a mini-

mum of 60 µs in duration with a minimum of a one µs

recovery time between individual write cycles.

Copy Scratchpad [48h]

2

This command copies the scratchpad into the E

memory of the DS1820, storing the temperature trigger

bytes in nonvolatile memory. If the bus master issues

read time slots following this command, the DS1820 will

output “0” on the bus as long as it is busy copying the

2

TheDS1820 samples the I/O line in a window of 15µs to

60µsaftertheI/Olinefalls. Ifthelineishigh, aWriteOne

occurs. If the line is low, a Write Zero occurs (see

Figure 12).

scratchpad to E ; it will return a “1” when the copy pro-

cess is complete. If parasite powered, the bus master

hastoenableastrongpull–upforatleast10msimmedi-

ately after issuing this command.

For the host to generate a Write One time slot, the data

linemustbepulledtoalogiclowlevelandthenreleased,

allowing the data line to pull up to a high level within

15 µs after the start of the write time slot.

Convert T [44h]

This command begins a temperature conversion. No

furtherdataisrequired.Thetemperatureconversionwill

be performed and then the DS1820 will remain idle. If

thebusmasterissuesreadtimeslotsfollowingthiscom-

mand, the DS1820 will output “0” on the bus as long as it

is busy making a temperature conversion; it will return a

“1”whenthetemperatureconversioniscomplete. Ifpar-

asite powered, the bus master has to enable a strong

pullup for 500 ms immediately after issuing this com-

mand.

For the host to generate a Write Zero time slot, the data

linemustbepulledtoalogiclowlevelandremainlowfor

60 µs.

Read Time Slots

The host generates read time slots when data is to be

read from the DS1820. A read time slot is initiated when

the host pulls the data line from a logic high level to logic

low level. The data line must remain at a low logic level

foraminimumofoneµs;outputdatafromtheDS1820is

valid for 15 µs after the falling edge of the read time slot.

The host therefore must stop driving the I/O pin low in

ordertoreaditsstate15 µsfromthestartofthereadslot

(see Figure 12). By the end of the read time slot, the I/O

pinwillpullbackhighviatheexternalpull–upresistor.All

read time slots must be a minimum of 60 µs in duration

with a minimum of a one µs recovery time between indi-

vidual read slots.

Recall E2 [B8h]

This command recalls the temperature trigger values

2

storedinE tothescratchpad.Thisrecalloperationhap-

pens automatically upon power–up to the DS1820 as

well, so valid data is available in the scratchpad as soon

as the device has power applied. With every read data

time slot issued after this command has been sent, the

device will output its temperature converter busy flag

“0”=busy, “1”=ready.

Read Power Supply [B4h]

With every read data time slot issued after this com-

mand has been sent to the DS1820, the device will sig-

nal its power mode: “0”=parasite power, “1”=external

power supply provided.

Figure 13 shows that the sum of T , T , and

INIT

RC

T

must be less than 15 µs. Figure 14 shows that

SAMPLE

system timing margin is maximized by keeping T

INIT

andT as small as possibleandbylocatingthemaster

RC

sample time towards the end of the 15 µs period.

030598 17/27

DS1820

READ/WRITE TIMING DIAGRAM Figure 12

MASTER WRITE “0” SLOT

MASTER WRITE “1” SLOT

1 µs< t

<∞

REC

60 µs<T “0”<120 µs

X

V

CC

1–WIRE

BUS

GND

>1 µs

DS1820 SAMPLES

TYP

DS1820 SAMPLES

TYP

MIN

MAX

MIN

MAX

15 µs

30 µs

15 µs

30 µs

1 µs< t

<∞

REC

MASTER READ “0” SLOT

MASTER READ “1” SLOT

V

CC

1–WIRE

BUS

GND

>1 µs

MASTER SAMPLES

15 µs

30 µs

15 µs

LINE TYPE LEGEND:

Bus master active low

DS1820 active low

Both bus master and

DS1820 active low

Resistor pull–up

030598 18/27

DS1820

DETAILED MASTER READ “1” TIMING Figure 13

V

CC

V

OF MASTER

IH

1–WIRE

BUS

GND

T

>1 µS

T

RC

INIT

MASTER SAMPLES

15 µs

RECOMMENDED MASTER READ “1” TIMING Figure 14

V

CC

V

OF MASTER

IH

1–WIRE

BUS

GND

MASTER

SAMPLES

T

=

T

=

RC

INIT

SMALL

15 µs

LINE TYPE LEGEND:

Bus master active low

DS1820 active low

Both bus master and

DS1820 active low

Resistor pull–up

030598 19/27

DS1820

Semiconductor “Application Note Book”, via our web-

site at http://www.dalsemi.com/, or through our faxback

service at (214) 450–0441.

Related Application Notes

The following Application Notes can be applied to the

DS1820. These notes can be obtained from the Dallas

Application Note 27: “Understanding and Using Cyclic Redundancy Checks with Dallas Semiconductor Touch

Memory Product”

Application Note 55: “Extending the Contact Range of Touch Memories”

Application Note 74: “Reading and Writing Touch Memories via Serial Interfaces”

Application Note 104: “Minimalist Temperature Control Demo”

Application Note 105: “High Resolution Temperature Measurement with Dallas Direct–to–Direct Temperature Sen-

sors”

Application Note 106: “Complex MicroLANs”

Application Note 108: “MicroLAN – In the Long Run”

Sample 1–Wire subroutines that can be used in conjunction with AN74 can be downloaded from the website or our

Anonymous FTP Site.

030598 20/27

DS1820

MEMORY FUNCTION EXAMPLE Table 3

Example: Bus Master initiates temperature conversion, then reads temperature (parasite power assumed).

MASTER MODE

DATA (LSB FIRST)

Reset

COMMENTS

Reset pulse (480–960 µs).

TX

RX

TX

Presence

Presence pulse.

55h

Issue “Match ROM” command.

Issue address for DS1820.

Issue “Convert T” command.

<64–bit ROM code>

44h

I/O line is held high for at least 500 ms by bus master to

allow conversion to complete.

TX

RX

TX

RX

Reset

Presence

Reset pulse.

Presence pulse.

55h

Issue “Match ROM” command.

Issue address for DS1820.

Issue “Read Scratchpad” command.

<64–bit ROM code>

BEh

<9 data bytes>

Read entire scratchpad plus CRC; the master now recal-

culates the CRC of the eight data bytes received from the

scratchpad, compares the CRC calculated and the CRC

read. If they match, the master continues; if not, this read

operation is repeated.

TX

RX

Reset

Reset Pulse.

Presence

Presence pulse, done.

030598 21/27

DS1820

MEMORY FUNCTION EXAMPLE Table 4

Example: Bus Master writes memory (parasite power and only one DS1820 assumed).

MASTER MODE

DATA (LSB FIRST)

Reset

COMMENTS

TX

RX

TX

RX

TX

RX

Reset pulse.

Presence

CCh

Presence pulse.

Skip ROM command.

4Eh

Write Scratchpad command.

Writes two bytes to scratchpad (TH and TL).

Reset pulse.

<2 data bytes>

Reset

Presence

CCh

Presence pulse.

Skip ROM command.

BEh

Read Scratchpad command.

<9 data bytes>

Read entire scratchpad plus CRC. The master now recal-

culates the CRC of the eight data bytes received from the

scratchpad, compares the CRC and the two other bytes

read back from the scratchpad. If data match, the master

continues; if not, repeat the sequence.

TX

RX

TX

Reset

Presence

CCh

Reset pulse.

Presence pulse.

Skip ROM command.

48h

Copy Scratchpad command; after issuing this command,

the master must wait 6 ms for copy operation to complete.

TX

RX

Reset

Reset pulse.

Presence

Presence pulse, done.

030598 22/27

DS1820

MEMORY FUNCTION EXAMPLE Table 5

Example: Temperature conversion and interpolation (external power supply and only one DS1820 assumed).

MASTER MODE

DATA (LSB FIRST)

Reset

COMMENTS

TX

TR

TX

RX

Reset pulse.

Presence

CCh

Presence pulse.

Skip ROM command.

Convert T command.

44h

<1 data byte>

Read busy flag eight times. The master continues reading

one byte (or bit) after another until the data is FFh (all

bits 1).

TX

RX

TX

RX

Reset

Presence

CCh

Reset pulse.

Presence pulse.

Skip ROM command.

Read Scratchpad command.

BEh

<9 data bytes>

Read entire scratchpad plus CRC. The master now recal-

culates the CRC of the eight data bytes received from the

scratchpad and compares both CRCs. If the CRCs match,

the data is valid. The master saves the temperature value

and stores the contents of the count register and count

per °C register as COUNT_REMAIN and COUNT_PER_C,

respectively.

TX

RX

–

Reset

Presence

–

Reset pulse.

Presence pulse, done.

CPU calculates temperature as described in the data sheet

for higher resolution.

030598 23/27

DS1820

ABSOLUTE MAXIMUM RATINGS*

Voltage on Any Pin Relative to Ground

Operating Temperature

Storage Temperature

Soldering Temperature

–0.5V to +7.0V

–55°C to +125°C

260°C for 10 seconds

* This is a stress rating only and functional operation of the device at these or any other conditions above those

indicated in the operation sections of this specification is not implied. Exposure to absolute maximum rating

conditions for extended periods of time may affect reliability.

RECOMMENDED DC OPERATING CONDITIONS

PARAMETER

SYMBOL

CONDITION

I/O Functions

1

MIN

TYP

MAX

UNITS NOTES

Supply Voltage

V

DD

2.8

5.0

5.5

1, 2

± / °C Accurate

4.3

5.5

V

2

Temperature

Conversions

Data Pin

Logic 1

Logic 0

I/O

–0.5

2.0

+5.5

V

2

V

IH

V

+0.3

CC

2, 3

2, 4

V

IL

–0.3

+0.8

DC ELECTRICAL CHARACTERISTICS

(–55°C to +125°C; V_DD=3.6V to 5.5V)

PARAMETER

SYMBOL

CONDITION

MIN

TYP

MAX

UNITS NOTES

1

± /

2

°C

Thermometer Error

t

–0°C to +70°C

ERR

–55°C to 0°C

and +70°C to

+125°C

See Typical Curve

1, 9, 10

Input Logic High

Input Logic Low

Sink Current

V

2.2

5.5

V

2, 3

2, 4

2

IH

V

–0.3

–4.0

+0.8

IL

L

I

V =0.4V

I/O

mA

nA

Standby Current

Active Current

Input Load Current

I

Q

200

1

350

1.5

8

I

mA

µA

5, 6

7

DD

I

L

5

030598 24/27

DS1820

AC ELECTRICAL CHARACTERISTICS:

(–55°C to +125°C; V_DD=3.6V to 5.5V)

PARAMETER

SYMBOL

MIN

TYP

MAX

500

UNITS

ms

µs

NOTES

Temperature Conversion Time

Time Slot

t

200

CONV

t

60

1

120

SLOT

Recovery Time

t

µs

REC

LOW0

LOW1

Write 0 Low Time

Write 1 Low Time

Read Data Valid

Reset Time High

Reset Time Low

Presence Detect High

Presence Detect Low

Capacitance

r

60

1

120

15

µs

t

µs

t

15

µs

RDV

t

480

15

µs

RSTH

t

4800

60

µs

RSTL

t

µs

PDHIGH

t

60

240

25

µs

PDLOW

C

pF

IN/OUT

NOTES:

1. Temperature conversion will work with ±2°C accuracy down to V = 3.4 volts.

DD

2. All voltages are referenced to ground.

3. Logic one voltages are specified at a source current of 1 mA.

4. Logic zero voltages are specified at a sink current of 4 mA.

5. I specified with V at 5.0 volts.

DD

CC

2

6. Active current refers to either temperature conversion or writing to the E memory. Writing to E memory con-

sumes approximately 200 µA for up to 10 ms.

7. Input load is to ground.

8. Standby current specified up to 70°C. Standby current typically is 5 µA at 125°C.

9. See Typical Curve for specification limits outside the 0°C to 70°C range. Thermometer error reflects sensor accu-

racy as tested during calibration.

10.Typical accuracy curve valid for 4.3V ≤ V ≤ 5.5V.

DD

1–WIRE WRITE ONE TIME SLOT

t

SLOT

START OF NEXT CYCLE

t

REC

t

LOW1

030598 25/27

DS1820

1–WIRE WRITE ZERO TIME SLOT

START OF NEXT CYCLE

t

SLOT

t

REC

t

LOW0

1–WIRE READ ZERO TIME SLOT

t

START OF NEXT CYCLE

SLOT

t

REC

t

RDV

1–WIRE RESET PULSE

RESET PULSE FROM HOST

t

RSTH

RSTL

1–WIRE PRESENCE DETECT

PRESENCE DETECT

t

PDHIGH

t

PDLOW

030598 26/27

DS1820

TYPICAL PERFORMANCE CURVE

DS1820 DIGITAL TERMOMETER AND THERMOSTAT

TEMPERATURE READING ERROR

5

4

3

2

1

UPPER LIMIT

SPECIFICATION

–55

–35

–15

5

25

45

65

85

105

125

TYPICAL

ERROR

LOWER LIMIT

SPECIFICATION

–1

–2

–3

TEMPERATURE (deg. C)

030598 27/27

型号:	DS1820
是否Rohs认证：	不符合
生命周期：	Obsolete
Reach Compliance Code：	unknown
风险等级：	5.52
最大精度（摄氏度）：	2 Cel
外壳：	PLASTIC
JESD-609代码：	e0
安装特点：	THROUGH HOLE MOUNT
位数：	9
端子数量：	3
最大工作电流：	1 mA
最高工作温度：	125 °C
最低工作温度：	-55 °C
输出接口类型：	1-WIRE INTERFACE
封装主体材料：	PLASTIC/EPOXY
封装等效代码：	SIP3,.1,50
封装形状/形式：	ROUND
电源：	5 V
传感器/换能器类型：	TEMPERATURE SENSOR,SWITCH/DIGITAL OUTPUT,SERIAL
子类别：	Other Sensors
最大供电电压：	5.5 V
最小供电电压：	2.8 V
表面贴装：	NO
端子面层：	Tin/Lead (Sn/Pb)
端接类型：	SOLDER
Base Number Matches：	1

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