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EL5173ISZ 芯片概述 EL5173ISZ是一款广泛应用于高速信号处理和视频传输领域的运算放大器，其高带宽和快速的转换速度使其在图像处理、音频信号放大以及其他各种高频应用中具有无与伦比的性能。该芯片由美国的Elantec Semiconductor公司设计并生产，因其优良的性能和稳定性被广泛应用于多种电子产品。此芯片的设计目标是在保证高性能的同时提供显著的功耗优化，充分满足现代电子设备对低功耗和高效能的需求。 EL5173ISZ芯片的特定特点使其在高频应用中表现卓越，其工作频率可以达到数百兆赫兹，这对于高分辨率视频信号的处理尤为重要。此外，其宽工作电压范围和低失真特性使其能够广泛应用于仪器仪表、消费电子、汽车电子等领域。 EL5173ISZ详细参数 EL5173ISZ的技术参数主要包括以下几个方面： - 工作电压：通常从 3 V 到 12 V，这种灵活的电压范围使得该芯片可适配多...

产品型号EL5173ISZ的Datasheet PDF文件预览

EL5173, EL5373

Data Sheet

February 16, 2005

FN7312.4

450MHz Differential Twisted-Pair Drivers

Features

• Fully differential inputs and outputs

The EL5173 and EL5373 are single and triple high

bandwidth amplifiers with a fixed gain of 2. They are

primarily targeted for applications such as driving twisted-

pair lines in component video applications. The inputs can

be in either single-ended or differential form but the outputs

are always in differential form.

• Differential input range ±2.3V

• 450MHz 3dB bandwidth at fixed gain of 2

• 900V/µs slew rate (EL5173)

• 1100V/µs slew rate (EL5373)

The output common mode level for each channel is set by

the associated REF pin, which have a -3dB bandwidth of

over 190MHz. Generally, these pins are grounded but can

be tied to any voltage reference.

• Single 5V or dual ±5V supplies

• 40mA maximum output current

• Low power - 12mA per channel

• Pb-Free available (RoHS compliant)

All outputs are short circuit protected to withstand temporary

overload condition.

Applications

• Twisted-pair drivers

The EL5173 and EL5373 are specified for operation over the

full -40°C to +85°C temperature range.

• Differential line drivers

Ordering Information

• VGA over twisted-pairs

PART

TAPE&

REEL

PKG.

NUMBER

PACKAGE

8-Pin SO

DWG. #

• ADSL/HDSL drivers

EL5173IS

7”

13”

MDP0027

MDP0043

MDP0040

• Single ended to differential amplification

• Transmission of analog signals in a noisy environment

EL5173IS-T7

8-Pin SO

EL5173IS-T13

8-Pin SO

Pinouts

EL5173ISZ (Note)

EL5173ISZ-T7 (Note)

8-Pin SO (Pb-free)

EL5173

(8-PIN SO, MSOP)

TOP VIEW

EL5373

(24-PIN QSOP)

TOP VIEW

7”

13”

EL5173ISZ-T13 (Note) 8-Pin SO (Pb-free)

EL5173IY

8-Pin MSOP

IN+

OUT

VS-

INP1

INN1

REF1

24 OUT1

EL5173IY-T7

EL5173IY-T13

EL5173IYZ (Note)

7”

13”

23 OUT1B

22 NC

8-Pin MSOP

8-Pin MSOP (Pb-free)

IN-

VS+

EL5173IYZ-T7 (Note) 8-Pin MSOP (Pb-free)

EL5173IYZ-T13 (Note) 8-Pin MSOP (Pb-free)

7”

13”

REF

OUTB

21 VSP

20 VSN

19 NC

EL5373IU

24-Pin QSOP

INP2

INN2

REF2

EL5373IU-T7

EL5373IU-T13

EL5373IUZ (Note)

7”

13”

18 OUT2

17 OUT2B

16 NC

24-Pin QSOP

(Pb-free)

EL5373IUZ-T7 (Note)

EL5373IUZ-T13 (Note)

24-Pin QSOP

(Pb-free)

7”

MDP0040

INP3 10

INN3 11

REF3 12

15 OUT3

14 OUT3B

13 NC

24-Pin QSOP

(Pb-free)

13”

NOTE: Intersil Pb-free products employ special Pb-free material sets;

molding compounds/die attach materials and 100% matte tin plate

termination finish, which are RoHS compliant and compatible with

both SnPb and Pb-free soldering operations. Intersil Pb-free products

are MSL classified at Pb-free peak reflow temperatures that meet or

exceed the Pb-free requirements of IPC/JEDEC J STD-020.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

EL5173, EL5373

Absolute Maximum Ratings (T = 25°C)

Supply Voltage (V + to V -) . . . . . . . . . . . . . . . . . . . . . . . . . . 12.6V

Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C

Recommended Operating Temperature . . . . . . . . . .-40°C to +85°C

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves

Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60mA

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are

at the specified temperature and are pulsed tests, therefore: T = T = T

Electrical Specifications V + = +5V, V - = -5V, T = 25°C, V = 0V, R = 200Ω, C = 1pF, Unless Otherwise Specified

PARAMETER

DESCRIPTION

CONDITIONS

MIN

TYP

MAX

UNIT

AC PERFORMANCE

-3dB Bandwidth

±0.1dB Bandwidth

450

MHz

V/µs

Slew Rate - EL5173

Slew Rate - EL5373

Settling Time to 0.1%

Overshoot

= 2V , 20% to 80%

P-P

750

900

1100

OUT

= 2V , 20% to 80%

P-P

= 2V

STL

P-P

= 2V

ODP-P

Output Overdrive Recovery Time

OVR

BW (-3dB)

SR+

-3dB Bandwidth

Slew Rate - Rise

Slew Rate - Fall

A =1, C = 2.7pF

V LD

190

200

125

MHz

V/µs

nV/√Hz

dBc

REF

= 2V , 20% to 80%

P-P

OUT

SR-

= 2V , 20% to 80%

P-P

Input Voltage Noise

f = 10kHz

HD2

HD3

Second Harmonic Distortion

Third Harmonic Distortion

Differential Gain at 3.58MHz

Differential Phase at 3.58MHz

Channel Separation - for EL5373 only

= 2V , 5MHz

P-P

OUT

= 2V , 20MHz

P-P

= 2V , 5MHz

P-P

= 2V , 20MHz

P-P

= 300Ω, A = 2

0.05

0.08

dθ

= 300Ω, A = 2

at 1MHz

INPUT CHARACTERISTICS

Input Referred Offset Voltage

Input Bias Current (V , V

±3

-11

-13

2.3

1.99

150

±30

-5

µA

)

IN INB

EL5173

EL5373

-21

-5

INput Bias Current at REF

Gain Accuracy

REF

Gain

= ±1V

1.97

2.01

Differential Input Resistance

kΩ

Differential Input Capacitance

Differential Mode Input Range

DMIR

±2

±2.3

3.4

CMIR+

Common Mode Positive Input Range at

+, V

3.1

Common Mode Negative Input Range at

+, V

CMIR-

-4.5

3.7

-4.2

Reference Input - Positive

+ = V - = 0V

IN IN

3.3

REFIN

FN7312.4

February 16, 2005

EL5173, EL5373

Electrical Specifications V + = +5V, V - = -5V, T = 25°C, V = 0V, R = 200Ω, C = 1pF, Unless Otherwise Specified (Continued)

PARAMETER

DESCRIPTION

CONDITIONS

MIN

TYP

-3.3

MAX

UNIT

Reference Input - Negative

+ = V - = 0V

-3

REFIN

Output Offset Relative to V

-100

+100

REFOS

REF

Input Common Mode Rejection Ratio

OUTPUT CHARACTERISTICS

CMRR

= ±2.5V

Positive Output Voltage Swing

Negative Output Voltage Swing

Positive Output Voltage Swing

Negative Output Voltage Swing

Maximum Output Current

= 200Ω

3.3

3.7

3.67

-3.3

OUT

(EL5173)

-3

OUT

(EL5373)

-3.7

±55

±50

-3.4

(Max)

= 10Ω (EL5173)

= 10Ω (EL5373)

±45

±40

mΩ

OUT

Output Impedance

OUT

SUPPLY

Supply Operating Range

V + to V -

4.75

SUPPLY

Power Supply Current - Per Channel

µA

S(ON)

+ (EL5173) Positive Power Supply Current - Disabled EN pin tied to 4.8V

- (EL5173) Negative Power Supply Current - Disabled

100

-90

S(OFF)

-150

0.5

-150

-120

+ (EL5373) Positive Power Supply Current - Disabled EN pin tied to 4.8V

- (EL5373) Negative Power Supply Current - Disabled

-120

-90

PSRR

Power Supply Rejection Ratio

V from ±4.5V to ±5.5V

ENABLE

Enable Time

100

1.2

µs

Disable Time

EN Pin Voltage for Power-Up

V +

-1.5

EN Pin Voltage for Shut-Down

V +

-0.5

EN Pin Input Current High - Per Channel At V

= 5V

= 0V

µA

IH-EN

IL-EN

EN Pin Input Current Low - Per Channel

At V

-5

-2.5

Pin Descriptions

EL5173

EL5373

2, 6, 10

PIN NAME

PIN FUNCTION

IN+, INP1, 2, 3

Non-inverting inputs

ENABLE

3, 7, 11

IN-, INN1, 2, 3

REF1, 2, 3

Inverting inputs, note that on EL5173, this pin is also the REF pin

Reference inputs, sets common-mode output voltage

Inverting outputs

4, 8, 12

14, 17, 23

OUT-, OUT1B, 2B, 3B

VS+, VSP

Positive supply

VS-, VSN

Negative supply

15, 18, 24

5, 9, 13, 16, 19, 22

OUT+, OUT1, 2, 3

Non-inverting outputs

No connect; grounded for best crosstalk performance

FN7312.4

February 16, 2005

Connection Diagrams

EL5173

-5V

50Ω

RT2

LOADP

LOADN

IN+

INP

OUT 8

VS- 7

50Ω

IN-

INN

REF

VS+ 6

RT2

REF

OUTB 5

50Ω

+5V

50Ω

EL5373

+5V

RT1

ENABLE

LD1

OUT1 24

50Ω

RT1B

INP1

INN1

REF1

LD1B

INP1 OUT1B 23

50Ω

INN1

REF1

NC 22

VSP 21

VSN 20

NC 19

INP2

INN2

REF2

INP2

INN2

RT2

LD2

OUT2 18

50Ω

RT2B

LD2B

REF2 OUT2B 17

50Ω

NC 16

RT3

LD3

INP3

INN3

REF3

10 INP3

OUT3 15

50Ω

RT3B

LD3B

11 INN3 OUT3B 14

12 REF3 NC 13

SR3

50Ω

SP1

50Ω

SN1

50Ω

SR1

50Ω

SP2

50Ω

SN2

50Ω

SR2

50Ω

SP3

50Ω

SN3

50Ω

-5V

EL5173, EL5373

Typical Performance Curves

= ±5V, C = 1pF

= ±5V, R = 200Ω

= 1kΩ

= 500Ω

= 200mV

ODP-P

= 200Ω

= 100Ω

= 700mV

ODP-P

10M

100M

100K

10M

FREQUENCY (Hz)

100M

FREQUENCY (Hz)

FIGURE 2. FREQUENCY RESPONSE vs R

FIGURE 1. FREQUENCY RESPONSE

= ±5V, R = 200Ω, V

= 200mV

ODP-P

= 16pF

= 5pF

= 200mV

P-P

REF

-1

-2

-3

-4

-5

= 2.3pF

= 0pF

= 1V

P-P

REF

10M

100M

10M

100M

FREQUENCY (Hz)

FIGURE 4. FREQUENCY RESPONSE vs V

FIGURE 3. SMALL SIGNAL FREQUENCY RESPONSE vs C

REF

100Ω

INCM

ODM

100Ω

OCM

-10

-20

-10

-20

-30

PSRR-

OCM INCM

-40

-50

-40

-50

-60

PSRR+

-70

-80

-90

-70

-80

-90

ODM INCM

100K

10M

100M

100K

10M

100M

FREQUENCY (Hz)

FIGURE 6. COMMON MODE REJECTION vs FREQUENCY

FIGURE 5. PSRR vs FREQUENCY

FN7312.4

February 16, 2005

EL5173, EL5373

Typical Performance Curves (Continued)

100Ω

OCM

ODM

100Ω

1000

-10

-20

-30

100

-40

-50

-60

OCM ODM

100

10K

100K

10M

100K

10M

FREQUENCY (Hz)

100M

FREQENCY (Hz)

FIGURE 8. INPUT VOLTAGE NOISE vs FREQUENCY

FIGURE 7. DIFFERENTIAL MODE OUTPUT BALANCE

ERROR vs FREQUENCY

= 200mV, R = 200Ω

ODMP-P

460

440

420

-30

-40

-50

CH3-->CH2

CH2-->CH1

400

380

360

-60

-70

CH2-->CH3

-80

CH1-->CH2

-90

340

CH3-->CH1

-100

-110

CH1-->CH3

320

300

100K

10M

FREQUENCY (Hz)

100M

(V)

FIGURE 10. SMALL SIGNAL BANDWIDTH vs SUPPLY

VOLTAGE

FIGURE 9. CHANNEL SEPARATION vs FREQUENCY

= ±5V, R = 200Ω

-40

-45

-50

-55

11.9

11.8

HD3 (f=20MHz)

I +

HD3 (f=5MHz)

11.7

11.6

11.5

-60

-65

-70

-75

I -

HD2 (f=20MHz)

HD2 (f=5MHz)

-80

-85

-90

11.4

11.3

DIFFERENTIAL OUTPUT VOLTAGE (V)

(V)

FIGURE 12. HARMONIC DISTORTION vs DIFFERENTIAL

OUTPUT VOLTAGE

FIGURE 11. SUPPLY CURRENT vs SUPPLY VOLTAGE

FN7312.4

February 16, 2005

EL5173, EL5373

Typical Performance Curves (Continued)

= ±5V, V = 2V

ODMP-P

= ±5V, R = 200Ω, V

LD ODMP-P

= 2V

-40

-50

-60

-70

-80

-90

-40

-45

-50

-55

-60

-65

-70

-75

-80

-85

-90

HD3 (f = 20MHz)

HD2 (f = 20MHz)

HD2 (f = 5MHz)

-100

100 200 300 400 500 600 700 800 900 1000

FREQUENCY (MHz)

(Ω)

FIGURE 14. HARMONIC DISTORTION vs FREQUENCY

FIGURE 13. HARMONIC DISTORTION vs R

0.5V/DIV

100mV/DIV

20ns/DIV

FIGURE 16. LARGE SIGNAL TRANSIENT RESPONSE

FIGURE 15. SMALL SIGNAL TRANSIENT RESPONSE

0.5V/DIV

20ns/DIV

FIGURE 18. ENABLED RESPONSE

FIGURE 17. V

TRANSIENT RESPONSE

COM

FN7312.4

February 16, 2005

EL5173, EL5373

Typical Performance Curves (Continued)

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

1.2

870mW

0.8

0.6

QSOP24

625mW

=115°C/W

SO8

=160°C/W

0.4 486mW

0.2

MSOP8

=206°C/W

75 85 100

125

150

AMBIENT TEMPERATURE (°C)

FIGURE 19. DISABLED RESPONSE

FIGURE 20. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

1.4

1.2

1.136W

QSOP24

909mW

870mW

=88°C/W

0.8

0.6

0.4

0.2

SO8

=110°C/W

MSOP8/10

=115°C/W

75 85 100

125

150

AMBIENT TEMPERATURE (°C)

FIGURE 21. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE

FN7312.4

February 16, 2005

EL5173, EL5373

Simplified Schematic

200Ω

V +

IN+

IN-

FBP

FBN

OUT+

OUT-

REF

V -

200Ω

400Ω

Driving Capacitive Loads and Cables

Description of Operation and Application

Information

Product Description

The EL5173 and EL5373 are wide bandwidth, low power

and single/differential ended to differential output amplifiers.

They have a fixed gain of 2. The EL5173 is a single channel

differential amplifier. The EL5373 is a triple channel

differential amplifier. The EL5173 and EL5373 have a –3dB

bandwidth of 450MHz while driving a 200Ω differential load.

The EL5173 and EL5373 are available with a power down

feature to reduce the power while the amplifiers are

disabled.

The EL5173 and EL5373 can drive 16pF differential

capacitor in parallel with 200Ω differential load with less than

3.5dB of peaking. If less peaking is desired in applications, a

small series resistor (usually between 5Ω to 50Ω) can be

placed in series with each output to eliminate most peaking.

However, this will reduce the gain slightly.

When used as a cable driver, double termination is always

recommended for reflection-free performance. For those

applications, a back-termination series resistor at the

amplifier’s output will isolate the amplifier from the cable and

allow extensive capacitive drive. However, other applications

may have high capacitive loads without a back-termination

resistor. Again, a small series resistor at the output can help

to reduce peaking.

Input, Output and Supply Voltage Range

The EL5173 and EL5373 have been designed to operate

with a single supply voltage of 5V to 10V or a split supplies

with its total voltage from 5V to 10V. The amplifiers have an

input common mode voltage range from -4.5V to 3.4V for

±5V supply. The differential mode input range (DMIR)

between the two inputs is from –2.3V to +2.3V. The input

voltage range at the REF pin is from –3.3V to 3.7V. If the

input common mode or differential mode signal is outside the

above-specified ranges, it will cause the output signal

distorted.

Disable/Power-Down

The EL5173 and EL5373 can be disabled and placed their

outputs in a high impedance state. The turn off time is about

1.2µs and the turn on time is about 100ns. When disabled,

the amplifier’s supply current is reduced to 40µA for I + and

2.5µA for I - typically, thereby effectively eliminating the

power consumption. The amplifier’s power down can be

controlled by standard CMOS signal levels at the ENABLE

pin. The applied logic signal is relative to V + pin. Letting the

The output of the EL5173 and EL5373 can swing from –3.3V

to 3.6V at 200Ω differential load at ±5V supply. As the load

resistance becomes lower, the output swing is reduced.

EN pin float or applying a signal that is less than 1.5V below

V + will enable the amplifier. The amplifier will be disabled

when the signal at EN pin is above V + -0.5V.

Differential and Common Mode Gain Settings

Output Drive Capability

As shown at the simplified schematic, since the feedback

resistors RF and the gain resistor are integrated with 200Ω

and 400Ω, the EL5173 and EL5373 have a fixed gain of 2.

The common mode gain is always one.

The EL5173 and EL5373 have internal short circuit

protection. Its typical short circuit current is ±55mA. If the

output is shorted indefinitely, the power dissipation could

easily increase such that the part will be destroyed.

FN7312.4

February 16, 2005

EL5173, EL5373

Maximum reliability is maintained if the output current never

exceeds ±60mA. This limit is set by the design of the internal

metal interconnect.

Where:

• V = Total supply voltage

• I

= Maximum quiescent supply current per channel

SMAX

Power Dissipation

• ∆V = Maximum differential output voltage of the

With the high output drive capability of the EL5173 and

EL5373 it is possible to exceed the 125°C absolute

maximum junction temperature under certain load current

conditions. Therefore, it is important to calculate the

maximum junction temperature for the application to

determine if the load conditions or package types need to be

modified for the amplifier to remain in the safe operating

area.

application

• R = Differential load resistance

• I

= Load current

LOAD

• i = Number of channels

By setting the two PD_MAXequations equal to each other, we

can solve the output current and R_LOADto avoid the device

overheat.

The maximum power dissipation allowed in a package is

determined according to:

Power Supply Bypassing and Printed Circuit

Board Layout

– T

AMAX

JMAX

= --------------------------------------------

As with any high frequency device, a good printed circuit

board layout is necessary for optimum performance. Lead

lengths should be as sort as possible. The power supply pin

must be well bypassed to reduce the risk of oscillation. For

MAX

Where:

• T

normal single supply operation, where the V - pin is

= Maximum junction temperature

JMAX

connected to the ground plane, a single 4.7µF tantalum

• T

AMAX

= Maximum ambient temperature

capacitor in parallel with a 0.1µF ceramic capacitor from V +

• θ = Thermal resistance of the package

to GND will suffice. This same capacitor combination should

be placed at each supply pin to ground if split supplies are to

The maximum power dissipation actually produced by an IC

is the total quiescent supply current times the total power

supply voltage, plus the power in the IC due to the load, or:

be used. In this case, the V - pin becomes the negative

supply rail.

For good AC performance, parasitic capacitance should be

kept to minimum. Use of wire wound resistors should be

avoided because of their additional series inductance. Use

of sockets should also be avoided if possible. Sockets add

parasitic inductance and capacitance that can result in

compromised performance. Minimizing parasitic capacitance

at the amplifier’s inverting input pin is very important. The

feedback resistor should be placed very close to the

inverting input pin. Strip line design techniques are

recommended for the signal traces.

∆V









-----------

PD = i × V × I

+ V ×



SMAX



Typical Applications

Twisted pair cable driver

0Ω

50Ω

EL5173/

EL5373

EL5175/

EL5375

OUT

INB

= 100Ω

REF

FIGURE 22. TWISTED PAIR CABLE DRIVER

FN7312.4

February 16, 2005

EL5173, EL5373

SO Package Outline Drawing

FN7312.4

February 16, 2005

EL5173, EL5373

MSOP Package Outline Drawing

FN7312.4

February 16, 2005

EL5173, EL5373

QSOP Package Outline Drawing

NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at

http://www.intersil.com/design/packages/index.asp

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN7312.4

February 16, 2005

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深圳市中利达电子科技有限公司服务专线: 0755-83200645/13686833545 在线联系:

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柒号芯城电子商务（深圳）有限公司服务专线: 0755-83209937 在线联系:

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首天国际（深圳）科技有限公司服务专线: 0755-82807802/82807803 在线联系:

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深圳市芯福林电子有限公司服务专线: 13418564337 在线联系:

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EL5173ISZ产品参数

型号:	EL5173ISZ
Brand Name：	Intersil
是否Rohs认证：	符合
生命周期：	Obsolete
IHS 制造商：	INTERSIL CORP
零件包装代码：	SOIC
包装说明：	SOP, SOP8,.25
针数：	8
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	1 week
风险等级：	5.61
Is Samacsys：	N
差分输出：	YES
驱动器位数：	1
输入特性：	DIFFERENTIAL
接口集成电路类型：	LINE DRIVER
接口标准：	GENERAL PURPOSE
JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e3
长度：	4.9022 mm
湿度敏感等级：	3
标称负供电电压：	-5 V
功能数量：	1
端子数量：	8
最高工作温度：	85 °C
最低工作温度：	-40 °C
最小输出摆幅：	3.3 V
输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装等效代码：	SOP8,.25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260
电源：	+-5 V
认证状态：	Not Qualified
最大接收延迟：
座面最大高度：	1.7272 mm
子类别：	Line Driver or Receivers
最大供电电压：	5.5 V
最小供电电压：	2.375 V
标称供电电压：	5 V
表面贴装：	YES
技术：	BIPOLAR
温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn) - annealed
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	30
宽度：	3.9116 mm
Base Number Matches：	1

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