EL5411IREZ原理图各脚功能电路原理芯片引脚定义引脚图及功能-中国IC网-芯三七

EL5111, EL5211, EL5411

®

Data Sheet

October 29, 2004

FN7119.4

60MHz Rail-to-Rail Input-Output Op Amps

Features

• Pb-Free Available (RoHS Compliant)

The EL5111, EL5211, and EL5411 are low power, high

voltage rail-to-rail input-output amplifiers. The EL5111

represents a single amplifier, the EL5211 contains two

amplifiers, and the EL5411 contains four amplifiers.

Operating on supplies ranging from 5V to 15V, while

consuming only 2.5mA per amplifier, the EL5111, EL5211,

and EL5411 have a bandwidth of 60MHz (-3dB). They also

provide common mode input ability beyond the supply rails,

as well as rail-to-rail output capability. This enables these

amplifiers to offer maximum dynamic range at any supply

voltage.

• 60MHz -3dB bandwidth

• Supply voltage = 4.5V to 16.5V

• Low supply current (per amplifier) = 2.5mA

• High slew rate = 75V/µs

• Unity-gain stable

• Beyond the rails input capability

• Rail-to-rail output swing

• ±180mA output short current

The EL5111, EL5211, and EL5411 also feature fast slewing

and settling times, as well as a high output drive capability of

65mA (sink and source). These features make these

amplifiers ideal for high speed filtering and signal

conditioning application. Other applications include battery

power, portable devices, and anywhere low power

consumption is important.

Applications

• TFT-LCD panels

• V

COM

amplifiers

• Drivers for A-to-D converters

• Data acquisition

The EL5111 is available in 5-pin TSOT and 8-pin HMSOP

packages. The EL5211 is available in the 8-pin HMSOP

package. The EL5411 is available in space-saving 14-pin

HTSSOP packages. All feature a standard operational

amplifier pinout. These amplifiers operate over a temperature

range of -40°C to +85°C.

• Video processing

• Audio processing

• Active filters

• Test equipment

• Battery-powered applications

• Portable equipment

Pinouts

EL5111

(8-PIN HMSOP)

TOP VIEW

EL5111

EL5211

(8-PIN HMSOP)

TOP VIEW

EL5411

(5-PIN TSOT)

TOP VIEW

(14-PIN HTSSOP)

TOP VIEW

NC

VIN-

VIN+

VS-

1

2

3

4

8

7

6

5

NC

VOUT 1

5

4

VS+

VIN-

VOUTA

VINA-

VINA+

VS-

1

2

3

4

8

7

6

5

VS+

VOUTA 1

14 VOUTD

VS+

VOUT

NC

VS-

2

3

-

+

VOUTB

VINB-

VINB+

VINA-

VINA+

VS+

2

3

4

5

6

7

13 VIND-

12 VIND+

11 VS-

-

+

-

VIN+

-

+

VINB+

VINB-

VOUTB

10 VINC+

+

-

+

-

9

8

VINC-

VOUTC

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

1

EL5111, EL5211, EL5411

Ordering Information

TAPE &

REEL

PART NUMBER

EL5111IWT-T7

EL5111IWT-T7A

PACKAGE

5-Pin TSOT

PKG. DWG. #

MDP0049

7” (3K pcs)

7” (250 pcs)

7” (3K pcs)

EL5111IWTZ-T7

(Note)

5-Pin TSOT

(Pb-Free)

EL5111IWTZ-T7A

(Note)

5-Pin TSOT

(Pb-Free)

7” (250 pcs)

MDP0049

EL5111IYE

8-Pin HMSOP

-

7”

13”

-

MDP0050

EL5111IYE-T7

EL5111IYE-T13

EL5111IYEZ

(See Note)

8-Pin HMSOP

(Pb-free)

EL5111IYEZ-T7

(See Note)

8-Pin HMSOP

(Pb-free)

7”

MDP0050

EL5111IYEZ-T13

(See Note)

8-Pin HMSOP

(Pb-free)

13”

EL5211IYE

8-Pin HMSOP

-

7”

13”

-

MDP0050

EL5211IYE-T7

EL5211IYE-T13

EL5211IYEZ

(Note)

8-Pin HMSOP

(Pb-Free)

EL5211IYEZ-T7

(Note)

8-Pin HMSOP

(Pb-Free)

7”

13”

-

MDP0050

MDP0048

EL5211IYEZ-T13

(Note)

8-Pin HMSOP

(Pb-Free)

EL5411IRE

14-Pin

HTSSOP

EL5411IRE-T7

EL5411IRE-T13

14-Pin

HTSSOP

7”

13”

-

14-Pin

HTSSOP

EL5411IREZ

(Note)

14-Pin

HTSSOP

(Pb-Free)

EL5411IREZ-T7

(Note)

14-Pin

7”

MDP0048

HTSSOP

(Pb-Free)

EL5411IREZ-T13

(Note)

14-Pin

HTSSOP

(Pb-Free)

13”

NOTE: Intersil Pb-free products employ special Pb-free material sets;

molding compounds/die attach materials and 100% matte tin plate

termination finish, which are RoHS compliant and compatible with

both SnPb and Pb-free soldering operations. Intersil Pb-free products

are MSL classified at Pb-free peak reflow temperatures that meet or

exceed the Pb-free requirements of IPC/JEDEC J STD-020C.

FN7119.4

2

EL5111, EL5211, EL5411

Absolute Maximum Ratings (T = 25°C)

A

Supply Voltage between V + and V -. . . . . . . . . . . . . . . . . . . .+18V

Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves

S

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . V - - 0.5V, V +0.5V

S

Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 65mA

Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . .+125°C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are

at the specified temperature and are pulsed tests, therefore: T = T = T

A

J

C

Electrical Specifications V + = +5V, V - = -5V, R = 1kΩ to 0V, T = 25°C, Unless Otherwise Specified

S

L

A

PARAMETER

DESCRIPTION

CONDITIONS

MIN

TYP

MAX

15

UNIT

INPUT CHARACTERISTICS

V

Input Offset Voltage

V

= 0V

3

7

2

1

2

mV

µV/°C

nA

OS

TCV

CM

Average Offset Voltage Drift (Note 1)

Input Bias Current

OS

I

60

B

R

Input Impedance

GΩ

pF

IN

C

Input Capacitance

CMIR

Common-Mode Input Range

Common-Mode Rejection Ratio

Open-Loop Gain

-5.5

50

+5.5

V

CMRR

for V from -5.5V to 5.5V

IN

70

dB

A

-4.5V ≤ V

≤ 4.5V

OUT

62

dB

VOL

OUTPUT CHARACTERISTICS

V

Output Swing Low

Output Swing High

Short-Circuit Current

Output Current

I = -5mA

-4.92

4.92

±180

±65

-4.85

V

OL

L

I = 5mA

4.85

60

OH

L

I

mA

SC

OUT

POWER SUPPLY PERFORMANCE

PSRR Power Supply Rejection Ratio

Supply Current

V

is moved from ±2.25V to ±7.75V

80

2.5

5

dB

mA

S

I

No load (EL5111)

No load (EL5211)

No load (EL5411)

4.5

7.5

15

S

10

DYNAMIC PERFORMANCE

SR Slew Rate (Note 2)

-4.0V ≤ V

≤ 4.0V, 20% to 80%

75

80

V/µs

ns

OUT

(A = +1), V = 2V step

t

Settling to +0.1% (A = +1)

V

S

V

O

BW

-3dB Bandwidth

60

MHz

°

GBWP

PM

Gain-Bandwidth Product

Phase Margin

32

50

CS

Channel Separation

Differential Gain (Note 3)

Differential Phase (Note 3)

f = 5MHz (EL5211 & EL5411 only)

110

0.17

0.24

dB

%

d

R

= R = 1kΩ and V

= 1.4V

G

P

F

G

OUT

= R = 1kΩ and V

°

F

G

OUT

NOTES:

1. Measured over operating temperature range.

2. Slew rate is measured on rising and falling edges.

3. NTSC signal generator used.

FN7119.4

3

Electrical Specifications V + = +5V, V - = 0V, R = 1kΩ to 2.5V, T = 25°C, Unless Otherwise Specified

S

L

A

PARAMETER

DESCRIPTION

CONDITION

MIN

TYP

MAX

15

UNIT

INPUT CHARACTERISTICS

V

Input Offset Voltage

V

= 2.5V

3

7

2

1

2

mV

µV/°C

nA

OS

TCV

CM

Average Offset Voltage Drift (Note 4)

Input Bias Current

OS

I

60

B

R

Input Impedance

GΩ

pF

IN

C

Input Capacitance

CMIR

Common-Mode Input Range

Common-Mode Rejection Ratio

Open-Loop Gain

-0.5

45

+5.5

150

V

CMRR

for V from -0.5V to 5.5V

IN

66

70

dB

A

0.5V ≤ V

≤ 4.5V

OUT

62

dB

VOL

OUTPUT CHARACTERISTICS

V

Output Swing Low

Output Swing High

Short-circuit Current

Output Current

I = -5mA

80

mV

V

OL

L

I = 5mA

4.85

60

4.92

±180

±65

OH

L

I

mA

SC

OUT

POWER SUPPLY PERFORMANCE

PSRR Power Supply Rejection Ratio

Supply Current

V

is moved from 4.5V to 15.5V

80

2.5

5

dB

mA

S

I

No load (EL5111)

No load (EL5211)

No load (EL5411)

4.5

7.5

15

S

10

DYNAMIC PERFORMANCE

SR Slew Rate (Note 5)

1V ≤ V

≤ 4V, 20% to 80%

75

80

V/µs

ns

OUT

(A = +1), V = 2V step

t

Settling to +0.1% (A = +1)

V

S

V

O

BW

-3dB Bandwidth

60

MHz

°

GBWP

PM

Gain-Bandwidth Product

Phase Margin

32

50

CS

Channel Separation

Differential Gain (Note 6)

Differential Phase (Note 6)

f = 5MHz (EL5211 & EL5411 only)

110

0.17

0.24

dB

%

d

R

= R = 1kΩ and V

= 1.4V

G

P

F

G

OUT

= R = 1kΩ and V

°

G

OUT

NOTES:

4. Measured over operating temperature range.

5. Slew rate is measured on rising and falling edges.

6. NTSC signal generator used.

Electrical Specifications V + = +15V, V - = 0V, R = 1kΩ to 7.5V, T = 25°C, Unless Otherwise Specified

S

L

A

PARAMETER

DESCRIPTION

CONDITION

MIN

TYP

MAX

15

UNIT

INPUT CHARACTERISTICS

V

Input Offset Voltage

V

= 7.5V

3

7

2

1

mV

µV/°C

nA

OS

TCV

CM

Average Offset Voltage Drift (Note 7)

Input Bias Current

OS

I

V

60

B

R

Input Impedance

GΩ

IN

FN7119.4

4

Electrical Specifications V + = +15V, V - = 0V, R = 1kΩ to 7.5V, T = 25°C, Unless Otherwise Specified (Continued)

S

L

A

PARAMETER

DESCRIPTION

CONDITION

MIN

TYP

MAX

UNIT

pF

C

Input Capacitance

2

IN

CMIR

Common-Mode Input Range

Common-Mode Rejection Ratio

Open-Loop Gain

-0.5

53

+15.5

V

CMRR

for V from -0.5V to 15.5V

IN

72

70

dB

A

0.5V ≤ V

≤ 14.5V

OUT

62

VOL

OUTPUT CHARACTERISTICS

V

Output Swing Low

Output Swing High

Short-circuit Current

Output Current

I = -5mA

80

150

mV

V

OL

L

I = 5mA

14.85

60

14.92

±180

±65

OH

L

I

mA

SC

OUT

POWER SUPPLY PERFORMANCE

PSRR Power Supply Rejection Ratio

Supply Current

V

is moved from 4.5V to 15.5V

80

2.5

5

dB

mA

S

I

No load (EL5111)

No load (EL5211)

No load (EL5411)

4.5

7.5

15

S

10

DYNAMIC PERFORMANCE

SR Slew Rate (Note 8)

1V ≤ V

≤ 14V, 20% to 80%

75

80

V/µs

ns

OUT

(A = +1), V = 2V step

t

Settling to +0.1% (A = +1)

V

S

V

O

BW

-3dB Bandwidth

60

MHz

°

GBWP

PM

Gain-Bandwidth Product

Phase Margin

32

50

CS

Channel Separation

Differential Gain (Note 9)

Differential Phase (Note 9)

f = 5MHz (EL5211 & EL5411 only)

110

0.16

0.22

dB

%

d

R

= R = 1kΩ and V

= 1.4V

G

P

F

G

OUT

= R = 1kΩ and V

°

G

OUT

NOTES:

7. Measured over operating temperature range

8. Slew rate is measured on rising and falling edges

9. NTSC signal generator used

FN7119.4

5

Typical Performance Curves

500

25

20

15

10

5

V =±5V

TYPICAL

V =±5V

TYPICAL

S

T =25°C

PRODUCTION

DISTRIBUTION

PRODUCTION

DISTRIBUTION

A

400

300

200

100

0

INPUT OFFSET VOLTAGE (mV)

INPUT OFFSET VOLTAGE DRIFT, TCV

(µV/°C)

OS

FIGURE 1. INPUT OFFSET VOLTAGE DISTRIBUTION

FIGURE 2. INPUT OFFSET VOLTAGE DRIFT

2

1.5

1

0.008

V =±5V

S

0.004

0

0.5

0

-0.004

-0.008

-0.012

-0.5

-50

-10

30

70

110

150

-50

-10

30

70

110

150

TEMPERATURE (°C)

FIGURE 3. INPUT OFFSET VOLTAGE vs TEMPERATURE

4.96

FIGURE 4. INPUT BIAS CURRENT vs TEMPERATURE

-4.85

V =±5V

S

I

=5mA

OUT

I

=5mA

OUT

-4.87

-4.89

-4.91

-4.93

-4.95

4.94

4.92

4.90

4.88

4.86

-50

-10

30

70

110

150

-50

-10

30

70

110

150

TEMPERATURE (°C)

FIGURE 5. OUTPUT HIGH VOLTAGE vs TEMPERATURE

FIGURE 6. OUTPUT LOW VOLTAGE vs TEMPERATURE

FN7119.4

6

Typical Performance Curves (Continued)

75

78

77

76

75

74

73

72

V =±5V

S

R =1kΩ

L

70

65

60

-50

-10

30

70

110

150

-50

-10

30

70

110

150

TEMPERATURE (°C)

FIGURE 7. OPEN-LOOP GAIN vs TEMPERATURE

2.9

FIGURE 8. SLEW RATE vs TEMPERATURE

2.7

T =25°C

V =±5V

S

A

2.7

2.5

2.3

2.1

1.9

1.7

1.5

2.65

2.6

2.55

2.5

2.45

2.4

4

8

12

16

20

-50

-10

30

70

110

150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

FIGURE 9. SUPPLY CURRENT PER AMPLIFIER vs SUPPLY

VOLTAGE

FIGURE 10. SUPPLY CURRENT PER AMPLIFIER vs

TEMPERATURE

0

-0.02

-0.04

-0.06

-0.08

-0.1

0.3

0.25

0.2

0.15

0.1

-0.12

-0.14 V =±5V

S

0.05

0

A =2

V

-0.16

-0.18

R =1kΩ

L

0

100

IRE

200

0

100

IRE

200

FIGURE 11. DIFFERENTIAL GAIN

FIGURE 12. DIFFERENTIAL PHASE

FN7119.4

7

Typical Performance Curves (Continued)

-30

80

60

40

20

0

250

190

130

70

V =±5V

S

A =2

-40

-50

-60

-70

-80

-90

V

R =1kΩ

L

GAIN

FREQ=1MHz

2nd HD

PHASE

10

3rd HD

4

-20

-50

0

2

6

8

10

1K

10K

100K

1M

10M

100M

V

(V)

FREQUENCY (Hz)

OP-P

FIGURE 13. HARMONIC DISTORTION vs V

FIGURE 14. OPEN LOOP GAIN AND PHASE

25

OP-P

5

V =±5V

S

100pF

A =1

V

1000pF

15

C

=0pF

3

1

LOAD

1kΩ

47pF

10pF

5

-5

-1

-3

-5

560Ω

150Ω

V =±5V

S

-15

-25

A =1

V

R =1kΩ

L

100K

1M

10M

100M

100K

1M

10M

100M

FREQUENCY (Hz)

FIGURE 15. FREQUENCY RESPONSE FOR VARIOUS R

FIGURE 16. FREQUENCY RESPONSE FOR VARIOUS C

L

400

350

300

250

200

150

100

50

12

10

8

6

4

V =±5V

S

A =1

V

2

R =1kΩ

L

DISTORTION <1%

0

10K

100K

1M

10M

100M

10K

100K

1M

10M

100M

FREQUENCY (Hz)

FREQUENCY (kHz)

FIGURE 17. CLOSED LOOP OUTPUT IMPEDANCE

FIGURE 18. MAXIMUM OUTPUT SWING vs FREQUENCY

FN7119.4

8

Typical Performance Curves (Continued)

-15

-25

-35

-45

-55

-65

-80

-60

-40

-20

0

PSRR+

PSRR-

V =±5V

S

T =25°C

A

1K

10K

100K

1M

10M

100M

100

1K

10K

100K

1M

10M

FREQUENCY (Hz)

FIGURE 19. CMRR

FIGURE 20. PSRR

-60

-80

1K

DUAL MEASURED CH A TO B

QUAD MEASURED CH A TO D OR B TO C

OTHER COMBINATIONS YIELD

IMPROVED REJECTION

100

10

1

-100

-120

-140

-160

V =±5V

S

R =1kΩ

L

A =1

V

IN

V

=110mV

RMS

100

1K

10K

100K

1M

10M

100M

1K

10K

100K

FREQUENCY (Hz)

1M

10M

30M

FREQUENCY (Hz)

FIGURE 21. INPUT VOLTAGE NOISE SPECTRAL DENSITY

100

FIGURE 22. CHANNEL SEPARATION

5

4

3

2

1

V =±5V

S

V =±5V

S

A =1

V

A =1

V

R =1kΩ

L

80

60

40

20

0

L

0.1%

V

=±50mV

IN

T =25°C

A

0

-1

-2

-3

-4

-5

0.1%

10

100

1K

55

65

75

85

95

105

LOAD CAPACITANCE (pF)

SETTLING TIME (ns)

FIGURE 23. SMALL-SIGNAL OVERSHOOT vs LOAD

CAPACITANCE

FIGURE 24. SETTLING TIME vs STEP SIZE

FN7119.4

9

Typical Performance Curves (Continued)

V =±5V

S

V =±5V

S

T =25°C

A

T =25°C

A

A =1

V

A =1

V

R =1kΩ

L

100mV STEP

1V STEP

50ns/DIV

FIGURE 25. LARGE SIGNAL TRANSIENT RESPONSE

FIGURE 26. SMALL SIGNAL TRANSIENT RESPONSE

Pin Descriptions

EL5111

EL5211

EL5411

(TSOT-5)

(HMSOP8) (HMSOP8) ( HTSSOP14)

NAME

FUNCTION

EQUIVALENT CIRCUIT

1

6

1

VOUTA Amplifier A output

V

S+

V

S-

GND

CIRCUIT 1

4

2

VINA-

Amplifier A inverting input

V

S+

S-

CIRCUIT 2

(Reference Circuit 2)

3

5

3

7

3

8

5

6

7

3

4

VINA+

VS+

Amplifier A non-inverting input

Positive power supply

5

VINB+

VINB-

Amplifier B non-inverting input

Amplifier B inverting input

(Reference Circuit 2)

(Reference Circuit 1)

(Reference Circuit 2)

6

7

VOUTB Amplifier B output

VOUTC Amplifier C output

8

9

VINC-

VINC+

VS-

Amplifier C inverting input

10

11

12

13

14

Amplifier C non-inverting input

Negative power supply

2

4

VIND+

VIND-

Amplifier D non-inverting input

Amplifier D inverting input

(Reference Circuit 2)

(Reference Circuit 1)

VOUTD Amplifier D output

NC Not connected

1, 5, 8

FN7119.4

10

indefinitely, the power dissipation could easily increase such

that the device may be damaged. Maximum reliability is

maintained if the output continuous current never exceeds

±65mA. This limit is set by the design of the internal metal

interconnects.

Applications Information

Product Description

The EL5111, EL5211, and EL5411 voltage feedback

amplifiers are fabricated using a high voltage CMOS

process. They exhibit rail-to-rail input and output capability,

are unity gain stable and have low power consumption

(2.5mA per amplifier). These features make the EL5111,

EL5211, and EL5411 ideal for a wide range of general-

purpose applications. Connected in voltage follower mode

and driving a load of 1kΩ, the EL5111, EL5211, and EL5411

have a -3dB bandwidth of 60MHz while maintaining a 75V/µs

slew rate. The EL5111 is a single amplifier, the EL5211 a

dual amplifier, and the EL5411 a quad amplifier.

Output Phase Reversal

The EL5111, EL5211, and EL5411 are immune to phase

reversal as long as the input voltage is limited from V - -0.5V

S

to V + +0.5V. Figure 28 shows a photo of the output of the

S

device with the input voltage driven beyond the supply rails.

Although the device's output will not change phase, the

input's overvoltage should be avoided. If an input voltage

exceeds supply voltage by more than 0.6V, electrostatic

protection diodes placed in the input stage of the device

begin to conduct and overvoltage damage could occur.

Operating Voltage, Input, and Output

The EL5111, EL5211, and EL5411 are specified with a single

nominal supply voltage from 5V to 15V or a split supply with

its total range from 5V to 15V. Correct operation is

guaranteed for a supply range of 4.5V to 16.5V. Most

EL5111, EL5211, and EL5411 specifications are stable over

both the full supply range and operating temperatures of

-40°C to +85°C. Parameter variations with operating voltage

and/or temperature are shown in the typical performance

curves.

V

= ±2.5V, T = 25°C, A = 1, V = 6V

IN P-P

S

A

V

1V

10µs

The input common-mode voltage range of the EL5111,

EL5211, and EL5411 extends 500mV beyond the supply

rails. The output swings of the EL5111, EL5211, and EL5411

typically extend to within 100mV of positive and negative

supply rails with load currents of 5mA. Decreasing load

currents will extend the output voltage range even closer to

the supply rails. Figure 27 shows the input and output

waveforms for the device in the unity-gain configuration.

Operation is from ±5V supply with a 1kΩ load connected to

1V

FIGURE 28. OPERATION WITH BEYOND-THE-RAILS INPUT

Power Dissipation

With the high-output drive capability of the EL5111, EL5211,

and EL5411 amplifiers, it is possible to exceed the 125°C

'absolute-maximum junction temperature' under certain load

current conditions. Therefore, it is important to calculate the

maximum junction temperature for the application to

determine if load conditions need to be modified for the

amplifier to remain in the safe operating area.

GND. The input is a 10V

sinusoid. The output voltage is

P-P

approximately 9.8V

.

P-P

V

= ±5V, T = 25°C, A = 1, V = 10V

IN P-P

S

A

V

5V

10µs

The maximum power dissipation allowed in a package is

determined according to:

T

– T

AMAX

JMAX

P

= --------------------------------------------

DMAX

Θ

JA

where:

5V

• T

= Maximum junction temperature

= Maximum ambient temperature

JMAX

AMAX

FIGURE 27. OPERATION WITH RAIL-TO-RAIL INPUT AND

OUTPUT

• Θ = Thermal resistance of the package

JA

• P

DMAX

= Maximum power dissipation in the package

Short Circuit Current Limit

The EL5111, EL5211, and EL5411 will limit the short circuit

current to ±180mA if the output is directly shorted to the

positive or the negative supply. If an output is shorted

FN7119.4

11

The maximum power dissipation actually produced by an IC

is the total quiescent supply current times the total power

supply voltage, plus the power in the IC due to the loads, or:

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY (4-LAYER) TEST BOARD -

HTSSOP EXPOSED DIEPAD SOLDERED TO

PCB PER JESD51-5

3.5

3

P

= Σi[V × I

+ (V + – V

i) × I

i]

LOAD

DMAX

S

SMAX

S

OUT

2.632W

when sourcing, and:

2.5

2

HTSSOP14

JA

θ

=38°C/W

P

= Σi[V × I

+ (V

i – V -) × I

i]

LOAD

DMAX

S

SMAX

OUT

S

1.5

1

when sinking,

where:

0.5

0

• i = 1 to 2 for dual and 1 to 4 for quad

• V = Total supply voltage

0

25

50

75 85 100

125

S

AMBIENT TEMPERATURE (°C)

• I

SMAX

= Maximum supply current per amplifier

FIGURE 30. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

• V

i = Maximum output voltage of the application

OUT

Unused Amplifiers

• I

i = Load current

LOAD

It is recommended that any unused amplifiers in a dual and

a quad package be configured as a unity gain follower. The

inverting input should be directly connected to the output

and the non-inverting input tied to the ground plane.

If we set the two P

equations equal to each other, we

i to avoid device overheat. Figures 29,

DMAX

can solve for R

LOAD

30, and 31 provide a convenient way to see if the device will

overheat. The maximum safe power dissipation can be

found graphically, based on the package type and the

ambient temperature. By using the previous equation, it is a

Power Supply Bypassing and Printed Circuit

Board Layout

simple matter to see if P

exceeds the device's power

DMAX

The EL5111, EL5211, and EL5411 can provide gain at high

frequency. As with any high-frequency device, good printed

circuit board layout is necessary for optimum performance.

Ground plane construction is highly recommended, lead

lengths should be as short as possible and the power supply

pins must be well bypassed to reduce the risk of oscillation.

derating curves. To ensure proper operation, it is important

to observe the recommended derating curves shown in

Figures 29, 30 & 31.

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

For normal single supply operation, where the V - pin is

CONDUCTIVITY TEST BOARD

0.9

S

connected to ground, a 0.1µF ceramic capacitor should be

0.8

placed from V + to pin to V - pin. A 4.7µF tantalum

S

694mW

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

HTSSOP14

=144°C/W

capacitor should then be connected in parallel, placed in the

region of the amplifier. One 4.7µF capacitor may be used for

multiple devices. This same capacitor combination should be

placed at each supply pin to ground if split supplies are to be

used.

θ

JA

0

25

50

75 85 100

125

AMBIENT TEMPERATURE (°C)

FIGURE 29. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN7119.4

12

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