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EL7457

®

Data Sheet

January 3, 2005

FN7288.3

40MHz Non-Inverting Quad CMOS Driver

Features

• Clocking speeds up to 40MHz

The EL7457 is a high speed, non-inverting, quad CMOS

driver. It is capable of running at clock rates up to 40MHz

and features 2A peak drive capability and a nominal on-

resistance of just 3Ω. The EL7457 is ideal for driving highly

capacitive loads, such as storage and vertical clocks in CCD

applications. It is also well suited to ATE pin driving, level-

shifting, and clock-driving applications.

• 4 channels

• 12ns t /t at 1000pF C

R F

LOAD

• 1ns rise and fall time match

• 1.5ns prop delay match

• Low quiescent current - <1mA

• Fast output enable function - 12ns

• Wide output voltage range

The EL7457 is capable of running from single or dual power

supplies while using ground referenced inputs. Each output

can be switched to either the high (V ) or low (V ) supply

H

L

pins, depending on the related input pin. The inputs are

compatible with both 3V and 5V CMOS and TTL logic. The

output enable (OE) pin can be used to put the outputs into a

high-impedance state. This is especially useful in CCD

applications, where the driver should be disabled during

power down.

• 8V ≥ V ≥ -5V

L

• -2V ≤ V ≤ 16.5V

H

• 2A peak drive

• 3Ω on resistance

The EL7457 also features very fast rise and fall times which

are matched to within 1ns. The propagation delay is also

matched between rising and falling edges to within 2ns.

• Input level shifters

• TTL/CMOS input-compatible

• Pb-free available (RoHS compliant)

The EL7457 is available in 16-pin QSOP, 16-pin SO

(0.150"), and 16-pin QFN packages. All are specified for

operation over the full -40°C to +85°C temperature range.

Applications

• CCD drivers

Pinouts

EL7457

[16-PIN SO (0.150”),

QSOP (0.150”)]

TOP VIEW

• Digital cameras

EL7457

[16-PIN QFN (4x4mm)]

TOP VIEW

• Pin drivers

• Clock/line drivers

• Ultrasound transducer drivers

• Ultrasonic and RF generators

• Level shifting

1

2

3

4

5

6

7

8

INA

OE

VS+ 16

OUTA 15

OUTB 14

NC 13

INB

VL

1

2

3

4

12 OUTB

INB

VL

11 VH

10 VH

THERMAL

PAD*

VL

GND

NC

VH 12

9

OUTC

GND

OUTC 11

OUTD 10

INC

IND

VS-

9

* THERMAL PAD CONNECTED

TO PIN 7 (V -)

S

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

1

All other trademarks mentioned are the property of their respective owners.

EL7457

Ordering Information

TAPE &

REEL

TAPE &

REEL

PART NUMBER

PACKAGE

PKG. DWG. #

PART NUMBER

PACKAGE

PKG. DWG. #

EL7457CU

16-Pin QSOP

(0.150”)

-

7”

13”

-

MDP0040

EL7457CSZ

(See Note)

16-Pin SO

(0.150”)

-

7”

13”

-

MDP0027

(Pb-Free)

EL7457CU-T7

EL7457CU-T13

16-Pin QSOP

(0.150”)

MDP0040

MDP0027

EL7457CSZ-T7

(See Note)

16-Pin SO

(0.150”)

(Pb-Free)

MDP0027

MDP0046

16-Pin QSOP

(0.150”)

EL7457CSZ-T13

(See Note)

16-Pin SO

(0.150”)

(Pb-Free)

EL7457CUZ

(See Note)

16-Pin QSOP

(0.150”)

(Pb-Free)

EL7457CL

16-Pin QFN

(4x4mm)

EL7457CUZ-T7

(See Note)

16-Pin QSOP

(0.150”)

(Pb-Free)

7”

13”

-

EL7457CL-T7

EL7457CL-T13

16-Pin QFN

(4x4mm)

7”

13”

-

EL7457CUZ-T13 16-Pin QSOP

(See Note)

16-Pin QFN

(4x4mm)

(0.150”)

(Pb-Free)

EL7457CS

16-Pin SO

(0.150”)

EL7457CLZ

(See Note)

16-Pin QFN

(4x4mm)

(Pb-Free)

EL7457CS-T7

EL7457CS-T13

16-Pin SO

(0.150”)

7”

13”

EL7457CLZ-T7

(See Note)

16-Pin QFN

(4x4mm)

(Pb-Free)

7”

13”

16-Pin SO

(0.150”)

EL7457CLZ-T13

(See Note)

16-Pin QFN

(4x4mm)

(Pb-Free)

NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination

finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at

Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020C.

FN7288.3

2

January 3, 2005

EL7457

Absolute Maximum Ratings (T = 25°C)

A

Supply Voltage (V + to V -) . . . . . . . . . . . . . . . . . . . . . . . . . . .+18V

Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C

Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +125°C

Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves

S

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .V - -0.3V, V + +0.3V

S

Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests

are at the specified temperature and are pulsed tests, therefore: T = T = T

A

J

C

Electrical Specifications V + = +5V, V - = -5V, V = +5V, V = -5V, T = 25°C, unless otherwise specified.

S

H

L

A

PARAMETER

DESCRIPTION

CONDITION

MIN

TYP

MAX

UNIT

INPUT

V

Logic “1” Input Voltage

2.0

V

µA

V

IH

IL

I

Logic “1” Input Current

Logic “0” Input Voltage

Logic “0” Input Current

Input Capacitance

V

= 5V

= 0V

0.1

10

0.8

10

IH

IL

V

I

0.1

3.5

50

µA

pF

MΩ

IL

C

IN

R

Input Resistance

OUTPUT

R

ON Resistance V to OUTx

I

= -100mA

= +100mA

4.5

4

6

Ω

OH

H

OUT

ON Resistance V to OUTx

L

OL

I

Output Leakage Current

Peak Output Current

V

= V +, V = V -

0.1

2.0

10

µA

A

LEAK

PK

H

S

L

S

Source

Sink

A

POWER SUPPLY

I

Power Supply Current

Inputs = V +

0.5

1.5

mA

S

SWITCHING CHARACTERISTICS

t

Rise Time

Fall Time

C

= 1000pF

13.5

13

ns

R

L

F

t , t Mismatch

0.5

12.5

14.5

2

RF∆

R F

t +

Turn-Off Delay Time

Turn-On Delay Time

C = 1000pF

L

D

t -

C = 1000pF

L

D

t

- t

D-1 D-2

Mismatch

C = 1000pF

L

DD

Enable Delay Time

Disable Delay Time

12

ENABLE

DISABLE

12

FN7288.3

3

January 3, 2005

EL7457

Electrical Specifications V + = +15V, V - = 0V, V = +15V, V = 0V, T = 25°C, unless otherwise specified

S

H

L

A

PARAMETER

DESCRIPTION

CONDITION

MIN

TYP

MAX

UNIT

INPUT

V

Logic “1” Input Voltage

2.4

V

µA

V

IH

IL

I

Logic “1” Input Current

Logic “0” Input Voltage

Logic “0” Input Current

Input Capacitance

V

= 5V

= 0V

0.1

10

0.8

10

IH

IL

V

I

V

0.1

3.5

50

µA

pF

MΩ

IL

C

R

IN

Input Resistance

OUTPUT

R

ON Resistance V to OUT

I

= -100mA

= +100mA

3.5

3

5

Ω

OH

H

OUT

ON Resistance V to OUT

L

OL

I

Output Leakage Current

Peak Output Current

V

= V +, V = V -

0.1

2.0

10

µA

A

LEAK

PK

H

S

L

S

Source

Sink

A

POWER SUPPLY

I

Power Supply Current

Inputs = V +

0.8

2

mA

S

SWITCHING CHARACTERISTICS

t

Rise Time

Fall Time

C

= 1000pF

11

12

1

ns

R

L

F

t , t Mismatch

RF∆

R F

t +

Turn-Off Delay Time

Turn-On Delay Time

C = 1000pF

11.5

13

1.5

12

D

L

t -

C = 1000pF

L

D

t

- t

D-1 D-2

Mismatch

C = 1000pF

L

DD

Enable Delay Time

Disable Delay Time

ENABLE

DISABLE

FN7288.3

4

January 3, 2005

EL7457

Typical Performance Curves

1.8

2

1.6

1.2

0.8

0.4

0

T=25°C

HIGH LIMIT=2.4V

T=25°C

ALL INPUTS=0

1.6

1.4

1.2

1

HYSTERESIS

ALL INPUTS=V +

S

LOW LIMIT=0.8V

10

5

7

12

15

5

7

10

SUPPLY VOLTAGE (V)

12

15

SUPPLY VOLTAGE (V)

FIGURE 1. SWITCH THRESHOLD vs SUPPLY VOLTAGE

FIGURE 2. QUIESCENT SUPPLY CURRENT vs SUPPLY

VOLTAGE

9

25

I

=100mA

OUT

T=25°C

8

7

6

5

4

3

2

t

R

20

15

10

5

V

TO OUT

H

t

F

V

TO OUT

7

L

C =1000pF

L

T=25°C

7

5

10

SUPPLY VOLTAGE (V)

12

15

5

10

12

15

SUPPLY VOLTAGE (V)

FIGURE 3. “ON” RESISTANCE vs SUPPLY VOLTAGE

FIGURE 4. RISE/FALL TIME vs SUPPLY VOLTAGE

16

25

C =1000pF

L

V +=15V

S

14

12

10

8

20

15

10

5

t

F

t

D2

t

D1

10

t

R

6

-50

-25

0

25

50

75

100

125

5

7

12

15

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

FIGURE 5. RISE/FALL TIME vs TEMPERATURE

FIGURE 6. PROPAGATION DELAY vs SUPPLY VOLTAGE

FN7288.3

January 3, 2005

5

EL7457

Typical Performance Curves (Continued)

18

140

120

100

80

C =1000pF

V +=15V

S

L

V +=15V

S

16

14

12

10

8

t

D2

D1

60

t

F

40

t

R

20

6

0

-50

-25

0

25

50

75

100

125

100

470

1K

2.2K

4.7K

10K

TEMPERATURE (°C)

LOAD CAPACITANCE (pF)

FIGURE 7. PROPAGATION DELAY vs TEMPERATURE

FIGURE 8. RISE/FALL TIME vs LOAD

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

12

1.2

1

V +=V =10V

S

H

V -=V =0V

S

L

10

8

f=100kHz

909mW

SO16 (0.150”)

0.8

0.6

0.4

0.2

0

θ

=110°C/W

JA

667mW

633mW

6

QFN16

=150°C/W

θ

JA

4

QSOP16 (0.150”)

=158°C/W

θ

JA

2

0

100

1K

10K

0

25

50

75 85 100

125

150

LOAD CAPACITANCE (pF)

AMBIENT TEMPERATURE (°C)

FIGURE 9. SUPPLY CURRENT PER CHANNEL vs

CAPACITIVE LOAD

FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

3

2.500W

2.5

QFN16

JA

θ

=40°C/W

2

1.5

1

SO16 (0.150”)

1.250W

893mW

θ

=80°C/W

JA

0.5

0

QSOP16 (0.150”)

=112°C/W

θ

JA

0

25

50

75 85 100

125

150

AMBIENT TEMPERATURE (°C)

FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

FN7288.3

January 3, 2005

6

EL7457

Timing Diagram

TABLE 1. NOMINAL OPERATING VOLTAGE RANGE

5V

V + to V -

MIN

5V

MAX

16.5V

0V

INPUT

2.5V

0

S

V - to GND

-5V

S

OUTPUT

90%

10%

V

V - + 2.5V

S

V +

S

H

V

V -

S

V +

S

L

V

to V

0V

16.5V

8V

H

L

t +

D

t -

D

to V -

t

F

L

S

R

Standard Test Configuration (CS/CU)

VS+

0.1µF

4.7µF

0.1µF

VS+

10kΩ

INA

EN

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

OUTA

1000pF

INB

VL

OUTB

VH

4.7µF

0.1µF

4.7µF

OUTC

OUTD

VS-

1000pF

0.1µF

INC

IND

4.7µF

FN7288.3

7

January 3, 2005

EL7457

Pin Descriptions

16-PIN

QSOP(0.150”),

SO (0.150”)

16-PIN QFN

(4x4mm)

NAME

FUNCTION

EQUIVALENT CIRCUIT

1

15

INA

Input channel A

V +

S

V +

S

INPUT

V -

S

V -

S

CIRCUIT 1

2

3

16

1

OE

INB

Output Enable

(Reference Circuit 1)

Input channel B

4

2, 3

4

VL

Low voltage input pin

Input logic ground

No connection

5

GND

NC

6, 13

7

5

6

7

8

INC

IND

VS-

Input channel C

(Reference Circuit 1)

8

Input channel D

9

Negative supply voltage

Output channel D

10

OUTD

V

H

V +

S

OUTPUT

V -

S

V -

S

V

L

CIRCUIT 2

11

12

14

15

16

9

10, 11

12

OUTC

VH

Output channel C

(Reference Circuit 2)

High voltage input pin

Output channel B

OUTB

OUTA

VS+

(Reference Circuit 2)

13

Output channel A

14

Positive supply voltage

FN7288.3

8

January 3, 2005

EL7457

Block Diagram

OE

V

H

V +

S

INPUT

GND

LEVEL

3-STATE

CONTROL

OUTPUT

SHIFTER

V -

S

V

L

Power Dissipation Calculation

When switching at high speeds, or driving heavy loads, the

EL7457 drive capability is limited by the rise in die

temperature brought about by internal power dissipation. For

reliable operation die temperature must be kept below

Applications Information

Product Description

The EL7457 is a high performance 40MHz high speed quad

driver. Each channel of the EL7457 consists of a single P-

channel high side driver and a single N-channel low side

T

(125°C). It is necessary to calculate the power

JMAX

driver. These 3Ω devices will pull the output (OUT ) to either

X

dissipation for a given application prior to selecting package

type.

the high or low voltage, on V and V respectively,

H

L

depending on the input logic signal (IN ). It should be noted

X

Power dissipation may be calculated:

that there is only one set of high and low voltage pins.

4

A common output enable (OE) pin is available on the

EL7457. This pin, when pulled low will put all outputs in to

the high impedance state.

2

PD = (V × I ) +

(C

× V × f) + (C × V

× f)

S

INT

S

L

OUT

∑

1

The EL7457 is available in 16-pin SO (0.150"), 16-pin

QSOP, and ultra-small 16-pin QFN packages. The relevant

package should be chosen depending on the calculated

power dissipation.

where:

V is the total power supply to the EL7457 (from V + to

S

V -)

S

Supply Voltage Range and Input Compatibility

V

is the swing on the output (V - V )

H L

OUT

C is the load capacitance

The EL7457 is designed for operation on supplies from 5V to

15V with 10% tolerance (i.e. 4.5V to 18V). The table on page

6 shows the specifications for the relationship between the

L

C

is the internal load capacitance (80pF max)

INT

is the quiescent supply current (3mA max)

V +, V -, V , V , and GND pins. The EL7457 does not

S

H

L

I

S

contain a true analog switch and therefore V should always

L

be less than V .

H

f is frequency

All input pins are compatible with both 3V and 5V CMOS

Having obtained the application’s power dissipation, the

maximum junction temperature can be calculated:

signals With a positive supply (V +) of 5V, the EL7457 is

S

also compatible with TTL inputs.

T

= T

+ Θ × PD

MAX JA

JMAX

Power Supply Bypassing

When using the EL7457, it is very important to use adequate

power supply bypassing. The high switching currents

developed by the EL7457 necessitate the use of a bypass

capacitor on both the positive and negative supplies. It is

recommended that a 4.7µF tantalum capacitor be used in

parallel with a 0.1µF low-inductance ceramic MLC capacitor.

These should be placed as close to the supply pins as

where:

T

is the maximum junction temperature (125°C)

is the maximum ambient operating temperature

JMAX

T

MAX

PD is the power dissipation calculated above

θ

is the thermal resistance, junction to ambient, of the

JA

possible. It is also recommended that the V and V pins

H

L

application (package + PCB combination). Refer to the

Package Power Dissipation curves on page 6.

have some level of bypassing, especially if the EL7457 is

driving highly capacitive loads.

FN7288.3

January 3, 2005

9

EL7457

QSOP Package Outline Drawing

FN7288.3

10

January 3, 2005

EL7457

SO Package Outline Drawing

FN7288.3

11

January 3, 2005

EL7457

QFN Package Outline Drawing

NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil

website at <http://www.intersil.com/design/packages/index.asp>

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN7288.3

12

January 3, 2005

型号:	EL7457CSZ-T13
Brand Name：	Intersil
生命周期：	Unknown
IHS 制造商：	INTERSIL CORP
零件包装代码：	QFN, QSOP, SOIC
包装说明：	SOP, SOP16,.25
针数：	16, 16, 16
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8542.39.00.01
Factory Lead Time：	13 weeks
风险等级：	5.12
Is Samacsys：	N
驱动器位数：	4
高边驱动器：	YES
接口集成电路类型：	BUFFER OR INVERTER BASED MOSFET DRIVER
JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e3
长度：	9.9 mm
湿度敏感等级：	3
标称负供电电压：	-5 V
功能数量：	4
端子数量：	16
最高工作温度：	85 °C
最低工作温度：	-40 °C
最大输出电流：	0.1 A
标称输出峰值电流：	2 A
封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP
封装等效代码：	SOP16,.25
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	260
电源：	+-5,15 V
认证状态：	Not Qualified
座面最大高度：	1.75 mm
子类别：	Peripheral Drivers
标称供电电压：	5 V
电源电压1-Nom：	5 V
表面贴装：	YES
技术：	CMOS
温度等级：	INDUSTRIAL
端子面层：	Matte Tin (Sn) - annealed
端子形式：	GULL WING
端子节距：	1.27 mm
端子位置：	DUAL
处于峰值回流温度下的最长时间：	40
宽度：	3.9 mm
Base Number Matches：	1

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