FDC5612现货热卖使用介绍供应商报价哪里找芯片批发报价-中国IC网-芯三七

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产品型号FDC5612的概述

芯片FDC5612的概述 FDC5612是一款高性能的模拟开关集成电路，广泛应用于各种电子设备中。作为一种开关控制芯片，FDC5612能够有效地控制信号的流通和切换，特别适用于高频信号的处理，达到低失真和高保真的效果。这款芯片在音频、视频传输以及数据采集系统中都展现出优越的性能。 FDC5612的主要特性包括较低的操作电压，快速的响应时间，以及较高的开关比。这些优点使得FDC5612能够轻松适应各种复杂的应用需求。此外，这款芯片还具备较高的耐压能力，能够在不同的工作环境中稳定运行。芯片FDC5612的详细参数 FDC5612的详细技术参数如下： 1. 输入电压范围：通常为2.5V到12V，具有良好的兼容性。 2. 输出电流：最大输出电流为100mA，适用于大多数电子设备。 3. 工作频率：具有高达20MHz的开关频率，能够满足大多数高速应用需求。 4. 持续开关闭合电阻：在不同的工作...

产品型号FDC5612的Datasheet PDF文件预览

May 1999

FDC5612

60V N-Channel PowerTrench^TMMOSFET

Features

General Description

This N-Channel MOSFET has been designed

specifically to improve the overall efficiency of DC/DC

converters using either synchronous or conventional

switching PWM controllers.

• 4.3 A, 60 V. R_DS(ON)= 0.055 W @ V_GS= 10 V

R_DS(ON)= 0.064 W @ V_GS= 6 V.

• Low gate charge (12.5nC typical).

• Fast switching speed.

These MOSFETs feature faster switching and lower gate

charge than other MOSFETs with comparable R_DS(ON)

specifications.

• High performance trench technology for extremely

low R_DS(ON)

The result is a MOSFET that is easy and safer to drive

(even at very high frequencies), and DC/DC power supply

• SuperSOT^TM-6 package: small footprint (72% smaller

than standard SO-8); low profile (1mm thick).

designs with higher overall efficiency.

SuperSOT^TM-6

T_A= 25°C unless otherwise noted

Absolute Maximum Ratings

Symbol

Parameter

Ratings

Units

V_DSS

V_GSS

I_D

Drain-Source Voltage

Gate-Source Voltage

(Note 1a)

Drain Current - Continuous

Drain Current - Pulsed

4.3

P_D

Power Dissipation for Single Operation

1.6

(Note 1b)

0.8

T_J, T_stg

Operating and Storage Junction Temperature Range

-55 to +150

Thermal Characteristics

(Note 1a)

(Note 1)

C/W

Thermal Resistance, Junction-to-Ambient

C/W

Thermal Resistance, Junction-to-Case

Package Outlines and Ordering Information

Device Marking

Device

Reel Size

Tape Width

Quantity

.612

FDC5612

7’’

8mm

3000 units

ã1999 Fairchild Semiconductor Corporation

FDC5612 Rev. C

T_A= 25°C unless otherwise noted

Electrical Characteristics

Symbol

Parameter

Test Conditions

Min Typ Max Units

Off Characteristics

BV_DSS

Drain-Source Breakdown Voltage

V_GS= 0 V, I_D= 250

DSS

∆

Breakdown Voltage Temperature

Coefficient

I_D= 250 A, Referenced to 25 C

mV/ C

∆

T_J

I_DSS

Zero Gate Voltage Drain Current

V_DS= 48 V, V_GS= 0 V

I_GSSF

I_GSSR

Gate-Body Leakage Current, Forward V_GS= 20 V, V_DS= 0 V

Gate-Body Leakage Current, Reverse V_GS= -20 V, V_DS= 0 V

100

-100

(Note 2)

On Characteristics

V_GS(th)

Gate Threshold Voltage

V_DS= V_GS, I_D= 250

2.2

GS(th)

Gate Threshold Voltage

Temperature Coefficient

I_D= 250 A, Referenced to 25 C

-5.5

mV/ C

∆

T_J

∆

R_DS(on)

Static Drain-Source

On-Resistance

V_GS= 10 V, I_D= 4.3 A

0.042 0.055

0.072 0.094

0.048 0.064

Ω

V_GS= 10 V, I_D= 4.3 A, T_J= 125 C

V_GS= 6 V, I_D= 4 A

I_D(on)

g_FS

On-State Drain Current

V_GS= 10 V, V_DS= 5 V

Forward Transconductance

V_DS= 10 V, I_D= 4.3 A

Dynamic Characteristics

C_iss

C_oss

C_rss

Input Capacitance

V_DS= 25 V, V_GS= 0 V,

f = 1.0 MHz

650

Output Capacitance

Reverse Transfer Capacitance

(Note 2)

Switching Characteristics

t_d(on)

t_r

t_d(off)

t_f

Turn-On Delay Time

Turn-On Rise Time

Turn-Off Delay Time

Turn-Off Fall Time

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

_DD= 30 V, I_D= 1 A,

_GS= 10 V, R_GEN= 6

Ω

Q_g

Q_gs

Q_gd

V_DS= 30 V, I_D= 4.3 A,

_GS= 10 V

12.5

2.4

2.6

Drain-Source Diode Characteristics and Maximum Ratings

I_S

Maximum Continuous Drain-Source Diode Forward Current

1.3

1.2

(Note 2)

V_SD

Notes:

Drain-Source Diode Forward Voltage V_GS= 0 V, I_S= 1.3 A

0.75

1. R_qJAis the sum of the junction-to-case and case-to-ambient resistance where the case thermal reference is defined as the solder mounting surface

of the drain pins. R_qJCis guaranteed by design while R_qCAis determined by the user's board design.

a) 78°C/W when mounted on a 1.0 in²pad of 2 oz. copper.

b) 156°C/W when mounted on a minimum pad.

2. Pulse Test: Pulse Width £300 ms, Duty Cycle £2.0%

FDC5612 Rev.

Typical Characteristics

1.8

1.6

1.4

1.2

V_GS= 10V

6.0V

5.0V

4.5V

V_GS

= 4.0V

4.0V

4.5V

5.0V

6.0V

8.0V

3.5V

10V

0.8

V_DS, DRAIN-SOURCE VOLTAGE (V)

I_D, DRAIN CURRENT (A)

Figure 1. On-Region Characteristics.

Figure 2. On-Resistance Variation

with Drain Current and Gate Voltage.

0.14

0.12

0.1

I_D= 2.2A

I_D= 4.3A

1.8

1.6

1.4

1.2

V_GS= 10V

T_A= 125^oC

0.08

0.06

0.04

0.02

T_A= 25^oC

0.8

0.6

0.4

-50

-25

100

125

150

T_J, JUNCTION TEMPERATURE (^oC)

V_GS, GATE TO SOURCE VOLTAGE (V)

Figure 3. On-Resistance Variation

with Temperature.

Figure 4. On-Resistance Variation

with Gate-to-Source Voltage.

100

T_A= -55^oC

V_GS= 0V

25^oC

125^oC

V_DS= 5V

T_A= 125^oC

25^oC

0.1

-55^oC

0.01

0.001

0.0001

0.2

0.4

0.6

0.8

1.2

V_SD, BODY DIODE FORWARD VOLTAGE (V)

V_GS, GATE TO SOURCE VOLTAGE (V)

Figure 5. Transfer Characteristics.

Figure 6. Body Diode Forward Voltage

Variation with Source Current

and Temperature.

FDC5612 Rev.

Typical Characteristics (continued)

900

800

700

600

500

400

300

200

100

I_D

4.3A

V_DS= 10V

f = 1MHz

V_GS= 0 V

20V

30V

C_ISS

C_OSS

C_RSS

, DRAIN TO SO URCE VOLTAG E (V)

Q_g, GATE CHARGE (nC)

Figure 7. Gate-Charge Characteristics.

Figure 8. Capacitance Characteristics.

100

SINGLE PULSE

_θJA= 156^oC/W

T_A= 25^oC

100

LIM IT

DS(ON)

1m s

10m s

100m s

= 10V

S IN G LE P U LS E

0.1

0.01

D C

156 C /W

25 C

0.1

100

1000

0.1

100

SINGLE PULSE TIME (SEC)

V_DS, DRAIN-SOURCE VOLTAGE (V)

Figure 9. Maximum Safe Operating Area.

Figure 10. Single Pulse Maximum

Power Dissipation.

D = 0.5

0.5

(t) = r(t) * R

θJA

= 156°C/W

θJA

0.2

0.1

P(pk)

0.05

0.02

- T = P * R

(t)

θJA

0.02

0.01

Duty Cycle, D = t / t

Single Pulse

0.01

0.005

0.00001

0.0001

0.001

0.01

0.1

100

300

, TIME (sec)

Figure 11. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1b.

Transient themal response will change depending on the circuit board design.

FDC5612 Rev.

SuperSOT^TM-6 Tape and Reel Data and Package Dimensions

SSOT-6 Packaging

Configuration:

Figure 1.0

Packaging Description:

Customize Label

SSOT-6 parts are shipped in tape. The carrier tape is

made from

a dissipative (carbon filled) polycarbonate

resin. The cover tape is a multilayer film (Heat Activated

Adhesive in nature) primarily composed of polyester film,

adhesive layer, sealant, and anti-static sprayed agent.

These reeled parts in standard option are shipped with

3,000 units per 7" or 177cm diameter reel. The reels are

dark blue in color and is made of polystyrene plastic (anti-

static coated). Other option comes in 10,000 units per 13"

or 330cm diameter reel. This and some other options are

described in the Packaging Information table.

Antistatic Cover Tape

These full reels are individually barcode labeled and

placed inside a pizza box (illustrated in figure 1.0) made of

recyclable corrugated brown paper with

printing. One pizza box contains three reels maximum.

And these pizza boxes are placed inside barcode

a Fairchild logo

labeled shipping box which comes in different sizes

depending on the number of parts shipped.

Embossed

Carrier Tape

F63TNR

Label

631

SSOT-6 Packaging Information

Pin 1

Standard

Packaging Option

D87Z

(no flow c ode)

Packaging type

TNR

3,000

7" Dia

TNR

10,000

13"

SSOT-6 Unit Orientation

Qty per Reel/Tube/Bag

Reel Size

Box Dimension (mm)

Max qty per Box

184x187x47 343x343x64

9,000

0.0158

0.1440

30,000

0.0158

0.4700

343mm x 342mm x 64mm

Intermediate box for D87Z Option

F63TNR Label

Weight per unit (gm)

Weight per Reel (kg)

Note/Comments

F63TNR

Label

F63TNR Label sample

F63TNR

Label

LOT: CBVK741B019

FSID: FDC633N

QTY: 3000

SPEC:

184mm x 187mm x 47mm

Pizza Box for Standard Option

D/C1: D9842

D/C2:

QTY1:

QTY2:

SPEC REV:

CPN:

SSOT-6 Tape Leader and Trailer

N/F: F

(F63TNR)3

Configuration:

Figure 2.0

Carrier Tape

Component s

Cover Tape

Trailer Tape

Leader Tape

300mm minimum or

75 empty poc kets

500mm minimum or

125 empty poc kets

1998 Fairchild Semiconductor Corporation

August 1999, Rev. C

SuperSOT^TM-6 Tape and Reel Data and Package Dimensions, continued

SSOT-6 Embossed Carrier Tape

Configuration:

Figure 3.0

User Direction of Feed

Dimensions are in millimeter

Pkg type

SSOT-6

(8mm)

3.23

+/-0.10

3.18

+/-0.10

8.0

+/-0.3

1.55

+/-0.05

1.125

+/-0.125

1.75

+/-0.10

6.25

min

3.50

+/-0.05

4.0

+/-0.1

4.0

+/-0.1

1.37

+/-0.10

0.255

+/-0.150

5.2

+/-0.3

0.06

+/-0.02

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

rotational and lateral movement requirements (see sketches A, B, and C).

0.5mm

maximum

20 deg maximum

Typical

component

cavity

center line

0.5mm

maximum

20 deg maximum component rotation

Typical

component

center line

Sketch A (Side or Front Sectional View)

Component Rotation

Sketch C (Top View)

Component lateral movement

Sketch B (Top View)

Component Rotation

SSOT-6 Reel Configuration:

Figure 4.0

W1 Measured at Hub

Dim A

Max

Dim A

max

See detail AA

Dim N

Diameter Option

B Min

Dim C

See detail AA

Dim D

min

13" Diameter Option

W2 max Measured at Hub

DETAIL AA

Dimensions are in inches and millimeters

Reel

Option

Tape Size

Dim A

Dim B

Dim C

Dim D

Dim N

Dim W1

Dim W2

Dim W3 (LSL-USL)

7.00

177.8

0.059

1.5

512 +0.020/-0.008

13 +0.5/-0.2

0.795

20.2

2.165

0.331 +0.059/-0.000

8.4 +1.5/0

0.567

14.4

0.311 – 0.429

7.9 – 10.9

8mm

7" Dia

13.00

330

0.059

1.5

512 +0.020/-0.008

13 +0.5/-0.2

0.795

20.2

4.00

100

0.331 +0.059/-0.000

8.4 +1.5/0

0.567

14.4

0.311 – 0.429

7.9 – 10.9

13" Dia

July 1999, Rev. C

SuperSOT^TM-6 Tape and Reel Data and Package Dimensions, continued

SuperSOT -6 (FS PKG Code 31, 33)

1:1

Scale 1:1 on letter size paper

Dimensions shown below are in:

inches [millimeters]

Part Weight per unit (gram): 0.0158

1998 Fairchild Semiconductor Corporation

September 1998, Rev. A

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

ACEx™

CoolFET™

ISOPLANAR™

MICROWIRE™

POP™

PowerTrench

QFET™

SyncFET™

TinyLogic™

UHC™

CROSSVOLT™

E²CMOS^TM

VCX™

FACT™

FACT Quiet Series™

QS™

FAST^®

Quiet Series™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

FASTr™

GTO™

HiSeC™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD

DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT

OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT

RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or

systems which, (a) are intended for surgical implant into

the body, or (b) support or sustain life, or (c) whose

failure to perform when properly used in accordance

with instructions for use provided in the labeling, can be

reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life

support device or system whose failure to perform can

be reasonably expected to cause the failure of the life

support device or system, or to affect its safety or

effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or

In Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. D

FDC5612相关文章

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FDC5612产品参数

型号:	FDC5612
Brand Name：	Fairchild Semiconductor
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Transferred
零件包装代码：	SSOT
包装说明：	SMALL OUTLINE, R-PDSO-G6
针数：	6
制造商包装代码：	6LD, SUPERSOT6, JEDEC MO-193, 1.6MM WIDE
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8541.29.00.95
风险等级：	5.31
配置：	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：	60 V
最大漏极电流 (Abs) (ID)：	4.3 A
最大漏极电流 (ID)：	4.3 A
最大漏源导通电阻：	0.055 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR
JESD-30 代码：	R-PDSO-G6
JESD-609代码：	e3
湿度敏感等级：	1
元件数量：	1
端子数量：	6
工作模式：	ENHANCEMENT MODE
最高工作温度：	150 °C
封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED
极性/信道类型：	N-CHANNEL
最大功率耗散 (Abs)：	1.6 W
认证状态：	Not Qualified
子类别：	FET General Purpose Power
表面贴装：	YES
端子面层：	Matte Tin (Sn)
端子形式：	GULL WING
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
晶体管应用：	SWITCHING
晶体管元件材料：	SILICON
Base Number Matches：	1

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