FDD8878现货热卖使用介绍供应商报价哪里找芯片批发报价-中国IC网-芯三七

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产品型号FDD8878的概述

芯片FDD8878的概述 FDD8878是一款高集成度的射频功率放大器，主要用于手机和其他移动通信设备。该芯片设计用于支持多个频段，包括GSM、WCDMA和LTE等，为移动设备提供强大的信号发射能力。FDD8878的使用能够显著增强设备的传输效果，改善语音与数据连接的稳定性。该芯片在微型化设计的基础上，提供出色的性能，成为当前市场上一款极具竞争力的产品。FDD8878致力于满足日益增长的无线通信需求，帮助设备制造商在体积、功耗与性能之间取得平衡。芯片FDD8878的详细参数 FDD8878的参数设计考虑了多种行业标准，具体参数如下： - 供电电压: 3.0V至4.5V - 输出功率: 10W（典型值） - 工作频率: 850MHz至2100MHz - 增益: 20dB - 效率: 高达45% - 线性度: 良好的互调性能 - 温度范围: -40°C至+85°C - 封装类型: QF...

产品型号FDD8878的Datasheet PDF文件预览

January 2005

FDD8878 / FDU8878

N-Channel PowerTrench^®MOSFET

30V, 40A, 15mΩ

Features

General Description

r_DS(ON)= 15mΩ, V_GS= 10V, I_D= 35A

This N-Channel MOSFET has been designed specifically to

improve the overall efficiency of DC/DC converters using

either synchronous or conventional switching PWM

controllers. It has been optimized for low gate charge, low

r_DS(ON)= 18.5mΩ, V_GS= 4.5V, I_D= 35A

High performance trench technology for extremely low

r_DS(ON)

_DS(ON)and fast switching speed.

Low gate charge

High power and current handling capability

Applications

DC/DC converters

I-PAK

(TO-251AA)

D-PAK

TO-252

(TO-252)

G D S

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

Absolute Maximum Ratings T_C= 25°C unless otherwise noted

Symbol

V_DSS

V_GS

Parameter

Ratings

Units

Drain to Source Voltage

Gate to Source Voltage

Drain Current

±20

Continuous (T_C= 25^oC, V_GS= 10V) (Note 1)

Continuous (T_C= 25^oC, V_GS= 4.5V) (Note 1)

Continuous (T_amb= 25^oC, V_GS= 10V, with R_θJA= 52^oC/W)

Pulsed

I_D

Figure 4

E_AS

Single Pulse Avalanche Energy (Note 2)

Power dissipation

Derate above 25^oC

P_D

0.27

W/^oC

^oC

T_J, T_STG

Operating and Storage Temperature

-55 to 175

Thermal Characteristics

R_θJC

R_θJA

Thermal Resistance Junction to Case TO-252, TO-251

3.75

100

^oC/W

Thermal Resistance Junction to Ambient TO-252, TO-251

Thermal Resistance Junction to Ambient TO-252, 1in²copper pad area

Package Marking and Ordering Information

Device Marking

FDD8878

Device

FDD8878

Package

TO-252AA

TO-251AA

TO-252AA

TO-251AA

Reel Size

13”

Tape Width

Quantity

12mm

N/A

2500 units

75 units

FDU8878

Tube

13”

FDD8878

FDD8878_NL (Note 3)

FDU8878_NL (Note 3)

12mm

N/A

2500 units

75 units

FDU8878

Tube

Electrical Characteristics ^T_C= 25°C unless otherwise noted

Symbol

Parameter

Test Conditions

Min

Typ

Max

Units

Off Characteristics

B_VDSS

Drain to Source Breakdown Voltage

Zero Gate Voltage Drain Current

Gate to Source Leakage Current

I_D= 250µA, V_GS= 0V

_DS= 24V

I_DSS

µA

V_GS= 0V

T_C= 150^oC

250

±100

I_GSS

V_GS= ±20V

On Characteristics

V_GS(TH)

Gate to Source Threshold Voltage

V_GS= V_DS, I_D= 250µA

1.2

2.5

I_D= 35A, V_GS= 10V

0.011 0.015

0.014 0.0185

_D= 35A, V_GS= 4.5V

r_DS(ON)

Drain to Source On Resistance

Ω

I_D= 35A, V_GS= 10V,

T_J= 175^oC

0.018 0.024

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

Dynamic Characteristics

C_ISS

C_OSS

C_RSS

R_G

Input Capacitance

880

195

110

3.1

Ω

V_DS= 15V, V_GS= 0V,

f = 1MHz

Output Capacitance

Reverse Transfer Capacitance

Gate Resistance

V_GS= 0.5V, f = 1MHz

V_GS= 0V to 10V

V_GS= 0V to 5V

Q_g(TOT)

Q_g(5)

Q_g(TH)

Q_gs

Total Gate Charge at 10V

Total Gate Charge at 5V

Threshold Gate Charge

Gate to Source Gate Charge

Gate Charge Threshold to Plateau

Gate to Drain “Miller” Charge

1.3

V_DD= 15V

_D= 35A

I_g= 1.0mA

V_GS= 0V to 1V

0.9

2.6

1.7

4.5

Q_gs2

Q_gd

Switching Characteristics (V_GS= 10V)

t_ON

t_d(ON)

t_r

Turn-On Time

Turn-On Delay Time

Rise Time

129

_DD= 15V, I_D= 35A

_GS= 4.5V, R_GS= 16Ω

t_d(OFF)

t_f

Turn-Off Delay Time

Fall Time

t_OFF

Turn-Off Time

Drain-Source Diode Characteristics

_SD= 35A

1.25

1.0

V_SD

Source to Drain Diode Voltage

I_SD= 3.2A

t_rr

Reverse Recovery Time

I_SD= 35A, dI_SD/dt = 100A/µs

Q_RR

Reverse Recovered Charge

Notes:

1: Package current limitation is 35A.

2: Starting T = 25°C, L = 65uH, I = 28A, V = 27V, V = 10V.

3: FDD8878_NL / FDU8878_NL is lead free product.

FDD8878_NL / FDU8878_NL marking will appear on the reel label.

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

Typical Characteristics T_C= 25°C unless otherwise noted

1.2

CURRENT LIMITED

BY PACKAGE

1.0

0.8

= 10V

0.6

= 4.5V

0.4

0.2

150

100

175

125

175

100

125

150

, CASE TEMPERATURE ( C)

Figure 1. Normalized Power Dissipation vs Case

Temperature

Figure 2. Maximum Continuous Drain Current vs

Case Temperature

DUTY CYCLE - DESCENDING ORDER

0.5

0.2

0.1

0.05

0.02

0.01

0.1

NOTES:

DUTY FACTOR: D = t /t

SINGLE PULSE

0.01

PEAK T = P x Z

x R

+ T

θJC

θJC C

-5

-4

-3

-2

-1

t, RECTANGULAR PULSE DURATION (s)

Figure 3. Normalized Maximum Transient Thermal Impedance

500

= 25 C

TRANSCONDUCTANCE

MAY LIMIT CURRENT

IN THIS REGION

FOR TEMPERATURES

ABOVE 25 C DERATE PEAK

CURRENT AS FOLLOWS:

175 - T

150

I = I

= 4.5V

100

= 10V

-5

-4

-3

-2

-1

t, PULSE WIDTH (s)

Figure 4. Peak Current Capability

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

Typical Characteristics T_C= 25°C unless otherwise noted

1000

100

500

If R = 0

= (L)(I )/(1.3*RATED BV

OPERATION IN THIS

AREA MAY BE

- V

)

DSS

If R ≠ 0

= (L/R)ln[(I *R)/(1.3*RATED BV

LIMITED BY r

DS(ON)

- V ) +1]

DSS

10µs

100

100µs

STARTING T = 25 C

STARTING T = 150 C

1ms

10ms

SINGLE PULSE

= MAX RATED

= 25 C

0.01

0.1

, DRAIN TO SOURCE VOLTAGE (V)

0.1

t , TIME IN AVALANCHE (ms)

NOTE: Refer to Fairchild Application Notes AN7514 and AN7515

Figure 6. Unclamped Inductive Switching

Capability

Figure 5. Forward Bias Safe Operating Area

PULSE DURATION = 80µs

= 5V

DUTY CYCLE = 0.5% MAX

= 15V

= 10V

= 4V

= 25 C

= 3V

= 25 C

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

= 175 C

= -55 C

0.25

0.5

0.75

1.0

1.25

1.5

2.0

2.5

3.0

3.5

4.0

, GATE TO SOURCE VOLTAGE (V)

, DRAIN TO SOURCE VOLTAGE (V)

Figure 7. Transfer Characteristics

Figure 8. Saturation Characteristics

1.8

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

PULSE DURATION = 80µs

DUTY CYCLE = 0.5% MAX

= 35A

1.6

1.4

1.2

1.0

0.8

0.6

= 1A

= 10V, I = 35A

-80

-40

120

160

200

, GATE TO SOURCE VOLTAGE (V)

T , JUNCTION TEMPERATURE ( C)

Figure 9. Drain to Source On Resistance vs Gate

Voltage and Drain Current

Figure 10. Normalized Drain to Source On

Resistance vs Junction Temperature

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

Typical Characteristics T_C= 25°C unless otherwise noted

1.2

1.0

0.8

0.6

0.4

1.10

1.05

1.00

0.95

0.90

= 250µA

= V , I = 250µA

DS D

-80

-40

120

160

200

-80

-40

120

160

200

T , JUNCTION TEMPERATURE ( C)

Figure 11. Normalized Gate Threshold Voltage vs

Junction Temperature

Figure 12. Normalized Drain to Source

Breakdown Voltage vs Junction Temperature

2000

= 15V

= C + C

GS GD

ISS

1000

+ C

OSS

DS GD

= C

RSS

WAVEFORMS IN

DESCENDING ORDER:

100

= 35A

= 1A

= 0V, f = 1MHz

Q , GATE CHARGE (nC)

0.1

, DRAIN TO SOURCE VOLTAGE (V)

Figure 13. Capacitance vs Drain to Source

Voltage

Figure 14. Gate Charge Waveforms for Constant

Gate Current

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

Test Circuits and Waveforms

DSS

VARY t TO OBTAIN

REQUIRED PEAK I

DUT

0.01Ω

Figure 15. Unclamped Energy Test Circuit

Figure 16. Unclamped Energy Waveforms

g(TOT)

= 10V

g(5)

gs2

= 5V

DUT

= 1V

g(REF)

g(TH)

g(REF)

Figure 17. Gate Charge Test Circuit

Figure 18. Gate Charge Waveforms

OFF

d(OFF)

d(ON)

90%

10%

DUT

90%

50%

PULSE WIDTH

10%

Figure 19. Switching Time Test Circuit

Figure 20. Switching Time Waveforms

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

Thermal Resistance vs. Mounting Pad Area

The maximum rated junction temperature, T_JM, and the

125

thermal resistance of the heat dissipating path determines

the maximum allowable device power dissipation, P_DM, in an

= 33.32+ 23.84/(0.268+Area) EQ.2

= 33.32+ 154/(1.73+Area) EQ.3

θJA

application.

Therefore the application’s ambient

θJA

100

temperature, T_A(^oC), and thermal resistance R_θJA(^oC/W)

must be reviewed to ensure that T_JMis never exceeded.

Equation 1 mathematically represents the relationship and

serves as the basis for establishing the rating of the part.

– T )

(EQ. 1)

= -----------------------------

R_{θ JA}

In using surface mount devices such as the TO-252

package, the environment in which it is applied will have a

significant influence on the part’s current and maximum

power dissipation ratings. Precise determination of P_DMis

complex and influenced by many factors:

0.01

(0.0645)

0.1

(0.645)

(6.45)

(64.5)

AREA, TOP COPPER AREA in (cm )

Figure 21. Thermal Resistance vs Mounting

Pad Area

1. Mounting pad area onto which the device is attached and

whether there is copper on one side or both sides of the

board.

2. The number of copper layers and the thickness of the

board.

3. The use of external heat sinks.

4. The use of thermal vias.

5. Air flow and board orientation.

6. For non steady state applications, the pulse width, the

duty cycle and the transient thermal response of the part,

the board and the environment they are in.

Fairchild provides thermal information to assist the

designer’s preliminary application evaluation. Figure 21

defines the R_θJAfor the device as a function of the top

copper (component side) area. This is for a horizontally

positioned FR-4 board with 1oz copper after 1000 seconds

of steady state power with no air flow. This graph provides

the necessary information for calculation of the steady state

junction temperature or power dissipation. Pulse

applications can be evaluated using the Fairchild device

Spice thermal model or manually utilizing the normalized

maximum transient thermal impedance curve.

Thermal resistances corresponding to other copper areas

can be obtained from Figure 21 or by calculation using

Equation 2 or 3. Equation 2 is used for copper area defined

in inches square and equation 3 is for area in centimeters

square. The area, in square inches or square centimeters is

the top copper area including the gate and source pads.

23.84

(0.268 + Area)

= 33.32 + ------------------------------------

(EQ. 2)

θ JA

Area in Inches Squared

154

= 33.32 + ---------------------------------

(EQ. 3)

(1.73 + Area)

Area in Centimeters Squared

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

PSPICE Electrical Model

.SUBCKT FDD8878 2 1 3 ; rev February 2004

Ca 12 8 8.6e-10

Cb 15 14 7.2e-10

Cin 6 8 8e-10

LDRAIN

DPLCAP

DRAIN

Dbody 7 5 DbodyMOD

Dbreak 5 11 DbreakMOD

Dplcap 10 5 DplcapMOD

RLDRAIN

RSLC1

DBREAK

RSLC2

ESLC

Ebreak 11 7 17 18 32.97

Eds 14 8 5 8 1

Egs 13 8 6 8 1

Esg 6 10 6 8 1

Evthres 6 21 19 8 1

DBODY

RDRAIN

EBREAK 18

ESG

EVTHRES

MWEAK

Evtemp 20 6 18 22 1

LGATE

EVTEMP

RGATE

GATE

MMED

It 8 17 1

MSTRO

RLGATE

Lgate 1 9 5.4e-9

Ldrain 2 5 1.0e-9

Lsource 3 7 2e-9

LSOURCE

CIN

SOURCE

RSOURCE

RLSOURCE

RLgate 1 9 54

RLdrain 2 5 10

RLsource 3 7 20

S1A

S2A

RBREAK

RVTEMP

S1B

S2B

Mmed 16 6 8 8 MmedMOD

Mstro 16 6 8 8 MstroMOD

Mweak 16 21 8 8 MweakMOD

VBAT

EGS

EDS

Rbreak 17 18 RbreakMOD 1

Rdrain 50 16 RdrainMOD 6.9e-3

Rgate 9 20 3.1

RVTHRES

RSLC1 5 51 RSLCMOD 1e-6

RSLC2 5 50 1e3

Rsource 8 7 RsourceMOD 2.7e-3

Rvthres 22 8 RvthresMOD 1

Rvtemp 18 19 RvtempMOD 1

S1a 6 12 13 8 S1AMOD

S1b 13 12 13 8 S1BMOD

S2a 6 15 14 13 S2AMOD

S2b 13 15 14 13 S2BMOD

Vbat 22 19 DC 1

ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*125),5))}

.MODEL DbodyMOD D (IS=2.6E-12 IKF=8 N=1.01 RS=6.4e-3 TRS1=8e-4 TRS2=2e-7

+ CJO=3.4e-10 M=0.53 TT=1e-17 XTI=2)

.MODEL DbreakMOD D (RS=1.4 TRS1=1e-3 TRS2=-5e-6)

.MODEL DplcapMOD D (CJO=3.4e-10 IS=1e-30 N=10 M=0.39)

.MODEL MmedMOD NMOS (VTO=1.75 KP=7 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=3.1 T_ABS=25)

.MODEL MstroMOD NMOS (VTO=2.2 KP=100 IS=1e-30 N=10 TOX=1 L=1u W=1u T_ABS=25)

.MODEL MweakMOD NMOS (VTO=1.45 KP=0.03 IS=1e-30 N=10 TOX=1 L=1u W=1u RG=31 RS=0.1 T_ABS=25)

.MODEL RbreakMOD RES (TC1=8.3e-4 TC2=-8e-7)

.MODEL RdrainMOD RES (TC1=1e-4 TC2=7.5e-6)

.MODEL RSLCMOD RES (TC1=9e-4 TC2=1e-6)

.MODEL RsourceMOD RES (TC1=1.3e-2 TC2=2e-6)

.MODEL RvthresMOD RES (TC1=-1.7e-3 TC2=-8e-6)

.MODEL RvtempMOD RES (TC1=-2.2e-3 TC2=2e-7)

.MODEL S1AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-4.5 VOFF=-3.5)

.MODEL S1BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-3.5 VOFF=-4.5)

.MODEL S2AMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-2 VOFF=-1)

.MODEL S2BMOD VSWITCH (RON=1e-5 ROFF=0.1 VON=-1 VOFF=-2)

.ENDS

Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global

Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank

Wheatley.

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

SABER Electrical Model

rev February 2004

template FDD8878 n2,n1,n3 =m_temp

electrical n2,n1,n3

number m_temp=25

{

var i iscl

dp..model dbodymod = (isl=2.6e-12,ikf=8,nl=1.01,rs=6.4e-3,trs1=8e-4,trs2=2e-7,cjo=3.4e-10,m=0.53,tt=1e-17,xti=2)

dp..model dbreakmod = (rs=1.4,trs1=1e-3,trs2=-5e-6)

dp..model dplcapmod = (cjo=3.4e-10,isl=10e-30,nl=10,m=0.39)

m..model mmedmod = (type=_n,vto=1.75,kp=7,is=1e-30, tox=1)

m..model mstrongmod = (type=_n,vto=2.2,kp=100,is=1e-30, tox=1)

m..model mweakmod = (type=_n,vto=1.45,kp=0.03,is=1e-30, tox=1,rs=0.1)

LDRAIN

sw_vcsp..model s1amod = (ron=1e-5,roff=0.1,von=-4.5,voff=-3.5)

sw_vcsp..model s1bmod = (ron=1e-5,roff=0.1,von=-3.5,voff=-4.5)

sw_vcsp..model s2amod = (ron=1e-5,roff=0.1,von=-2,voff=-1)

sw_vcsp..model s2bmod = (ron=1e-5,roff=0.1,von=-1,voff=-2)

c.ca n12 n8 = 8.6e-10

c.cb n15 n14 = 7.2e-10

c.cin n6 n8 = 8e-10

DPLCAP

DRAIN

RLDRAIN

RSLC1

RSLC2

ISCL

DBREAK

dp.dbody n7 n5 = model=dbodymod

dp.dbreak n5 n11 = model=dbreakmod

dp.dplcap n10 n5 = model=dplcapmod

RDRAIN

ESG

DBODY

EVTHRES

MWEAK

LGATE

EVTEMP

spe.ebreak n11 n7 n17 n18 = 32.97

RGATE

GATE

EBREAK

spe.eds n14 n8 n5 n8 = 1

spe.egs n13 n8 n6 n8 = 1

spe.esg n6 n10 n6 n8 = 1

spe.evthres n6 n21 n19 n8 = 1

spe.evtemp n20 n6 n18 n22 = 1

MMED

MSTRO

RLGATE

LSOURCE

CIN

SOURCE

RSOURCE

RLSOURCE

i.it n8 n17 = 1

S1A

S2A

RBREAK

l.lgate n1 n9 = 5.4e-9

l.ldrain n2 n5 = 1.0e-9

l.lsource n3 n7 = 2e-9

RVTEMP

S1B

S2B

res.rlgate n1 n9 = 54

res.rldrain n2 n5 = 10

res.rlsource n3 n7 = 20

VBAT

EGS

EDS

m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u, temp=m_temp

m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u, temp=m_temp

m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u, temp=m_temp

RVTHRES

res.rbreak n17 n18 = 1, tc1=8.3e-4,tc2=-8e-7

res.rdrain n50 n16 = 6.9e-3, tc1=1e-4,tc2=7.5e-6

res.rgate n9 n20 = 3.1

res.rslc1 n5 n51 = 1e-6, tc1=9e-4,tc2=1e-6

res.rslc2 n5 n50 = 1e3

res.rsource n8 n7 = 2.7e-3, tc1=1.3e-2,tc2=2e-6

res.rvthres n22 n8 = 1, tc1=-1.7e-3,tc2=-8e-6

res.rvtemp n18 n19 = 1, tc1=-2.2e-3,tc2=2e-7

sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod

sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod

sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod

sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod

v.vbat n22 n19 = dc=1

equations {

i (n51->n50) +=iscl

iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/125))** 5))

}

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

PSPICE Thermal Model

JUNCTION

REV 23 February 2004

FDD8878T

CTHERM1 TH 6 3.5e-4

CTHERM2 6 5 5e-4

CTHERM3 5 4 2.5e-3

CTHERM4 4 3 2.7e-3

CTHERM5 3 2 5e-3

CTHERM6 2 TL 1e-2

RTHERM1

RTHERM2

RTHERM3

RTHERM4

RTHERM5

RTHERM6

CTHERM1

RTHERM1 TH 6 2.9e-1

RTHERM2 6 5 3.5e-1

RTHERM3 5 4 4.5e-1

RTHERM4 4 3 5.2e-1

RTHERM5 3 2 6.9e-1

RTHERM6 2 TL 7e-1

CTHERM2

CTHERM3

CTHERM4

CTHERM5

CTHERM6

SABER Thermal Model

SABER thermal model FDD8878T

template thermal_model th tl

thermal_c th, tl

{

ctherm.ctherm1 th 6 =3.5e-4

ctherm.ctherm2 6 5 =5e-4

ctherm.ctherm3 5 4 =2.5e-3

ctherm.ctherm4 4 3 =2.7e-3

ctherm.ctherm5 3 2 =5e-3

ctherm.ctherm6 2 tl =1e-2

rtherm.rtherm1 th 6 =2.9e-1

rtherm.rtherm2 6 5 =3.5e-1

rtherm.rtherm3 5 4 =4.5e-1

rtherm.rtherm4 4 3 =5.2e-1

rtherm.rtherm5 3 2 =6.9e-1

rtherm.rtherm6 2 tl =7e-1

}

CASE

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not

intended to be an exhaustive list of all such trademarks.

ACEx™

FACT Quiet Series™ ImpliedDisconnect™ POP™

Stealth™

ActiveArray™

Bottomless™

CoolFET™

CROSSVOLT™ FRFET™

DOME™

FAST

FASTr™

FPS™

IntelliMAX™

ISOPLANAR™

LittleFET™

Power247™

PowerEdge™

PowerSaver™

SuperFET™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

SyncFET™

MICROCOUPLER™ PowerTrench

GlobalOptoisolator™ MicroFET™

QFET

EcoSPARK™

GTO™

MicroPak™

MICROWIRE™

MSX™

MSXPro™

OCX™

QS™

TinyLogic

E CMOS™

HiSeC™

QT Optoelectronics™ TINYOPTO™

EnSigna™

FACT™

I C™

Quiet Series™

RapidConfigure™

RapidConnect™

µSerDes™

SILENT SWITCHER

SMART START™

SPM™

TruTranslation™

UHC™

i-Lo™

UltraFET

Across the board. Around the world.™ OCXPro™

The Power Franchise

Programmable Active Droop™

UniFET™

VCX™

OPTOLOGIC

OPTOPLANAR™

PACMAN™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;

NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR

CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body,

or (b) support or sustain life, or (c) whose failure to perform

when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

result in significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or In

Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

www.fairchildsemi.com

FDD8878 / FDU8878 Rev. A3

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FDD8878产品参数

型号:	FDD8878
Brand Name：	ON Semiconductor
是否无铅：	不含铅
生命周期：	Active
包装说明：	SMALL OUTLINE, R-PSSO-G2
制造商包装代码：	369AS
Reach Compliance Code：	not_compliant
ECCN代码：	EAR99
HTS代码：	8541.29.00.95
风险等级：	0.64
雪崩能效等级（Eas）：	25 mJ
外壳连接：	DRAIN
配置：	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：	30 V
最大漏极电流 (Abs) (ID)：	11 A
最大漏极电流 (ID)：	35 A
最大漏源导通电阻：	0.0185 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码：	TO-252AA
JESD-30 代码：	R-PSSO-G2
JESD-609代码：	e3
湿度敏感等级：	1
元件数量：	1
端子数量：	2
工作模式：	ENHANCEMENT MODE
最高工作温度：	175 °C
封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED
极性/信道类型：	N-CHANNEL
最大功率耗散 (Abs)：	40 W
认证状态：	Not Qualified
子类别：	FET General Purpose Power
表面贴装：	YES
端子面层：	Tin (Sn)
端子形式：	GULL WING
端子位置：	SINGLE
处于峰值回流温度下的最长时间：	NOT SPECIFIED
晶体管应用：	SWITCHING
晶体管元件材料：	SILICON
Base Number Matches：	1

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