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  • FDMC7678图
  • 集好芯城

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  • FDMC7678 现货库存
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  • FDMC7678
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产品型号FDMC7678的概述

芯片FDMC7678的概述 在现代电子工程中,功率MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)广泛应用于电源管理、高效能开关电路和驱动应用等领域。FDMC7678是一款由Fairchild Semiconductor(现为ON Semiconductor的一部分)推出的N沟道MOSFET,特别设计来满足高频率和高效率应用的要求。FDMC7678以其优良的电气性能和热管理特性,成为许多电子设计工程师首选的功率开关解决方案。 FDMC7678具有较低的导通电阻和短的开关时间,这使其非常适合用于DC-DC转换器、LED驱动、电机控制及其他需要高效功率转换的场合。此外,FDMC7678的出色热性能使其能在高温环境下稳定运行,进一步提高了其在功率电子应用中的可靠性。 芯片FDMC7678的详细参数 FDMC7678的详细技术参...

产品型号FDMC7678的Datasheet PDF文件预览

November 2013  
FDMC7678  
N-Channel Power Trench® MOSFET  
30 V, 19.5 A, 5.3 mΩ  
Features  
General Description  
„ Max rDS(on) = 5.3 mΩ at VGS = 10 V, ID = 17.5 A  
„ Max rDS(on) = 6.8 mΩ at VGS = 4.5 V, ID = 15.0 A  
„ High performance technology for extremely low rDS(on)  
„ Termination is Lead-free and RoHS Compliant  
This N-Channel MOSFET is produced using Fairchild  
Semiconductor’s advanced Power Trench® process that has  
been especially tailored to minimize the on-state resistance. This  
device is well suited for Power Management and load switching  
applications common in Notebook Computers and Portable  
Battery Packs.  
Application  
„ DC - DC Buck Converters  
„ Notebook battery power management  
„ Load switch in Notebook  
Bottom  
D D  
Top  
7
D
D
8
2
6
5
4
3
2
1
G
S
S
S
D
D
D
D
5
6
7
8
G S  
S
Pin 1  
S
1
3
4
MLP 3.3x3.3  
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted  
Symbol  
VDS  
VGS  
Parameter  
Ratings  
Units  
Drain to Source Voltage  
Gate to Source Voltage  
30  
±20  
V
V
(Note 3)  
Drain Current -Continuous (Package limited) TC = 25 °C  
19.5  
63  
Drain Current -Continuous (Silicon limited)  
-Continuous  
TC = 25 °C  
ID  
A
TA = 25 °C  
(Note 1a)  
(Note 4)  
17.5  
70  
-Pulsed  
EAS  
Single Pulse Avalanche Energy  
Power Dissipation  
54  
mJ  
W
TC = 25 °C  
TA = 25 °C  
31  
PD  
Power Dissipation  
(Note 1a)  
2.3  
TJ, TSTG  
Operating and Storage Junction Temperature Range  
-55 to +150  
°C  
Thermal Characteristics  
RθJC  
RθJA  
Thermal Resistance, Junction to Case  
Thermal Resistance, Junction to Ambient  
4.0  
53  
°C/W  
(Note 1a)  
Package Marking and Ordering Information  
Device Marking  
Device  
Package  
Reel Size  
13 ’’  
Tape Width  
12 mm  
Quantity  
FDMC7678  
FDMC7678  
MLP 3.3x3.3  
3000 units  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev. C2  
www.fairchildsemi.com  
1
Electrical Characteristics TJ = 25 °C unless otherwise noted  
Symbol  
Parameter  
Test Conditions  
Min  
Typ  
Max  
Units  
Off Characteristics  
BVDSS  
Drain to Source Breakdown Voltage  
ID = 250 μA, VGS = 0 V  
30  
V
ΔBVDSS  
ΔTJ  
Breakdown Voltage Temperature  
Coefficient  
I
D = 250 μA, referenced to 25 °C  
21  
mV/°C  
IDSS  
IGSS  
Zero Gate Voltage Drain Current  
VDS = 24 V, VGS = 0 V  
1
μA  
Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V  
100  
nA  
On Characteristics  
VGS(th)  
Gate to Source Threshold Voltage  
VGS = VDS, ID = 250 μA  
D = 250 μA, referenced to 25 °C  
VGS = 10 V, ID = 17.5 A  
GS = 4.5 V, ID = 15.0 A  
1.2  
1.5  
-5  
3.0  
V
ΔVGS(th)  
ΔTJ  
Gate to Source Threshold Voltage  
Temperature Coefficient  
I
mV/°C  
4.2  
5.1  
5.3  
6.8  
V
rDS(on)  
Static Drain to Source On Resistance  
Forward Transconductance  
mΩ  
VGS = 10 V, ID = 17.5 A  
TJ = 125 °C  
5.7  
90  
7.2  
gFS  
VDD = 5 V, ID = 17.5 A  
S
Dynamic Characteristics  
Ciss  
Coss  
Crss  
Rg  
Input Capacitance  
1810  
620  
75  
2410  
820  
110  
2.5  
pF  
pF  
pF  
Ω
VDS = 15 V, VGS = 0 V  
f = 1MHz  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Resistance  
0.7  
Switching Characteristics  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
Rise Time  
10  
4
19  
10  
41  
10  
39  
19  
ns  
ns  
VDD = 15 V, ID = 17.5 A  
V
GS = 10 V, RGEN = 6 Ω  
Turn-Off Delay Time  
Fall Time  
26  
3
ns  
ns  
Total Gate Charge  
Total Gate Charge  
Gate to Source Charge  
Gate to Drain “Miller” Charge  
VGS = 0 V to 10 V  
VGS = 0 V to 4.5 V  
28  
14  
4.4  
3.9  
nC  
nC  
nC  
nC  
Qg(TOT)  
VDD = 15 V  
D = 17.5 A  
I
Qgs  
Qgd  
Drain-Source Diode Characteristics  
V
GS = 0 V, IS = 1.9 A  
(Note 2)  
(Note 2)  
0.7  
0.8  
30  
1.2  
1.2  
49  
VSD  
Source to Drain Diode Forward Voltage  
V
VGS = 0 V, IS = 17.5 A  
trr  
Reverse Recovery Time  
ns  
IF = 17.5 A, di/dt = 100 A/μs  
Qrr  
Reverse Recovery Charge  
13  
23  
nC  
NOTES:  
2
1. R  
is determined with the device mounted on a 1 in pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. R  
is guaranteed by design while R is determined by  
θCA  
θJA  
θJC  
the user's board design.  
b.125 °C/W when mounted on  
a minimum pad of 2 oz copper  
a. 53 °C/W when mounted on  
a 1 in pad of 2 oz copper  
2
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.  
3. As an N-ch device, the negative V  
rating is for low duty cycle pulse occurence only. No continuous rating is implied.  
o
GS  
4. E of 54 mJ is based on starting T = 25 C, L = 0.3 mH, I = 19 A, V = 27 V, V = 10 V.  
AS  
J
AS  
DD  
GS  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev. C2  
www.fairchildsemi.com  
2
Typical Characteristics TJ = 25°C unless otherwise noted  
70  
4
3
2
1
0
VGS = 10 V  
VGS = 6 V  
60  
VGS = 4.5 V  
50  
VGS = 3 V  
VGS = 3.5 V  
VGS = 3 V  
40  
30  
VGS = 3.5 V  
VGS = 4.5 V  
20  
VGS = 6 V  
VGS = 10 V  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
10  
0
0
10  
20  
30  
40  
50  
60  
70  
0.0  
0.5  
1.0  
1.5  
2.0  
ID, DRAIN CURRENT (A)  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Figure2. N o r m a l i z e d O n - R e s i s ta n c e  
vs Drain Current and Gate Voltage  
Figure 1. On Region Characteristics  
1.5  
1.4  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
12  
PULSE DURATION = 80 μs  
DUTY CYCLE = 0.5% MAX  
ID = 17.5 A  
VGS = 10 V  
10  
8
ID = 17.5 A  
TJ = 125 o  
C
6
4
TJ = 25 o  
C
2
-75 -50 -25  
0
25 50 75 100 125 150  
2
4
6
8
10  
TJ, JUNCTION TEMPERATURE (oC)  
VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 3. Normalized On Resistance  
vs Junction Temperature  
Figure4. On-Resistance vs Gate to  
Source Voltage  
70  
100  
VGS = 0 V  
PULSE DURATION = 80 μs  
60  
50  
40  
30  
20  
10  
0
DUTY CYCLE = 0.5% MAX  
TJ = 150 o  
C
10  
1
VDS = 5 V  
TJ = 25 o  
C
TJ = 150 o  
C
TJ = 25 o  
C
TJ = -55 o  
C
0.1  
0.01  
TJ = -55 o  
C
0.0  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
VSD, BODY DIODE FORWARD VOLTAGE (V)  
VGS, GATE TO SOURCE VOLTAGE (V)  
Figure 5. Transfer Characteristics  
Figure6. Source to Drain Diode  
Forward Voltage vs Source Current  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev. C2  
www.fairchildsemi.com  
3
Typical Characteristics TJ = 25°C unless otherwise noted  
10  
3000  
1000  
ID = 17.5 A  
VDD = 10 V  
Ciss  
8
VDD = 15 V  
6
Coss  
VDD = 20 V  
4
100  
30  
2
0
f = 1 MHz  
= 0 V  
Crss  
V
GS  
0
5
10  
15  
20  
25  
30  
0.1  
1
10  
30  
VDS, DRAIN TO SOURCE VOLTAGE (V)  
Qg, GATE CHARGE (nC)  
Figure 7. Gate Charge Characteristics  
Figure8. C a p a c i t a n c e v s D r a i n  
to Source Voltage  
70  
60  
50  
40  
30  
20  
10  
0
30  
R
θJC = 4.0 oC/W  
TJ = 25 oC  
VGS = 10 V  
10  
VGS = 4.5 V  
TJ = 100 oC  
TJ = 125 o  
C
Limited by Package  
1
0.001  
0.01  
0.1  
1
10  
100  
25  
50  
75  
100  
125  
150  
TC, CASE TEMPERATURE (oC)  
tAV, TIME IN AVALANCHE (ms)  
Figure9. U n c l a m p e d I n d u c t i v e  
Switching Capability  
Figure10. Maximum Continuous Drain  
Current vs Case Temperature  
100  
10  
2000  
1000  
100  
10  
100 μs  
1 ms  
10 ms  
100 ms  
1 s  
THIS AREA IS  
1
LIMITED BY r  
DS(on)  
SINGLE PULSE  
TJ = MAX RATED  
RθJA = 125 oC/W  
0.1  
0.01  
SINGLE PULSE  
RθJA = 125 oC/W  
TA = 25 oC  
10 s  
DC  
T
A = 25 oC  
1
0.5  
10-4  
10-3  
10-2  
t, PULSE WIDTH (sec)  
10-1  
1
10  
0.01  
0.1  
1
10  
100200  
100 1000  
VDS, DRAIN to SOURCE VOLTAGE (V)  
Figure 11. Forward Bias Safe  
Operating Area  
Figure12. Single Pulse Maximum  
Power Dissipation  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev. C2  
www.fairchildsemi.com  
4
Typical Characteristics TJ = 25°C unless otherwise noted  
2
DUTY CYCLE-DESCENDING ORDER  
1
D = 0.5  
0.2  
0.1  
0.1  
P
DM  
0.05  
0.02  
0.01  
t
1
0.01  
t
2
SINGLE PULSE  
NOTES:  
DUTY FACTOR: D = t /t  
θJA = 125 oC/W  
1
2
R
PEAK T = P  
J
x Z  
x R  
+ T  
DM  
θJA  
θJA A  
0.001  
0.0005  
10-4  
10-3  
10-2  
10-1  
t, RECTANGULAR PULSE DURATION (sec)  
1
10  
100  
1000  
Figure 13. Junction-to-Ambient Transient Thermal Response Curve  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev. C2  
www.fairchildsemi.com  
5
Dimensional Outline and Pad Layout  
(3.40)  
2.37  
0.10 C  
A
ꢀꢁꢀꢂ“ꢂꢁꢃꢂ  
2X  
8
5
B
0.45(4X)  
(0.40)  
2.15  
(1.70)  
ꢀꢁꢀꢂ“ꢂꢁꢃꢂ  
KEEP OUT  
AREA  
(0.65)  
0.70(4X)  
1
4
PIN1  
IDENT  
0.42(8X)  
0.65  
0.10 C  
TOP VIEW  
1.95  
2X  
A
0.8MAX  
ꢃꢃƒ0$;  
0.10 C  
(0.20)  
0.08 C  
0.05  
0.00  
RECOMMENDED LAND PATTERN  
SIDE VIEW  
C
NOTES:  
SEATING  
PLANE  
A.EXCEPT AS NOTED, PACKAGE CONFORMS TO  
JEDEC REGISTRATION MO-240 VARIATION BA..  
B.DIMENSIONS ARE IN MILLIMETERS.  
2.27+0.05  
4
C.DIMENSIONS AND TOLERANCES PER  
ASME Y14.5M,1994.  
D.SEATING PLANE IS DEFINED BY TERMINAL TIPS ONLY  
E.BODY DIMENSIONS DO NOT INCLUDE MOLD FLASH  
PROTRUSIONS NOR GATEBURRS.  
1
0.45+0.05  
(4X)  
(0.40)  
F.FLANGE DIMENSIONS INCLUDE INTERTERMINAL FLASH  
OR PROTRUSION. INTERTERMINAL FLASH OR  
PROTRUSION SHALL NOT EXCEED 0.25MM PER SIDE.  
G.IT IS RECOMMENDED TO HAVE NO TRACES OR VIA  
WITHIN THE KEEP OUT AREA.  
H.DRAWING FILENAME: MKT-MLP08Trev3.  
I.GENERAL RADII FOR ALL CORNERS SHALL BE 0.20MM  
MAX.  
(1.20)  
2.05+0.05  
A
0.45+0.05  
(3X)  
8
5
J.FAIRCHILD SEMICONDUCTOR.  
(8X)  
0.32+0.05  
0.65  
0.10  
0.05  
C A B  
1.95  
C
BOTTOM VIEW  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev. C2  
www.fairchildsemi.com  
6
TRADEMARKS  
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not  
intended to be an exhaustive list of all such trademarks.  
AccuPower™  
AX-CAP *  
BitSiC™  
Build it Now™  
CorePLUS™  
CorePOWER™  
CROSSVOLT™  
CTL™  
F-PFS™  
FRFET  
Sync-Lock™  
®*  
®
®
®
tm  
®
Global Power ResourceSM  
GreenBridge™  
Green FPS™  
PowerTrench  
PowerXS™  
Programmable Active Droop™  
QFET  
QS™  
Quiet Series™  
RapidConfigure™  
®
TinyBoost  
TinyBuck  
®
®
Green FPS™ e-Series™  
Gmax™  
GTO™  
TinyCalc™  
®
TinyLogic  
TINYOPTO™  
TinyPower™  
TinyPWM™  
TinyWire™  
TranSiC™  
TriFault Detect™  
Current Transfer Logic™  
IntelliMAX™  
®
DEUXPEED  
ISOPLANAR™  
Marking Small Speakers Sound Louder  
and Better™  
MegaBuck™  
MICROCOUPLER™  
MicroFET™  
MicroPak™  
MicroPak2™  
MillerDrive™  
MotionMax™  
Dual Cool™  
®
EcoSPARK  
Saving our world, 1mW/W/kW at a time™  
SignalWise™  
SmartMax™  
EfficentMax™  
ESBC™  
®
TRUECURRENT *  
μSerDes™  
SMART START™  
®
Solutions for Your Success™  
®
®
SPM  
Fairchild  
®
STEALTH™  
SuperFET  
SuperSOT™-3  
SuperSOT™-6  
SuperSOT™-8  
Fairchild Semiconductor  
FACT Quiet Series™  
®
®
UHC  
®
Ultra FRFET™  
UniFET™  
VCX™  
VisualMax™  
VoltagePlus™  
XS™  
®
mWSaver  
OptoHiT™  
OPTOLOGIC  
OPTOPLANAR  
FACT  
FAST  
®
®
FastvCore™  
FETBench™  
FPS™  
®
®
SupreMOS  
SyncFET™  
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.  
DISCLAIMER  
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE  
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY  
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.  
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY  
THEREIN, WHICH COVERS THESE PRODUCTS.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE  
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.  
As used here in:  
1. Life support devices or systems are devices or systems which, (a) are  
intended for surgical implant into the body or (b) support or sustain life,  
and (c) whose failure to perform when properly used in accordance with  
instructions for use provided in the labeling, can be reasonably  
expected to result in a significant injury of the user.  
2. A critical component in any component of a life support, device, or  
system whose failure to perform can be reasonably expected to cause  
the failure of the life support device or system, or to affect its safety or  
effectiveness.  
ANTI-COUNTERFEITING POLICY  
Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,  
www.Fairchildsemi.com, under Sales Support.  
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their  
parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed  
application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the  
proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild  
Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild  
Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of  
up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and  
warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is  
committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.  
PRODUCT STATUS DEFINITIONS  
Definition of Terms  
Datasheet Identification  
Product Status  
Definition  
Datasheet contains the design specifications for product development. Specifications  
may change in any manner without notice.  
Advance Information  
Formative / In Design  
Datasheet contains preliminary data; supplementary data will be published at a later  
date. Fairchild Semiconductor reserves the right to make changes at any time without  
notice to improve design.  
Preliminary  
First Production  
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to  
make changes at any time without notice to improve the design.  
No Identification Needed  
Obsolete  
Full Production  
Datasheet contains specifications on a product that is discontinued by Fairchild  
Semiconductor. The datasheet is for reference information only.  
Not In Production  
Rev. I66  
©2011 Fairchild Semiconductor Corporation  
FDMC7678 Rev. C2  
7
www.fairchildsemi.com  
配单直通车
FDMC7678产品参数
型号:FDMC7678
Brand Name:Fairchild Semiconductor
是否无铅: 不含铅
是否Rohs认证: 符合
生命周期:Transferred
IHS 制造商:FAIRCHILD SEMICONDUCTOR CORP
零件包装代码:MLP
包装说明:SMALL OUTLINE, S-PDSO-N5
针数:8
制造商包装代码:8LD, MLP, PUNCHED, DUAL, JEDEC MO-240, VARIATION BA, 3.3MM SQUARE
Reach Compliance Code:compliant
ECCN代码:EAR99
HTS代码:8541.29.00.95
风险等级:5.71
Samacsys Description:MOSFET PowerTrench N-Ch 30V 19.5A MLP
其他特性:ULTRA-LOW RESISTANCE
雪崩能效等级(Eas):54 mJ
外壳连接:DRAIN
配置:SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压:30 V
最大漏极电流 (Abs) (ID):19.5 A
最大漏极电流 (ID):17.5 A
最大漏源导通电阻:0.0053 Ω
FET 技术:METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码:MO-240BA
JESD-30 代码:S-PDSO-N5
JESD-609代码:e4
湿度敏感等级:1
元件数量:1
端子数量:5
工作模式:ENHANCEMENT MODE
最高工作温度:150 °C
封装主体材料:PLASTIC/EPOXY
封装形状:SQUARE
封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260
极性/信道类型:N-CHANNEL
最大功率耗散 (Abs):31 W
最大脉冲漏极电流 (IDM):70 A
认证状态:Not Qualified
子类别:FET General Purpose Power
表面贴装:YES
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD
端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED
晶体管应用:SWITCHING
晶体管元件材料:SILICON
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