FDP20N50各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

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产品型号FDP20N50的概述

FDP20N50芯片概述 FDP20N50是一种N沟道功率MOSFET，广泛应用于功率开关和放大器等电路中。该元件以其出色的电气特性和可靠的性能受到了工程师和设计师的青睐。FDP20N50属于Fairchild Semiconductor（现已被ON Semiconductor收购）生产的一系列高性能MOSFET中的一员，其设计主要用于高效能的功率管理、变换器以及其他相关应用。此芯片的主要特点在于其高电流承载能力和低导通电阻，使其在高电压和高电流的工作环境中表现出色。FDP20N50的额定电压为500伏特，能够处理较大的功率，适用于各种电源转换场合，如开关电源、逆变器以及电机驱动电路等。 FDP20N50详细参数 FDP20N50的主要参数如下： - 类型：N沟道MOSFET - 最大漏极到源极电压（V_DS）：500V - 最大持续漏极电流（I_D）：20A - 脉冲漏极电流（I_...

产品型号FDP20N50的Datasheet PDF文件预览

May 2006

UniFET

FDP20N50

500V N-Channel MOSFET

Features

Description

•

20A, 500V, R_DS(on)= 0.23Ω @V_GS= 10 V

Low gate charge ( typical 45.6 nC)

Low C_rss( typical 27 pF)

Fast switching

These N-Channel enhancement mode power field effect transis-

tors are produced using Fairchild’s proprietary, planar stripe,

DMOS technology.

This advanced technology has been especially tailored to mini-

mize on-state resistance, provide superior switching perfor-

mance, and withstand high energy pulse in the avalanche and

commutation mode. These devices are well suited for high effi-

cient switched mode power supplies and active power factor

correction.

100% avalanche tested

Improved dv/dt capability

TO-220

FDP Series

D S

Absolute Maximum Ratings

Symbol

Parameter

FDP20N50

Unit

V_DSS

Drain-Source Voltage

Drain Current

500

I_D

- Continuous (T_C= 25°C)

- Continuous (T_C= 100°C)

12.9

(Note 1)

(Note 2)

I_DM

Drain Current

- Pulsed

± 30

1110

V_GSS

E_AS

I_AR

Gate-Source voltage

Single Pulsed Avalanche Energy

Avalanche Current

(Note 1)

(Note 3)

E_AR

dv/dt

P_D

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

25.0

4.5

V/ns

Power Dissipation

(T_C= 25°C)

- Derate above 25°C

250

2.0

W/°C

T_J,T_STG

T_L

Operating and Storage Temperature Range

-55 to +150

300

°C

Maximum Lead Temperature for Soldering Purpose,

1/8” from Case for 5 Seconds

°C

* Drain current limited by maximum junction termperature.

Thermal Characteristics

Symbol

Parameter

Min.

Max.

0.5

Unit

°C/W

R_θJC

Thermal Resistance, Junction-to-Case

Thermal Resistance, Case-to-Sink

0.5

R_θCS

R_θJA

Thermal Resistance, Junction-to-Ambient

62.5

FDP20N50 Rev. A1

www.fairchildsemi.com

Package Marking and Ordering Information

Device Marking

Device

Package

Reel Size

Tape Width

Quantity

FDP20N50

TO-220

Electrical Characteristics

= 25°C unless otherwise noted

Symbol

Parameter

Conditions

Min

Typ Max Units

Off Characteristics

BV_DSS

Drain-Source Breakdown Voltage

V_GS= 0V, I_D= 250μA, T_J= 25°C

I_D= 250μA, Referenced to 25°C

500

ΔBV_DSS

Breakdown Voltage Temperature

Coefficient

0.50

V/°C

ΔT_J

I_DSS

Zero Gate Voltage Drain Current

V_DS= 500V, V_GS= 0V

V_DS= 400V, T_C= 125°C

μA

I_GSSF

I_GSSR

Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

V_GS= 30V, V_DS= 0V

V_GS= -30V, V_DS= 0V

100

-100

On Characteristics

V_GS(th)Gate Threshold Voltage

R_DS(on)

V_DS= V_GS, I_D= 250μA

V_GS= 10V, I_D= 10A

V_DS= 40V, I_D= 10A

3.0

5.0

0.23

Static Drain-Source

On-Resistance

0.20

24.6

(Note 4)

g_FS

Forward Transconductance

Dynamic Characteristics

C_iss

C_oss

C_rss

Input Capacitance

V_DS= 25V, V_GS= 0V,

f = 1.0MHz

2400

355

3120

465

Output Capacitance

Reverse Transfer Capacitance

Switching Characteristics

t_d(on)Turn-On Delay Time

t_r

t_d(off)

t_f

V_DD= 250V, I_D= 20A

R_G= 25Ω

200

760

210

220

59.5

Turn-On Rise Time

Turn-Off Delay Time

Turn-Off Fall Time

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

375

100

105

45.6

14.8

21.6

(Note 4, 5)

Q_g

V_DS= 400V, I_D= 20A

V_GS= 10V

Q_gs

Q_gd

(Note 4, 5)

Drain-Source Diode Characteristics and Maximum Ratings

I_S

Maximum Continuous Drain-Source Diode Forward Current

Maximum Pulsed Drain-Source Diode Forward Current

1.4

I_SM

V_SD

t_rr

Drain-Source Diode Forward Voltage

Reverse Recovery Time

V_GS= 0V, I_S= 20A

507

7.20

μC

dI_F/dt =100A/μs

(Note 4)

Q_rr

Reverse Recovery Charge

NOTES:

1. Repetitive Rating: Pulse width limited by maximum junction temperature

2. L = 5.0mH, I = 20A, V = 50V, R = 25Ω, Starting T = 25°C

3. I ≤ 20A, di/dt ≤ 200A/μs, V ≤ BV

, Starting T = 25°C

DSS

4. Pulse Test: Pulse width ≤ 300μs, Duty Cycle ≤ 2%

5. Essentially Independent of Operating Temperature Typical Characteristics

www.fairchildsemi.com

FDP20N50 Rev. A1

Typical Performance Characteristics

Figure 1. On-Region Characteristics

Figure 2. Transfer Characteristics

10²

10¹

10⁰

V_GS

Top :

15.0 V

10.0 V

8.0 V

7.0 V

6.5 V

6.0 V

150^oC

10¹

Bottom : 5.5 V

25^oC

-55^oC

10⁰

∝ Notes :

1. V_DS= 40V

2. 250レs Pulse Test

∝ Notes :

1. 250レs Pulse Test

2. T_C= 25∩

10^-1

10⁰

10¹

V_DS, Drain-Source Voltage [V]

V_GS, Gate-Source Voltage [V]

Figure 3. On-Resistance Variation vs.

Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current

and Temperatue

0.8

0.6

V_GS= 10V

10¹

0.4

150∩

25∩

V_GS= 20V

0.2

∝ Notes :

1. V_GS= 0V

∝ Note : T = 25∩

2. 250レs Pulse Test

10⁰

0.2

0.0

0.4

0.6

0.8

1.0

1.2

1.4

1.6

V_SD, Source-Drain voltage [V]

I_D, Drain Current [A]

Figure 5. Capacitance Characteristics

Figure 6. Gate Charge Characteristics

6000

C_iss= C_gs+ C_gd(C_ds= shorted)

C_oss= C_ds+ C_gd

C_rss= C_gd

V_DS= 100V

V_DS= 250V

V_DS= 400V

5000

4000

3000

2000

1000

C_oss

iss

Note :

1. V_GS= 0 V

2. f = 1 MHz

C_rss

∝ Note : I_D= 20A

10^-1

10⁰

10¹

Q_G, Total Gate Charge [nC]

V_DS, Drain-Source Voltage [V]

www.fairchildsemi.com

FDP20N50 Rev. A1

Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation

vs. Temperature

Figure 8. On-Resistance Variation

vs. Temperature

3.0

1.2

1.1

1.0

0.9

0.8

3.0

2.5

2.0

1.5

1.0

0.5

* Notes :

1. V_GS= 10 V

2. I_D= 5.5 A

∝ Notes :

∝Notes :

1. V_GS= 0 V

2. I_D= 250 レA

0.5

0.0

-100

1. V_GS= 10 V

2. I_D= 10 A

-50

100

150

200

T , Junction Temperature [^oC]

0.0

-100

-50

100

150

200

^J0

100

150

T, Junction Temperature [^oC]

Figure 9. Safe Operating Area

Figure 10. Maximum Drain Current

vs. Case Temperature

10²

10¹

10 μs

100 μs

1 ms

10 ms

100 ms

Operation in This Area

is Limited by R _DS(on)

10⁰

∝ Notes :

1. T_C= 25 ^o

2. T_J= 150 ^o

3. Single Pulse

10^-1

10⁰

10¹

10²

10³

100

125

150

V_DS, Drain-Source Voltage [V]

T_C, Case Temperature [∩ ]

Figure 11. Transient Thermal Response Curve

1 0 ⁰

1 0 ^-1

1 0 ^-2

D = 0 .5

0 .2

P_DM

0 .1

0 .0 5

t₁

t₂

0 .0 2

0 .0 1

∝

N o te s

1 . _{θ JC}(t) /W M a x.

2 . D u ty F a c to r, t₁/t₂

3 . T _{J M}T _CP _{D M}* Z _{q JC}(t)

0 .5

∩

sin g le p u lse

1 0 ^-5

1 0 ^-4

1 0 ^-3

1 0 ^-2

1 0 ^-1

1 0 ⁰

1 0 ¹

t₁, S q u a re W a ve P u ls e D u ra tio n [s e c ]

www.fairchildsemi.com

FDP20N50 Rev. A1

Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

Unclamped Inductive Switching Test Circuit & Waveforms

www.fairchildsemi.com

FDP20N50 Rev. A1

Peak Diode Recovery dv/dt Test Circuit & Waveforms

www.fairchildsemi.com

FDP20N50 Rev. A1

Mechanical Dimensions

TO-220

4.50 ±0.20

9.90 ±0.20

(8.70)

+0.10

–0.05

1.30

ø3.60 ±0.10

1.27 ±0.10

1.52 ±0.10

0.80 ±0.10

+0.10

–0.05

0.50

2.40 ±0.20

2.54TYP

[2.54 ±0.20]

10.00 ±0.20

Dimensions in Millimeters

www.fairchildsemi.com

FDP20N50 Rev. A1

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not

intended to be an exhaustive list of all such trademarks.

ACEx™

FAST^®

FASTr™

FPS™

FRFET™

GlobalOptoisolator™

GTO™

ISOPLANAR™

LittleFET™

MICROCOUPLER™

MicroFET™

MicroPak™

MICROWIRE™

MSX™

PowerEdge™

PowerSaver™

PowerTrench^®

QFET^®

SuperFET™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

SyncFET™

TCM™

ActiveArray™

Bottomless™

Build it Now™

CoolFET™

CROSSVOLT™

DOME™

EcoSPARK™

E²CMOS™

EnSigna™

QS™

QT Optoelectronics™

Quiet Series™

RapidConfigure™

RapidConnect™

μSerDes™

ScalarPump™

SILENT SWITCHER^®

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SPM™

HiSeC™

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TINYOPTO™

TruTranslation™

UHC™

I²C™

MSXPro™

OCX™

OCXPro™

i-Lo™

ImpliedDisconnect™

IntelliMAX™

FACT™

FACT Quiet Series™

OPTOLOGIC^®

OPTOPLANAR™

PACMAN™

POP™

UniFET™

UltraFET^®

VCX™

Across the board. Around the world.™

The Power Franchise^®

Wire™

Programmable Active Droop™

Power247™

Stealth™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;

NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE

SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,

SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR

CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body,

or (b) support or sustain life, or (c) whose failure to perform

when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

result in significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or In

Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. I19

www.fairchildsemi.com

FDP20N50 Rev. A1

FDP20N50相关文章

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FDP20N50产品参数

型号:	FDP20N50
Brand Name：	Fairchild Semiconductor
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Transferred
零件包装代码：	TO-220
包装说明：	FLANGE MOUNT, R-PSFM-T3
针数：	3
制造商包装代码：	3LD, TO220, JEDEC, MOLDED
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8541.29.00.95
风险等级：	3.87
其他特性：	AVALANCHE RATED
雪崩能效等级（Eas）：	1110 mJ
配置：	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：	500 V
最大漏极电流 (Abs) (ID)：	20 A
最大漏极电流 (ID)：	20 A
最大漏源导通电阻：	0.23 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR
JEDEC-95代码：	TO-220AB
JESD-30 代码：	R-PSFM-T3
JESD-609代码：	e3
元件数量：	1
端子数量：	3
工作模式：	ENHANCEMENT MODE
最高工作温度：	150 °C
封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR
封装形式：	FLANGE MOUNT
峰值回流温度（摄氏度）：	NOT SPECIFIED
极性/信道类型：	N-CHANNEL
最大功率耗散 (Abs)：	250 W
最大脉冲漏极电流 (IDM)：	80 A
认证状态：	Not Qualified
子类别：	FET General Purpose Power
表面贴装：	NO
端子面层：	Matte Tin (Sn)
端子形式：	THROUGH-HOLE
端子位置：	SINGLE
处于峰值回流温度下的最长时间：	NOT SPECIFIED
晶体管应用：	SWITCHING
晶体管元件材料：	SILICON
Base Number Matches：	1

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