FQA19N60各脚功能电路原理芯片引脚定义引脚图及功能IC贸易商-中国IC网-芯三七

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产品型号FQA19N60的概述

FQA19N60芯片概述 FQA19N60是一款N沟道功率MOSFET，广泛应用于电源管理和高频开关电路。该芯片属于Fairchild Semiconductor（现为ON Semiconductor的一部分）生产的系列，专为高压和高电流水平设计，适用于各种工业和消费性电子产品。FQA19N60具有良好的热性能、超低的导通电阻和高的击穿电压，使其成为电源转换、开关电源、马达驱动及其他相关应用的理想选择。该MOSFET具有良好的开关特性，能在高频下稳定工作，同时更低的栅极驱动电压可以实现更高的效率。在电路中，FQA19N60的实现可以显著提高设备的整体性能，降低能耗，延长使用寿命。其应用范围涵盖了从简单的开关电路到复杂的变换器设计，能够适用于不同的负载要求。 FQA19N60详细参数 FQA19N60的主要参数如下： - V_DS（最大漏源电压）: 600V - I_D（最大漏电流）:...

产品型号FQA19N60的Datasheet PDF文件预览

April 2000

QFET

FQA19N60

600V N-Channel MOSFET

General Description

Features

These N-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary,

planar stripe, DMOS technology.

This advanced technology has been especially tailored to

minimize on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation mode. These devices are well

suited for high efficiency switch mode power supply.

•

18.5A, 600V, R

= 0.38 Ω @ V = 10 V

DS(on) GS

Low gate charge ( typical 70 nC)

Low Crss ( typical 35 pF)

Fast switching

100% avalanche tested

Improved dv/dt capability

! "

G !

TO-3P

FQA Series

D S

Absolute Maximum Ratings

ꢀꢀ

T = 25°C unless otherwise noted

Symbol

Parameter

FQA19N60

600

Units

Drain-Source Voltage

DSS

- Continuous (T = 25°C)

DrainCurrent

18.5

- Continuous (T = 100°C)

11.7

(Note 1)

Drain Current

- Pulsed

Gate-Source Voltage

±ꢀ30

GSS

(Note 2)

(Note 1)

(Note 3)

Single Pulsed Avalanche Energy

Avalanche Current

1150

18.5

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

dv/dt

4.5

Vꢀns

Power Dissipation (T = 25°C)

300

- Derate above 25°C

Operating and Storage Temperature Range

2.38

W/°C

°C

T , T

-55 to +150

STG

Maximum lead temperature for soldering purposes,

300

°C

1/8ꢁ from case for 5 seconds

Thermal Characteristics

Symbol

Parameter

Thermal Resistance, Junction-to-Case

Thermal Resistance, Case-to-Sink

Thermal Resistance, Junction-to-Ambient

Typ

Max

Units

°CꢁW

0.42

0.24

Rev. A, April 2000

Electrical Characteristics

ꢀꢀꢀꢀꢀ

= 25°C unless otherwise noted

Symbol

Parameter

Test Conditions

Min

Typ

Max

Units

Off Characteristics

= 0 V, I = 250 µA

GS D

Drain-Source Breakdown Voltage

600

DSS

∆BV

Breakdown Voltage Temperature

Coefficient

DSS

= 250 µA, Referenced to 25°C

0.65

V/°C

∆T

= 600 V, V = 0 V

100

-100

µA

DSS

Zero Gate Voltage Drain Current

= 480 V, T = 125°C

= 30 V, V = 0 V

Gate-Body Leakage Current, Forward

Gate-Body Leakage Current, Reverse

GSSF

= -30 V, V = 0 V

GSSR

On Characteristics

= V , I = 250 µA

Gate Threshold Voltage

3.0

5.0

0.38

Ω

GS(th)

Static Drain-Source

On-Resistance

DS(on)

=10V,I =9.3A

0.3

= 50 V, I = 9.3 A

(Note 4)

Forward Transconductance

Dynamic Characteristics

Input Capacitance

2800

350

3600

450

iss

= 25 V, V = 0 V,

Output Capacitance

oss

rss

f = 1.0 MHz

Reverse Transfer Capacitance

Switching Characteristics

Turn-On Delay Time

Turn-On Rise Time

Turn-Off Delay Time

Turn-Off Fall Time

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

210

150

135

140

430

310

280

d(on)

= 300 V, I = 18.5 A,

= 25 Ω

d(off)

(Note 4, 5)

= 480 V, I = 18.5 A,

= 10 V

(Note 4, 5)

Drain-Source Diode Characteristics and Maximum Ratings

Maximum Continuous Drain-Source Diode Forward Current

18.5

1.4

Maximum Pulsed Drain-Source Diode Forward Current

= 0 V, I = 18.5 A

Drain-Source Diode Forward Voltage

Reverse Recovery Time

= 0 V, I = 18.5 A,

420

4.7

µC

(Note 4)

dI / dt = 100 A/µs

Reverse Recovery Charge

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 6.2mH, I = 18.5A, V = 50V, R = 25 Ω, Starting T = 25°C

3. I ꢀ 18.5A, di/dt ꢀ 200A/µs, V ꢀ BV

Starting T = 25°C

4. Pulse Test : Pulse width ꢀ 300µs, Duty cycle ꢀ 2%

DSS, J

5. Essentially independent of operating temperature

Rev. A, April 2000

Typical Characteristics

Top :

15^GV^S

10 V

8.0 V

7.0 V

6.5 V

6.0 V

10¹

10⁰

10¹

Bottom : 5.5 V

ꢀ

150

ꢀ

10⁰

ꢀ

-55

ꢀ

Notes :

ꢀ

Notes :

ꢂ

1. V_DS= 50V

2. 250 s Pulse Test

1. 250 s Pulse Test

2. T_C= 25

ꢁ

-1

10⁰

10¹

V_GS, Gate-Source Voltage [V]

V_DS, Drain-Source Voltage [V]

Figure 1. On-Region Characteristics

Figure 2. Transfer Characteristics

1.2

1.0

0.8

0.6

0.4

0.2

0.0

V_GS= 10V

V_GS= 20V

ꢀ

150

ꢀ

Notes :

1. V_GS= 0V

2. 250 s Pulse Test

ꢁ

ꢀ

ꢁ

Note : T = 25

-1

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

I_D, Drain Current [A]

V_SD, Source-Drain Voltage [V]

Figure 3. On-Resistance Variation vs.

Drain Current and Gate Voltage

Figure 4. Body Diode Forward Voltage

Variation vs. Source Current and

Temperature

5000

4000

3000

2000

1000

_iss= C_gs+ C_gd(C_ds= shorted)

_oss= C + C

_rss= C^ds

V_DS= 120V

V_DS= 300V

iss

V_DS= 480V

oss

ꢀ

Notes :

1. V_GS= 0 V

2. f = 1 MHz

rss

ꢀ

Note : I_D= 18.5 A

-1

Q_G, Total Gate Charge [nC]

V_DS, Drain-Source Voltage [V]

Figure 5. Capacitance Characteristics

Figure 6. Gate Charge Characteristics

Rev. A, April 2000

Typical Characteristics

(Continued)

3.0

2.5

2.0

1.5

1.0

0.5

0.0

1.2

1.1

1.0

0.9

0.8

ꢀ

Notes:

1. V_GS= 0 V

2. I_D= 250

ꢀ

Notes :

ꢁ

1. V = 10 V

2. I_D^G=^S9.3 A

-100

-50

100

150

200

-100

-50

100

150

200

T, Junction Temperature [^oC]

Figure 7. Breakdown Voltage Variation

vs. Temperature

Figure 8. On-Resistance Variation

vs. Temperature

Operation in This Area

is Limited by R _DS(on)

10²

10¹

10⁰

10 µs

100 µs

1 ms

10 ms

ꢀ

Notes :

1. T_C= 25 ^o

2. T_J= 150 ^o

3. Single Pulse

-1

10⁰

10¹

10²

10³

100

125

150

ꢀ

T_C, Case Temperature [

]

V_DS, Drain-Source Voltage [V]

Figure 9. Maximum Safe Operating Area

Figure 10. Maximum Drain Current

vs. Case Temperature

D = 0 .5

1 0 ^-1

0 .2

ꢀ

N o te s

1 . _{J C}(t)

2 . D u ty F a c to r, D = t₁/t₂

ꢁ

/W M a x.

0 .4 2

ꢀ

3 . T _{J M}

T _C

P _D

_{J C}(t)

ꢀ

0 .1

0 .0 5

0 .0 2

P_DM

t₁

1 0 ^-2

t₂

0 .0 1

s in g le p u ls e

1 0 ^-5

1 0 ^-4

1 0 ^-3

1 0 ^-2

1 0 ^-1

1 0 ⁰

1 0 ¹

t₁, S q u a re W a v e P u ls e D u ra tio n [s e c ]

Figure 11. Transient Thermal Response Curve

Rev. A, April 2000

Gate Charge Test Circuit & Waveform

V_GS

Same Type

50Kꢀ

as DUT

Q_g

12V

200nF

10V

300nF

V_DS

V_GS

Q_gs

Q_gd

DUT

3mA

Charge

Resistive Switching Test Circuit & Waveforms

R_L

V_DS

90%

V_DS

V_DD

V_GS

R_G

10%

V_GS

DUT

10V

t_d(on)

t_r

t_d(off)

t_f

t _on

t _off

Unclamped Inductive Switching Test Circuit & Waveforms

BV_DSS

--------------------

BV_DSS- V_DD

----

E_AS

L I_AS

V_DS

I _D

BV_DSS

I_AS

R_G

V_DD

I_D(t)

V_DD

V_DS(t)

DUT

10V

t _p

Time

Rev. A, April 2000

Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT

V_DS

I _SD

Driver

R_G

Same Type

as DUT

V_DD

V_GS

• dv/dt controlled by R_G

• I_SDcontrolled by pulse period

Gate Pulse Width

--------------------------

V_GS

D =

Gate Pulse Period

10V

( Driver )

I_FM, Body Diode Forward Current

I _SD

di/dt

( DUT )

I_RM

Body Diode Reverse Current

Body Diode Recovery dv/dt

V_SD

V_DS

( DUT )

V_DD

Body Diode

Forward Voltage Drop

Rev. A, April 2000

Package Dimensions

TO-3P

15.60 ±0.20

4.80 ±0.20

13.60 ±0.20

9.60 ±0.20

+0.15

ø3.20 ±0.10

1.50

–0.05

2.00 ±0.20

3.00 ±0.20

1.00 ±0.20

1.40 ±0.20

+0.15

–0.05

0.60

5.45TYP

[5.45 ±0.30]

5.45TYP

[5.45 ±0.30]

Rev. A, April 2000

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is

not intended to be an exhaustive list of all such trademarks.

ACEx™

HiSeC™

SuperSOT™-8

SyncFET™

TinyLogic™

UHC™

Bottomless™

CoolFET™

CROSSVOLT™

E²CMOS™

FACT™

ISOPLANAR™

MICROWIRE™

POP™

PowerTrench^®

QFET™

VCX™

FACT Quiet Series™

QS™

FAST^®

Quiet Series™

SuperSOT™-3

SuperSOT™-6

FASTr™

GTO™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;

NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT

DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR

INTERNATIONAL.

As used herein:

result in significant injury to the user.

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body,

or (b) support or sustain life, or (c) whose failure to perform

when properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to

2. A critical component is any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Product Status

Definition

Advance Information

Formative or In

Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. A, January 2000

FQA19N60相关文章

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FQA19N60产品参数

型号:	FQA19N60
Brand Name：	Fairchild Semiconductor
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Transferred
零件包装代码：	TO-3PN
包装说明：	FLANGE MOUNT, R-PSFM-T3
针数：	3
制造商包装代码：	3LD, TO3PN, PLASTIC, EIAJ SC-65, ISOLATED
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8541.29.00.95
风险等级：	5.69
雪崩能效等级（Eas）：	1150 mJ
配置：	SINGLE WITH BUILT-IN DIODE
最小漏源击穿电压：	600 V
最大漏极电流 (Abs) (ID)：	18.5 A
最大漏极电流 (ID)：	18.5 A
最大漏源导通电阻：	0.38 Ω
FET 技术：	METAL-OXIDE SEMICONDUCTOR
JESD-30 代码：	R-PSFM-T3
JESD-609代码：	e3
元件数量：	1
端子数量：	3
工作模式：	ENHANCEMENT MODE
最高工作温度：	150 °C
封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR
封装形式：	FLANGE MOUNT
峰值回流温度（摄氏度）：	NOT SPECIFIED
极性/信道类型：	N-CHANNEL
最大功率耗散 (Abs)：	300 W
最大脉冲漏极电流 (IDM)：	74 A
认证状态：	Not Qualified
子类别：	FET General Purpose Powers
表面贴装：	NO
端子面层：	Matte Tin (Sn)
端子形式：	THROUGH-HOLE
端子位置：	SINGLE
处于峰值回流温度下的最长时间：	NOT SPECIFIED
晶体管应用：	SWITCHING
晶体管元件材料：	SILICON
Base Number Matches：	1

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