FSBB15CH60原理图各脚功能电路原理芯片引脚定义引脚图及功能-中国IC网-芯三七

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产品型号FSBB15CH60的概述

芯片FSBB15CH60的概述 FSBB15CH60是一款由国际半导体制造商生产的高性能功率模块，旨在满足现代工业应用对高效能、高可靠性的需求。该芯片采用了先进的绝缘栅双极晶体管（IGBT）和增强型MOSFET技术，旨在实现高频开关和有效的电流控制。同时，该芯片在温度和电压范围内的稳定性也使其适用于各种苛刻环境。该芯片的主要应用领域包括变频器、伺服控制、电动机驱动以及其他高功率电子设备。FSBB15CH60的设计不仅关注功率输出，还考虑了散热管理和故障安全，从而保障系统的长期运行和可靠性。芯片FSBB15CH60的详细参数 FSBB15CH60的关键技术参数如下： - 最大输入电压(Ue): 600V - 额定输出电流(Iout): 15A - 开关频率: 最大可达到20kHz - 导通电阻: 1.3Ω - 工作温度范围: -40°C至 +125°C - 引脚数: 15个 - 封装...

产品型号FSBB15CH60的Datasheet PDF文件预览

April 2005

SPM

FSBB15CH60

Smart Power Module

Features

General Description

It is an advanced smart power module (SPM^TM) that Fairchild

has newly developed and designed to provide very compact

and high performance ac motor drives mainly targeting low-

power inverter-driven application like air conditioner and wash-

ing machine. It combines optimized circuit protection and drive

matched to low-loss IGBTs. System reliability is further

enhanced by the integrated under-voltage lock-out and short-

circuit protection. The high speed built-in HVIC provides opto-

coupler-less single-supply IGBT gate driving capability that fur-

ther reduce the overall size of the inverter system design. Each

phase current of inverter can be monitored separately due to

the divided negative dc terminals.

•

UL Certified No.E209204 (SPM27-CA package)

Very low thermal resistance due to using DBC

600V-15A 3-phase IGBT inverter bridge including control ICs

for gate driving and protection

•

Divided negative dc-link terminals for inverter current sensing

applications

•

Single-grounded power supply due to built-in HVIC

Isolation rating of 2500Vrms/min.

Applications

•

AC 100V ~ 253V three-phase inverter drive for small power

ac motor drives

Home appliances applications like air conditioner and

washing machine.

•

Top View

44mm

Bottom View

26.8mm

Figure 1.

FSBB15CH60 Rev. C

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Integrated Power Functions

•

600V-15A IGBT inverter for three-phase DC/AC power conversion (Please refer to Figure 3)

Integrated Drive, Protection and System Control Functions

•

For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting

Control circuit under-voltage (UV) protection

Note) Available bootstrap circuit example is given in Figures 10 and 11.

•

For inverter low-side IGBTs: Gate drive circuit, Short circuit protection (SC)

Control supply circuit under-voltage (UV) protection

•

Fault signaling: Corresponding to a UV fault (Low-side supply)

Input interface: 3.3/5V CMOS/LSTTL compatible, Schmitt trigger input

Pin Configuration

Top View

13.7

(1) V_CC(L)

(2) COM

(3) IN_(UL)

(4) IN_(VL)

(5) IN_(WL)

(6) V_FO

(21) N_U

(22) N_V

(23) N_W

19.2

(7) C_FOD

(8) C_SC

(9) IN_(UH)

(24)

Case Temperature (T )

(10) V_CC(UH)

(11) V_B(U)

(12) V_S(U)

(13) IN_(VH)

(14) V_CC(VH)

(15) V_B(V)

Detecting Point

(25) V

(26) W

(27) P

(16) V_S(V)

(17) IN_(WH)

(18) V_CC(WH)

(19) V_B(W)

DBC Substrate

(20) V_S(W)

Figure 2.

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FSBB15CH60 Rev. C

Pin Descriptions

Pin Number

Pin Name

Pin Description

Low-side Common Bias Voltage for IC and IGBTs Driving

Common Supply Ground

CC(L)

COM

Signal Input for Low-side U Phase

(UL)

(VL)

(WL)

Signal Input for Low-side V Phase

Signal Input for Low-side W Phase

Fault Output

Capacitor for Fault Output Duration Time Selection

Capacitor (Low-pass Filter) for Short-Current Detection Input

Signal Input for High-side U Phase

FOD

(UH)

High-side Bias Voltage for U Phase IC

High-side Bias Voltage for U Phase IGBT Driving

High-side Bias Voltage Ground for U Phase IGBT Driving

Signal Input for High-side V Phase

CC(UH)

B(U)

S(U)

(VH)

High-side Bias Voltage for V Phase IC

High-side Bias Voltage for V Phase IGBT Driving

High-side Bias Voltage Ground for V Phase IGBT Driving

Signal Input for High-side W Phase

CC(VH)

B(V)

S(V)

(WH)

High-side Bias Voltage for W Phase IC

High-side Bias Voltage for W Phase IGBT Driving

High-side Bias Voltage Ground for W Phase IGBT Driving

Negative DC–Link Input for U Phase

Negative DC–Link Input for V Phase

Negative DC–Link Input for W Phase

Output for U Phase

CC(WH)

B(W)

S(W)

Output for V Phase

Output for W Phase

Positive DC–Link Input

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FSBB15CH60 Rev. C

Internal Equivalent Circuit and Input/Output Pins

P (27)

(19) V_{B(W )}

VCC

(18) V_{CC(W H)}

OUT

COM

(17) IN_{(W H)}

W (26)

(20) V_{S(W )}

(15) V_B(V)

(14) V_CC(VH)

VCC

OUT

COM

(13) IN_(VH)

(16) V_S(V)

V (25)

(11) V_B(U)

(10) V_CC(UH)

VCC

OUT

COM

(9) IN_(UH)

(12) V_S(U)

U (24)

(8) C_SC

(7) C_FOD

(6) V_FO

OUT(W L)

OUT(VL)

C(SC)

C(FOD)

VFO

N_W(23)

(5) IN_{(W L)}

(4) IN_(VL)

(3) IN_(UL)

IN(W L)

IN(VL)

IN(UL)

_V(22)

(2) COM

(1) V_CC(L)

COM

VCC

OUT(UL)

V_SL

N_U(21)

Note:

1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT and one control IC. It has gate drive and protection functions.

2. Inverter power side is composed of four inverter dc-link input terminals and three inverter output terminals.

3. Inverter high-side is composed of three IGBTs, freewheeling diodes and three drive ICs for each IGBT.

Figure 3.

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FSBB15CH60 Rev. C

Absolute Maximum Ratings (T = 25°C, Unless Otherwise Specified)

Inverter Part

Symbol

Parameter

Conditions

Rating

450

Units

Supply Voltage

Applied between P- N , N , N

Supply Voltage (Surge)

Applied between P- N , N , N

500

PN(Surge)

Collector-emitter Voltage

600

CES

± I

Each IGBT Collector Current

Each IGBT Collector Current (Peak)

Collector Dissipation

= 25°C

± I

= 25°C, Under 1ms Pulse Width

= 25°C per One Chip

°C

Operating Junction Temperature

(Note 1)

-20 ~ 125

Note:

1. The maximum junction temperature rating of the power chips integrated within the SPM is 150 °C(@T ≤ 100°C). However, to insure safe operation of the SPM, the average

junction temperature should be limited to

≤ 125°C (@T ≤ 100°C)

J(ave) C

Control Part

Symbol

Parameter

Control Supply Voltage

Conditions

Rating

Units

Applied between V

COM

, V

CC(UH)

CC(VH)

CC(WH)

CC(L)

High-side Control Bias

Voltage

Applied between V

S(W)

- V

, V

- V

, V

B(U)

S(U)

B(V)

S(V)

B(W)

Input Signal Voltage

Applied between IN

, IN

, IN ,

(VL)

-0.3~17

(UH)

(VH)

(WH)

(UL)

- COM

(WL)

Fault Output Supply Voltage

Fault Output Current

Applied between V - COM

-0.3~V +0.3

Sink Current at V Pin

Current Sensing Input Voltage Applied between C - COM

-0.3~V +0.3

Total System

Symbol

Parameter

Conditions

Rating

400

Units

Self Protection Supply Voltage Limit

= V = 13.5 ~ 16.5V

PN(PROT)

(Short Circuit Protection Capability)

T = 125°C, Non-repetitive, less than 2µs

Module Case Operation Temperature -20°C ≤ T ≤ 125°C, See Figure 2

-20 ~ 100

-40 ~ 125

2500

°C

Storage Temperature

STG

Isolation Voltage

60Hz, Sinusoidal, AC 1 minute, Connection

Pins to ceramic substrate

rms

ISO

Thermal Resistance

Symbol

Parameter

Conditions

Min. Typ. Max. Units

Junction to Case Thermal Inverter IGBT part (per 1/6 module)

2.02

°C/W

th(j-c)Q

Resistance

Inverter FWD part (per 1/6 module)

3.15

°C/W

th(j-c)F

Note:

2. For the measurement point of case temperature(T ), please refer to Figure 2.

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FSBB15CH60 Rev. C

Electrical Characteristics (T = 25°C, Unless Otherwise Specified)

Inverter Part

Symbol

CE(SAT)

Parameter

Conditions

Min. Typ. Max.

Units

Collector-Emitter

= V = 15V

=15A, T = 25°C

2.3

Saturation Voltage

= 5V

= 0V

FWD Forward Voltage

Switching Times

= 15A, T = 25°C

2.1

= 300V, V = V = 15V

0.4

µs

µA

= 15A

0.28

0.67

0.35

0.10

0.55

0.24

0.73

0.34

0.10

C(ON)

= 0V ↔ 5V, Inductive Load

OFF

(Note 3)

C(OFF)

= 300V, V = V = 15V

= 15A

C(ON)

= 0V ↔ 5V, Inductive Load

OFF

(Note 3)

C(OFF)

Collector-Emitter

Leakage Current

= V

CES

250

CES

Note:

3. t and t

include the propagation delay time of the internal drive IC. t

and t

are the switching time of IGBT itself under the given gate driving condition internally.

C(OFF)

OFF

C(ON)

For the detailed information, please see Figure 4.

100% I_C100% I_C

t_rr

V_CE

I_C

V_CE

V_IN

t_ON

t_OFF

t_C(ON)

t_C(OFF)

V_IN(ON)

V_IN(OFF)

10% V_CE

10% I_C

10% I_C90% I_C10% V_CE

(b) turn-off

(a) turn-on

Figure 4. Switching Time Definition

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FSBB15CH60 Rev. C

Electrical Characteristics (T_J= 25°C, Unless Otherwise Specified)

Control Part

Symbol

Parameter

Conditions

Min.

Typ. Max. Units

I_QCCL

Quiescent V_CCSupply

V_CC= 15V

V_CC(L)- COM

µA

Current

IN_{(UL, VL, WL)}= 0V

I_QCCH

I_QBS

V_CC= 15V

_CC(UH), V_CC(VH)

100

500

IN_{(UH, VH, WH)}= 0V V_CC(WH)- COM

Quiescent V_BSSupply

Current

V_BS= 15V

V_B(U)- V_S(U), V_B(V)-V_S(V),

IN_{(UH, VH, WH)}= 0V V_B(W)- V_S(W)

V_SC= 0V, V_FOCircuit: 4.7kΩ to 5V Pull-up

V_SC= 1V, V_FOCircuit: 4.7kΩ to 5V Pull-up

V_CC= 15V (Note 4)

V_FOH

V_FOL

Fault Output Voltage

4.5

0.8

0.55

13.0

13.2

12.5

12.9

V_SC(ref)

UV_CCD

UV_CCR

UV_BSD

UV_BSR

t_FOD

Short Circuit Trip Level

0.45

10.7

11.2

10.1

10.5

1.0

3.0

0.5

11.9

12.4

11.3

11.7

1.8

Supply Circuit Under-

Voltage Protection

Detection Level

Reset Level

Detection Level

Reset Level

Fault-out Pulse Width

ON Threshold Voltage

C_FOD= 33nF (Note 5)

V_IN(ON)

Applied between IN_(UH), IN_(VH), IN_(WH), IN_(UL)

IN_(VL), IN_(WL)- COM

V_IN(OFF)OFF Threshold Voltage

0.8

Note:

4. Short-circuit current protection is functioning only at the low-sides.

5. The fault-out pulse width t_FODdepends on the capacitance value of C_FODaccording to the following approximate equation : C_FOD= 18.3 x 10^-6x t_FOD[F]

Recommended Operating Conditions

Value

Typ. Max.

300

Symbol

Parameter

Conditions

Units

Min.

13.5

V_PN

V_CC

Supply Voltage

Applied between P - N_U, N_V, N_W

400

Control Supply Voltage

Applied between V_CC(UH), V_CC(VH), V_CC(WH)

V_CC(L)- COM

16.5

V_BS

High-side Bias Voltage

Applied between V_B(U)- V_S(U), V_B(V)- V_S(V)

V_B(W)- V_S(W)

13.0

-1

18.5

DV_CC/Dt, Control supply variation

DV_BS/Dt

V/µs

µs

t_dead

Blanking Time for Preventing For Each Input Signal

Arm-short

2.0

f_PWM

V_SEN

PWM Input Signal

Voltage for Current Sensing

-20°C ≤ T_C≤ 100°C, -20°C ≤ T_J≤ 125°C

kHz

Applied between N_U, N_V, N_W- COM

(Including surge voltage)

-4

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FSBB15CH60 Rev. C

Mechanical Characteristics and Ratings

Limits

Parameter

Condition

Units

Min.

Typ.

0.62

Max.

0.72

+120

Mounting Torque

Device Flatness

Weight

Mounting Screw: - M3

Recommended 0.62N•m

Note Figure 5

0.51

N•m

µm

15.00

( + )

Figure 5. Flatness Measurement Position

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FSBB15CH60 Rev. C

Time Charts of SPMs Protective Function

Input Signal

Protection

RESET

SET

RESET

Circuit State

UV_CCR

UV_CCD

Control

Supply Voltage

Output Current

Fault Output Signal

a1 : Control supply voltage rises: After the voltage rises UV_CCR, the circuits start to operate when next input is applied.

a2 : Normal operation: IGBT ON and carrying current.

a3 : Under voltage detection (UV_CCD).

a4 : IGBT OFF in spite of control input condition.

a5 : Fault output operation starts.

a6 : Under voltage reset (UV_CCR).

a7 : Normal operation: IGBT ON and carrying current.

Fig. 6. Under-Voltage Protection (Low-side)

Input Signal

Protection

RESET

SET

RESET

Circuit State

UV_BSR

UV_BSD

Control

Supply Voltage

Output Current

High-level (no fault output)

Fault Output Signal

b1 : Control supply voltage rises: After the voltage reaches UV_BSR, the circuits start to operate when next input is applied.

b2 : Normal operation: IGBT ON and carrying current.

b3 : Under voltage detection (UV_BSD).

b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.

b5 : Under voltage reset (UV_BSR

)

b6 : Normal operation: IGBT ON and carrying current

Fig. 7. Under-Voltage Protection (High-side)

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FSBB15CH60 Rev. C

Lower arms

control input

Protection

SET

RESET

circuit state

Internal IGBT

Gate-Emitter Voltage

Output Current

SC Reference Voltage

Sensing Voltage

of the shunt

resistance

CR circuit time

constant delay

Fault Output Signal

(with the external shunt resistance and CR connection)

c1 : Normal operation: IGBT ON and carrying current.

c2 : Short circuit current detection (SC trigger).

c3 : Hard IGBT gate interrupt.

c4 : IGBT turns OFF.

c5 : Fault output timer operation starts: The pulse width of the fault output signal is set by the external capacitor C_FO

c6 : Input “L” : IGBT OFF state.

c7 : Input “H”: IGBT ON state, but during the active period of fault output the IGBT doesn’t turn ON.

c8 : IGBT OFF state

Fig. 8. Short-Circuit Current Protection (Low-side Operation only)

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FSBB15CH60 Rev. C

5V-Line

R_PF

4.7kΩ

SPM

IN_(UH)IN_(VH)

IN_(WH)

IN_(WL)

IN_(UL)IN_(VL)

CPU

100 Ω

V_FO

C_PF

1nF

COM

Note:

1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application’s

printed circuit board. The SPM input signal section integrates 3.3kΩ(typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the sig-

nal voltage drop at input terminal.

2. The logic input is compatible with standard CMOS or LSTTL outputs.

Fig. 9. Recommended CPU I/O Interface Circuit

These Values depend on PWM Control Algorithm

15V-Line

R_E(H)

R_BS

D_BS

One-Leg Diagram of SPM

Vcc VB

0.1uF

22uF

COM VS

Inverter

Output

Vcc

OUT

V_SL

1000uF

1uF

COM

Note:

1. It would be recommended that the bootstrap diode, D , has soft and fast recovery characteristics.

2. The bootstrap resistor (R ) should be 3 times greater than R

. The recommended value of R

is 5.6Ω, but it can be increased up to 20Ω (maximum) for a slower dv/dt of

E(H)

high-side.

3. The ceramic capacitor placed between V -COM should be over 1µF and mounted as close to the pins of the SPM as possible.

Fig. 10. Recommended Bootstrap Operation Circuit and Parameters

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FSBB15CH60 Rev. C

R_E(WH)

R_E(VH)

15V line

R_E(UH)

R_BS

D_BS

P (27)

(19) V_B(W)

(18) V_CC(WH)

VCC

COM

OUT

C_BS

D_BS

C_BSC

(17) IN_(WH)

(20) V_S(W)

W (26)

Gating WH

Gating VH

R_BS

(15) V_B(V)

VCC

COM

(14) V_CC(VH)

OUT

C_BS

(13) IN_(VH)

(16) V_S(V)

V (25)

U (24)

D_BS

R_BS

(11) V_B(U)

VCC

(10) V_CC(UH)

C_DCS

Vdc

OUT

COM

C_BS

(9) IN_(UH)

(12) V_S(U)

Gating UH

R_F

5V line

R_PF

(8) C_SC

(7) C_FOD

(6) V_FO

C_SC

OUT(WL)

OUT(VL)

C(SC)

C(FOD)

VFO

R_SW

N_W(23)

N_V(22)

N_U(21)

R_S

C_FOD

Fault

(5) IN_(WL)

(4) IN_(VL)

(3) IN_(UL)

Gating WL

Gating VL

Gating UL

IN(WL)

IN(VL)

IN(UL)

R_SV

(2) COM

(1) V_CC(L)

COM

VCC

C_PF

C_BPF

OUT(UL)

V_SL

R_SU

C_SPC15

C_SP15

R_FW

R_FV

R_FU

Input Signal for Short-

Circuit Protection

W-Phase Current

V-Phase Current

U-Phase Current

C_FW

C_FU

C_FV

Note:

1. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm)

2. By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is possible.

3. V output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7kΩ resistance. Please refer to Figure. 9.

4. C

of around 7 times larger than bootstrap capacitor C is recommended.

SP15

5. V output pulse width should be determined by connecting an external capacitor(C

) between C

(pin7) and COM(pin2). (Example : if C

= 33 nF, then t = 1.8ms

FOD FO

FOD

(typ.)) Please refer to the note 5 for calculation method.

6. Input signal is High-Active type. There is a 3.3kΩ resistor inside the IC to pull down each input signal line to GND. When employing RC coupling circuits, set up such RC couple

that input signal agree with turn-off/turn-on threshold voltage.

7. To prevent errors of the protection function, the wiring around R and C should be as short as possible.

8. In the short-circuit protection circuit, please select the R C time constant in the range 1.5~2 µs.

9. Each capacitor should be mounted as close to the pins of the SPM as possible.

10. To prevent surge destruction, the wiring between the smoothing capacitor and the P&GND pins should be as short as possible. The use of a high frequency non-inductive

capacitor of around 0.1~0.22 µF between the P&GND pins is recommended.

11. Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays.

12. C

should be over 1uF and mounted as close to the pins of the SPM as possible.

SPC15

Fig. 11. Typical Application Circuit

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FSBB15CH60 Rev. C

Detailed Package Outline Drawings

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FSBB15CH60 Rev. C

Detailed Package Outline Drawings (Continued)

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FSBB15CH60 Rev. C

Detailed Package Outline Drawings (Continued)

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FSBB15CH60 Rev. C

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to

be an exhaustive list of all such trademarks.

FAST

IntelliMAX™

ISOPLANAR™

LittleFET™

MICROCOUPLER™

MicroFET™

MicroPak™

MICROWIRE™

MSX™

POP™

SPM™

ACEx™

FASTr™

Power247™

PowerEdge™

PowerSaver™

Stealth™

ActiveArray™

Bottomless™

CoolFET™

FPS™

SuperFET™

SuperSOT™-3

SuperSOT™-6

SuperSOT™-8

SyncFET™

FRFET™

GlobalOptoisolator™

GTO™

PowerTrench

CROSSVOLT™

DOME™

QFET

QS™

HiSeC™

EcoSPARK™

E²CMOS™

EnSigna™

I²C™

QT Optoelectronics™

Quiet Series™

RapidConfigure™

RapidConnect™

µSerDes™

TinyLogic

i-Lo™

MSXPro™

TINYOPTO™

TruTranslation™

UHC™

ImpliedDisconnect™

OCX™

FACT™

OCXPro™

FACT Quiet Series™

OPTOLOGIC

UltraFET

UniFET™

VCX™

Across the board. Around the world.™

OPTOPLANAR™

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SILENT SWITCHER

SMART START™

The Power Franchise

Programmable Active Droop™

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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY

ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT

CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR

SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used herein:

1. Life support devices or systems are devices or systems which,

(a) are intended for surgical implant into the body, or (b) support

or sustain life, or (c) whose failure to perform when properly used

in accordance with instructions for use provided in the labeling,

can be reasonably expected to result in significant injury to the

user.

2. A critical component is any component of a life support device

or system whose failure to perform can be reasonably expected

to cause the failure of the life support device or system, or to

affect its safety or effectiveness.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification

Advance Information

Product Status

Definition

Formative or In

Design

This datasheet contains the design specifications for

product development. Specifications may change in

any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and

supplementary data will be published at a later date.

Fairchild Semiconductor reserves the right to make

changes at any time without notice in order to improve

design.

No Identification Needed

Obsolete

Full Production

This datasheet contains final specifications. Fairchild

Semiconductor reserves the right to make changes at

any time without notice in order to improve design.

Not In Production

This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.

The datasheet is printed for reference information only.

Rev. I15

www.fairchildsemi.com

FSBB15CH60 Rev. C

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FSBB15CH60产品参数

型号:	FSBB15CH60
Brand Name：	Fairchild Semiconductor
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Transferred
零件包装代码：	MODULE
包装说明：	,
针数：	27
制造商包装代码：	PDD STD, SPM27-CA, DBC TYPE
Reach Compliance Code：	compliant
ECCN代码：	EAR99
HTS代码：	8541.29.00.95
风险等级：	4.41
模拟集成电路 - 其他类型：	AC MOTOR CONTROLLER
JESD-30 代码：	R-XDMA-T27
JESD-609代码：	e3
功能数量：	1
端子数量：	27
最大输出电流：	30 A
封装主体材料：	UNSPECIFIED
封装形状：	RECTANGULAR
封装形式：	MICROELECTRONIC ASSEMBLY
峰值回流温度（摄氏度）：	NOT SPECIFIED
认证状态：	Not Qualified
最大供电电压 (Vsup)：	16.5 V
最小供电电压 (Vsup)：	13.5 V
标称供电电压 (Vsup)：	15 V
表面贴装：	NO
技术：	HYBRID
端子面层：	Matte Tin (Sn)
端子形式：	THROUGH-HOLE
端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED
Base Number Matches：	1

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