FSCQ0765RTYDTU全新原装原理图各脚功能电路原理芯片引脚定义-中国IC网-芯三七

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产品型号FSCQ0765RTYDTU的概述

芯片FSCQ0765RTYDTU的概述 FSCQ0765RTYDTU是一款源于现代半导体技术的高性能功率MOSFET，广泛应用于电源管理和控制电路中。随着电子设备对能效和集成度的要求不断提高，FSCQ0765RTYDTU以其出色的导通电阻、快速的开关速度以及较高的功率承载能力，成为了许多业务领域中的首选器件。其设计充分考虑了热管理和电流处理能力，使其在高温和高电流环境下仍能稳定工作。该MOSFET的关键特性使其在各个电子应用中，尤其是在高效开关电源（SMPS）、电机控制、逆变器及电池管理系统等领域，成为了广泛使用的零件。在功率转换和分配电路中，该器件的引入进一步提高了整体系统的能效和可靠性。芯片FSCQ0765RTYDTU的详细参数 FSCQ0765RTYDTU的详细技术参数如下： - 最大漏极-源极电压（Vds）: 通常为60V - 最大持续漏极电流（Id）: 70A - 导通电...

产品型号FSCQ0765RTYDTU的Datasheet PDF文件预览

www.fairchildsemi.com

FSCQ0765RT

Green Mode Fairchild Power Switch (FPS ) for

Quasi-Resonant Switching Converter

Features

• Optimized for Quasi-Resonant Converter (QRC)

• Advanced Burst-Mode operation for under 1 W standby

power consumption

• Pulse by Pulse Current Limit (5A)

• Over load protection (OLP) - Auto restart

• Over voltage protection (OVP) - Auto restart

• Abnormal Over Current Protection (AOCP) - Latch

• Internal Thermal Shutdown (TSD) - Latch

• Under Voltage Lock Out (UVLO) with hysteresis

• Low Startup Current (typical : 25uA)

• Low Operating Current (typical : 4mA)

• Internal High Voltage SenseFET

OUTPUT POWER TABLE

(2)

230VAC ±15%

85-265VAC

PRODUCT

(1)

Open Frame

100 W

Open Frame

85 W

FSCQ0765RT

FSCQ1265RT

FSCQ1565RT

170 W

140 W

210 W

170 W

Table 1. Notes: 1. Maximum practical continuous power

in an open frame design at 50°C ambient. 2. 230 VAC or

100/115 VAC with doubler.

• Built-in Soft Start (20ms)

• Extended Quasi-resonant Switching for Wide Load Range

Typical Circuit

Application

• CTV

• DVD Receiver

• Audio Power Supply

Description

Drain

FSCQ0765RT

In general, Quasi-Resonant Converter (QRC) shows lower

EMI and higher power conversion efficiency compared to the

conventional hard switched converter with a fixed switching

frequency. Therefore, it is well suited for applications that are

sensitive to the noise, such as color TV and audio. The

FSCQ0765RT is an integrated Pulse Width Modulation

(PWM) controller and Sense FET specifically designed for

Quasi-resonant off-line Switch Mode Power Supplies

(SMPS) with minimal external components. The PWM

controller includes integrated fixed frequency oscillator, under

voltage lockout, leading edge blanking (LEB), optimized gate

driver, internal soft start, temperature compensated precise

current sources for a loop compensation and self protection

circuitry. Compared with discrete MOSFET and PWM

controller solution, it can reduce total cost, component count,

size and weight simultaneously increasing efficiency, produc-

tivity, and system reliability. This device is a basic platform

well suited for cost effective designs of Quasi resonant

switching flyback converters.

PWM

Sync

GND

V_FB

Vcc

Figure 1. Typical Flyback Application

Rev.1.0.1

FSCQ0765RT

Internal Block Diagram

Sync

Vcc

Drain

Quasi-resonant

(QR) switching

controller

Threshold

9V/15V

Soft start

4.6V/2.6V : Normal QR

3.0V/1.8V : Extended QR

Vcc good

Auxiliary

Burst mode

Controller

OSC

Vref

Main bias

V_Burst

Normal operation

Burst Switching

Normal

Internal

bias

Vref

I_BFB

Vref

I_FB

Vref

I_B

operation

Vcc

I_delay

PWM

2.5R

Gate

driver

LEB

600ns

V_SD

Sync

AOCP

Vovp

Vcc good

GND

TSD

Power off Reset

Vocp

Figure 2. Functional Block Diagram of FSCQ0765RT

FSCQ0765RT

Pin Definitions

Pin Number

Pin Name

Pin Function Description

High voltage power SenseFET drain connection.

This pin is the control ground and the SenseFET source.

Drain

GND

This pin is the positive supply input. This pin provides internal operating

current for both start-up and steady-state operation.

Vcc

This pin is internally connected to the inverting input of the PWM comparator.

The collector of an opto-coupler is typically tied to this pin. For stable

operation, a capacitor should be placed between this pin and GND. If the

voltage of this pin reaches 7.5V, the over load protection triggers resulting in

shutdown of the FPS.

Vfb

This pin is internally connected to the sync detect comparator for quasi

resonant switching. In normal quasi-resonant operation, the threshold of the

sync comparator is 4.6V/2.6V. Meanwhile, the sync threshold is changed to

3.0V/1.8V in extended quasi-resonant operation.

Sync

Pin Configuration

TO-220F-5L

5.Sync

4.Vfb

3.Vcc

2.GND

1.Drain

Figure 3. Pin Configuration (Top View)

FSCQ0765RT

Absolute Maximum Ratings

(Ta=25°C, unless otherwise specified)

Parameter

Drain-Source (GND) Voltage ⁽¹⁾

Symbol

Value

650

Unit

DSS

Drain-Gate Voltage (R =1MΩ)

650

DGR

Gate-Source (GND) Voltage

Drain Current Pulsed ⁽²⁾

±30

Single Pulsed Avalanche Energy ⁽³⁾

570

Continuous Drain Current (Tc = 25°C)

3.8

Continuous Drain Current (T =100°C)

2.4

Supply Voltage

-0.3 to 13V

sync

Analog Input Voltage Range

-0.3 to V

Total Power Dissipation

°C

Operating Junction Temperature

Operating Ambient Temperature

Storage Temperature Range

Thermal Resistance

+150

-25 to +85

-55 to +150

2.6

°C

STG

Rthjc

°C/W

Notes:

1. T = 25°C to 150°C

2. Repetitive rating: Pulse width limited by maximum junction temperature

3. L = 21mH, V

= 50V, R = 25Ω, starting T = 25°C

G j

FSCQ0765RT

Electrical Characteristics (SenseFET Part)

(Ta=25°C unless otherwise specified)

Parameter

Symbol

Condition

= 0V, I = 250µA

Min. Typ. Max. Unit

Drain-Source Breakdown Voltage

650

DSS

= Max, Rating, V

= 0V

200

µA

Zero Gate Voltage Drain Current

DSS

= 0.8*Max., Rating

300

1.6

µA

= 0V, T = 85°C

Static Drain-source on Resistance ^(Note)

Input Capacitance

= 10V, I = 2.3A

1.4

Ω

DS(ON)

Ciss

1415 1840

100 130

= 0V, V

= 25V,

Output Capacitance

Reverse Transfer Capacitance

Turn on Delay Time

Rise Time

Coss

Crss

f = 1MHz

td(on)

= 0.5BV , I = 7.0A

DD DSS D

(MOSFET switching

times are essentially

independent of operating

temperature)

td (off)

130

Turn Off Delay Time

Fall Time

110 230

140

Total Gate Charge

(Gate-Source+Gate-Drain)

= 10V, I = 7.0A,

= 0.5BV

(MOSFET

DSS

Switching times are essentially

independent of operating

temperature)

Gate-Source Charge

Qgs

Qgd

9.1

Gate-Drain (Miller) Charge

Note:

1. Pulse test : Pulse width ≤ 300µS, duty ≤ 2%

FSCQ0765RT

Electrical Characteristics (Continued)

(Ta=25°C unless otherwise specified)

Parameter

Symbol

Condition

Min. Typ. Max. Unit

UVLO SECTION

Vcc Start Threshold Voltage

Vcc Stop Threshold Voltage

SENSEFET SECTION

= GND

START

= GND

STOP

Drain To PKG Breakdown Voltage (Note4)

Drain To Source Breakdown Voltage

Drain To Source Leakage Current

OSCILLATOR SECTION

Initial Frequency

BVpkg

BVdss

Idss

60HZ AC, Ta = 25°C

Ta = 25°C

3500

650

Vdrain = 400V, Ta = 25°C

200 uA

OSC

kHz

Voltage Stability

12V ≤ Vcc ≤ 23V

STABLE

Temperature Stability (Note2)

Maximum Duty Cycle

∆F

-25°C ≤ Ta ≤ 85°C

±5

±10

OSC

MAX

Minimum Duty Cycle

MIN

FEEDBACK SECTION

Feedback Source Current

Shutdown Feedback Voltage

Shutdown Delay Current

PROTECTION SECTION

Over Voltage Protection

Over Current Latch Voltage (Note2)

Thermal Shutdown Temp (Note4)

= 0.8V

0.5 0.65 0.8 mA

Vfb ≥ 6.9V

= 5V

7.0

7.5

8.0

µA

DELAY

Vsync ≥ 11V

0.9

140

1.1

OVP

1.0

OCL

°C

Note:

1. These parameters is the current flowing in the Control IC.

2. These parameters, although guaranteed, are tested only in EDS (wafer test) process.

3. These parameters indicate Inductor Current.

4. These parameters, although guaranteed at the design, are not tested in mass production.

FSCQ0765RT

Electrical Characteristics (Continued)

(Ta=25°C unless otherwise specified)

Parameter

Symbol

Condition

Min. Typ. Max. Unit

Sync SECTION

Sync Threshold in normal QR (H)

Sync Threshold in normal QR (L)

Sync Threshold in extended QR (H)

Sync Threshold in extended QR (L)

Extended QR enable frequency

Extended QR disable frequency

BURST MODE SECTION

Vcc = 16V, Vfb = 5V

4.2

2.3

2.7

1.6

4.6

2.6

3.0

1.8

5.0

2.9

3.3

2.0

SH1

SL1

SH2

SL2

kHz

SYH

SYL

Burst Mode Enable Feedback Voltage

Burst Mode Feedback Source Current

Burst Mode switching Time

Burst Mode Hold Time

0.25 0.40 0.55

BEN

1.2

100 140

BFB

= 0V

1.4

1.6

SOFTSTART SECTION

Soft start Time (Note2)

CURRENT LIMIT(SELF-PROTECTION)SECTION

Peak Current Limit (Note3)

Burst Mode Peak Current Limit (Note4)

TOTAL DEVICE SECTION

Startup Current

4.4

5.0

5.6

LIM

0.65 0.9 1.15

BPK

= V

-0.1V

START

Sustain Latch Current

-0.1V

STOP

100

Operating Supply Current (Note1)

- In normal operation

Vfb = 2V, V

= 18V

- In burst mode (without switching)

Vfb = GND, V

= 18V

0.25 0.50

Note:

1. These parameters is the current flowing in the Control IC.

2. These parameters, although guaranteed, are tested only in EDS (wafer test) process.

3. These parameters indicate Inductor Current.

4. These parameters, although guaranteed at the design, are not tested in mass production.

FSCQ0765RT

Comparison Between KA5Q0765RT and FSCQ0765RT

Function

KA5Q0765RT

Max. 200uA

Typ. 10mA

FSCQ0765RT

Max. 50uA

Typ. 4mA

FSCQ0765RT Advantages

Startup Current

Operating supply Current

Lower standby power consumption

Operating current is reduced in burst operation

to minimize standby power consumption

- Normal operation : 4mA

- Burst mode with switching : 4mA

- Burst mode without switching : 0.25mA

Switching in Burst mode Quasi-resonant Fixed frequency

switching

switching (20kHz)

Output regulation in

standby mode

Vcc control

Output voltage

Easy to determine the output voltage in the

with hysteresis feedback control standby mode

Output Voltage drop in

burst mode

about half

Any level

Lower power consumption in the standby mode

through larger output voltage drop

Primary side regulation

Soft start

Available

N/A

Available

Internal soft-start (20ms)

ExtendedQuasi-resonant

switching

N/A

- Guarantees wide load range

- Improved efficiency at high line input

FSCQ0765RT

Electrical characteristics

Burst-mode Supply Current( Non-Switching)

Operating Supply Current

1.2

1.4

1.2

1.0

0.8

0.6

1.0

0.8

-50

100

150

-50

Temp[

100

150

Temp[

℃]

℃

]

Start Threshold Voltage

Start-Up Current

1.10

1.05

1.00

0.95

0.90

1.4

1.2

1.0

0.8

0.6

-50

Temp[

100

150

-50

Temp[

100

150

℃

]

℃

]

Initial Frequency

Stop Threshold Voltage

1.10

1.05

1.00

0.95

0.90

1.10

1.05

1.00

0.95

0.90

-50

100

150

-50

100

150

Temp[℃

]

Temp[℃]

FSCQ0765RT

Electrical characteristics

Maximum Duty Cycle

Over Voltage Protection

1.10

1.05

1.00

0.95

0.90

1.10

1.05

1.00

0.95

0.90

-50

100

150

-50

100

150

Temp[

℃

]

Temp[℃]

Shutdown Delay Current

Shutdown Feedback Voltage

1.2

1.10

1.05

1.00

0.95

0.90

1.1

1.0

0.9

0.8

-50

Temp[

100

150

-50

100

150

Temp[

℃]

℃

]

Feedback Source Current

Burst_mode Feedback Source Current

1.2

1.1

1.0

0.9

0.8

1.2

1.1

1.0

0.9

0.8

-50

Temp[

100

150

-50

100

150

Temp[

℃

]

℃

]

FSCQ0765RT

Electrical characteristics

Feedback Offset Voltage

Burst_Mode Enable Feedback Voltage

1.4

1.2

1.0

0.8

0.6

1.2

1.0

0.8

0.6

-50

Temp[

100

150

-50

Temp[

100

150

℃]

℃

]

Sync. Threshold in Normal QR(L)

Sync. Threshold in Normal QR(H)

1.10

1.05

1.00

0.95

0.90

1.05

1.00

0.95

0.90

-50

100

150

-50

100

150

Temp[℃]

Sync. Threshold in Extended QR(H)

Sync. Threshold in Extended QR(L)

1.10

1.05

1.00

0.95

0.90

1.10

1.05

1.00

0.95

0.90

-50

Temp[

100

150

-50

100

150

℃

]

Temp[℃]

FSCQ0765RT

The minimum average of the current supplied from the AC is

given by

Functional Description

1. Startup : Figure 4 shows the typical startup circuit and

transformer auxiliary winding for FSCQ0765RT application.

Before FSCQ0765RT begins switching, FSCQ0765RT

consumes only startup current (typically 25uA) and the

current supplied from the AC line charges the external

min







V_start







V_ac

avg

R_str

---------

I_sup

----------------------------- – --------------

capacitor (C ) that is connected to the Vcc pin. When Vcc

min

where V

is the minimum input voltage, V is the

start

reaches start voltage of 15V (V_START), FSCQ0765RT begins

switching, and the current consumed by FSCQ0765RT

increases to 4mA. Then, FSCQ0765RT continues its normal

switching operation and the power required for this device is

supplied from the transformer auxiliary winding, unless Vcc

drops below the stop voltage of 9V (V_STOP). To guarantee the

stable operation of the control IC, Vcc has under voltage

lockout (UVLO) with 6V hysteresis. Figure 5 shows the

relation between the FSCQ0765RT operating supply current

and the supply voltage (Vcc).

FSCQ0765RT start voltage (15V) and R is the startup

str

resistor. The startup resistor should be chosen so that I

is larger than the maximum startup current (50uA).

avg

sup

Once the resistor value is determined, the maximum loss in

the startup resistor is obtained as

(V_ac^max) + V_start

V_startV_ac^max

---------

Loss =

-------------------------------------------------- – -----------------------------------------------------







R_str



max

where V

is the maximum input voltage. The startup

resistor should have proper rated dissipation wattage.

2. Synchronization : FSCQ0765RT employs quasi-resonant

switching technique to minimize the switching noise and loss.

In this technique, a capacitor (Cr) is added between the

MOSFET drain and source as shown in Figure 6. The basic

waveforms of quasi-resonant converter are shown in Figure

7. The external capacitor lowers the rising slop of drain

voltage to reduce the EMI caused when the MOSFET turns

off. In order to minimize the MOSFET switching loss, the

MOSFET should be turned on when the drain voltage reaches

its minimum value as shown in Figure 7.

C_DC

1N4007

I_sup

AC line

min

max

(V_ac

- V_ac

)

Rstr

Vcc

FSCQ0765RT

C_a2

C_a1

V_DC

C_DC

Figure 4. Startup circuit

Drain

V_ds

Ids

Sync

Icc

GND

D_a

V_co

V_cc

R_cc

C_a2

C_a1

D_SY

4mA

R_SY1

Power Up

Power Down

C_SY

R_SY2

25uA

Vcc

Vstop=9V

Vstart=15V

Figure 6. Synchronization circuit

Figure 5. Relation between operating supply current and

Vcc voltage

FSCQ0765RT

Vds

MOSFET

off

2V_RO

Vgs

T_Q

V_RO

Vsync

V_sypk

Vds

V_DC

Vrh (4.6V)

Vrf (2.6V)

T_R

Ids

I_pk

MOSFET Gate

Figure 7. Quasi-resonant operation waveforms

Figure 8. Normal quasi-resonant operation waveforms

The minimum drain voltage is indirectly detected by

monitoring the Vcc winding voltage as shown in Figure 6

and 8. The voltage divider R_SY1and R_SY2should be chosen so

Switching

frequency

that the peak voltage of sync signal (V

sypk

) is lower than the

OVP voltage (12V) in order to avoid triggering OVP in

normal operation. It is typical to set V to be lower than

Extended QR operation

sypk

OVP voltage by 3-4 V. In order to detect the optimum time to

turn on MOSFET, the sync capacitor (C ) should be

Q as shown in Figure

. The T and T are given as, respectively

90kHz

Normal QR operation

determined so that T is the same with T

45kHz

V_co

R_SY2









-------- ----------------------------------

T_R= R_SY2C_SYln

2.6

R_SY1+ R_SY2

T_Q= π L_mC_eo

Output power

Figure 9. Extended quasi-resonant operation

N_a(V_o+ V_FO

V_co= ---------------------------------------- – V_Fa

N_s

)

where L is the primary side inductance of the transformer,

In general, quasi-resonant converter has a limitation in a

wide load range application, since the switching frequency

increases as the output load decreases, resulting in a severe

switching loss in the light load condition. In order to get over

this limitation, FSCQ0765RT employs extended quasi-

resonant switching operation. Figure 9 shows the mode

change between normal quasi-resonant operation and

extended quasi-resonant operation. In the normal quasi-

resonant operation, the FSCQ0765RT enters into the

extended quasi-resonant operation when the switching

frequency exceeds 90kHz as the load reduces. Then, the

MOSFET is turned on, when the drain voltage reaches the

N and N are the number of turns for the output winding and

Vcc winding, respectively, V

and V

are the diode

forward voltage drops of the output winding and Vcc

winding, respectively, and C is the sum of the output

capacitance of MOSFET and external capacitor Cr.

FSCQ0765RT

second minimum level as shown in Figure 10, which reduces

the switching frequency. Once FSCQ0765RT enters into

extended quasi-resonant operation, the first sync signal is

ignored. After the first sync signal is applied, the sync

threshold levels are changed from 4.6V and 2.6V to 3V and

1.8V, respectively, and the MOSFET turn-on time is

synchronized to the second sync signal. The FSCQ0765RT

goes back to its normal quasi-resonant operation when the

switching frequency reaches 45kHz as the load increases.

3.2 Leading edge blanking (LEB) : At the instant the

internal Sense FET is turned on, there usually exists a high

current spike through the Sense FET, caused by external

resonant capacitor across the MOSFET and secondary-side

rectifier reverse recovery. Excessive voltage across the

resistor would lead to incorrect feedback operation in

sense

the current mode PWM control. To counter this effect, the

FSCQ0765RT employs a leading edge blanking (LEB)

circuit. This circuit inhibits the PWM comparator for a short

time (T

) after the Sense FET is turned on.

LEB

Vds

Vcc

I_delay

Vref

I_FB

2V_RO

Vfb

SenseFET

OSC

H11A817A

C_B

2.5R

Gate

driver

Vsync

KA431

4.6V

2.6V

OLP

R_sense

1.8V

V_SD

Figure 11. Pulse width modulation (PWM) circuit

MOSFET Gate

4. Protection Circuit : The FSCQ0765RT has several self

protective functions such as over load protection (OLP),

abnormal over current protection (AOCP), over voltage

protection (OVP) and thermal shutdown (TSD). OLP and

OVP are auto-restart mode protection, while TSD and AOCP

are latch mode protection. Because these protection circuits

are fully integrated into the IC without external components,

the reliability can be improved without increasing cost.

Figure 10. Extended quasi-resonant operation waveforms

3. Feedback Control : FSCQ0765RT employs current mode

control, as shown in Figure 11. An opto-coupler (such as the

H11A817A) and shunt regulator (such as the KA431) are

typically used to implement the feedback network.

Comparing the feedback voltage with the voltage across the

Rsense resistor plus an offset voltage makes it possible to

control the switching duty cycle. When the reference pin

voltage of the KA431 exceeds the internal reference voltage

of 2.5V, the H11A817A LED current increases, thus pulling

down the feedback voltage and reducing the duty cycle. This

event typically happens when the input voltage is increased

or the output load is decreased.

-Auto-restart mode protection: Once the fault condition is

detected, switching is terminated and the Sense FET remains

off. This causes Vcc to fall. When Vcc falls down to the

under voltage lockout (UVLO) stop voltage of 9V, the

protection is reset and FSCQ0765RT consumes only startup

current (25uA). Then, Vcc capacitor is charged up, since the

current supplied through the startup resistor is larger than the

current that FPS consumes. When Vcc reaches the start

voltage of 15V, FSCQ0765RT resumes its normal operation.

If the fault condition is not removed, the SenseFET remains

off and Vcc drops to stop voltage again. In this manner, the

auto-restart can alternately enable and disable the switching

of the power Sense FET until the fault condition is

eliminated (see Figure 12).

3.1 Pulse-by-pulse current limit: Because current mode

control is employed, the peak current through the Sense FET

is limited by the inverting input of PWM comparator (Vfb*)

as shown in Figure 11. The feedback current (I ) and

internal resistors are designed so that the maximum cathode

voltage of diode D is about 2.8V, which occurs when all I

flows through the internal resistors. Since D is blocked

when the feedback voltage (Vfb) exceeds 2.8V, the

maximum voltage of the cathode of D2 is clamped at this

voltage, thus clamping Vfb*. Therefore, the peak value of

the current through the Sense FET is limited.

-Latch mode protection: Once protection triggers,

switching is terminated and the Sense FET remains off until

the AC power line is un-plugged. Then, Vcc continues

charging and discharging between 9V and 15V. The latch is

reset only when Vcc is discharged to 6V by un-plugging the

Ac power line.

FSCQ0765RT

V_FB

Over load protection

Fault

occurs

Fault

removed

7.5V

Power

Vds

2.8V

Vcc

T₁₂= C_B*(7.5-2.8)/I_delay

15V

T₁

Figure 13. Over load protection

T₂

I_op

4.2 Abnormal Over Current Protection (AOCP) : When

the secondary rectifier diodes or the transformer pins are

shorted, a steep current with extremely high di/dt can flow

through the SenseFET during the LEB time. Even though the

FSCQ0765RT has OLP (Over Load Protection), it is not

enough to protect the FSCQ0765RT in that abnormal case,

since sever current stress will be imposed on the SenseFET

until OLP triggers. The FSCQ0765RT has an internal AOCP

(Abnormal Over Current Protection) circuit as shown in

Figure 14. When the gate turn-on signal is applied to the

power Sense FET, the AOCP block is enabled and monitors

the current through the sensing resistor. The voltage across

the resistor is then compared with a preset AOCP level. If

the sensing resistor voltage is greater than the AOCP level,

the set signal is applied to the latch, resulting in the

shutdown of SMPS. This protection is implemented in latch

mode.

4mA

25uA

Normal

operation

Fault

situation

Normal

operation

Figure 12. Auto restart mode protection

4.1 Over Load Protection (OLP) : Overload is defined as

the load current exceeding its normal level due to an

unexpected abnormal event. In this situation, the protection

circuit should trigger in order to protect the SMPS. However,

even when the SMPS is in the normal operation, the over

load protection circuit can be triggered during the load

transition. In order to avoid this undesired operation, the

over load protection circuit is designed to trigger after a

specified time to determine whether it is a transient situation

or an overload situation. Because of the pulse-by-pulse

current limit capability, the maximum peak current through

the Sense FET is limited, and therefore the maximum input

power is restricted with a given input voltage. If the output

consumes more than this maximum power, the output

voltage (Vo) decreases below the set voltage. This reduces

the current through the opto-coupler LED, which also

reduces the opto-coupler transistor current, thus increasing

the feedback voltage (Vfb). If Vfb exceeds 2.8V, D1 is

2.5R

OSC

PWM

Gate

driver

LEB

sense

AOCP

blocked and the 5uA current source starts to charge C

GND

Vaocp

slowly up to Vcc. In this condition, Vfb continues increasing

until it reaches 7.5V, when the switching operation is

terminated as shown in Figure 13. The delay time for

Figure 14. AOCP block

shutdown is the time required to charge C from 2.8V to

7.5V with 5uA. In general, a 20 ~ 50 ms delay time is typical

for most applications. This protection is implemented in auto

restart mode.

4.3 Over voltage Protection (OVP) : If the secondary side

feedback circuit were to malfunction or a solder defect

caused an open in the feedback path, the current through the

opto-coupler transistor becomes almost zero. Then, Vfb

climbs up in a similar manner to the over load situation,

FSCQ0765RT

forcing the preset maximum current to be supplied to the

SMPS until the over load protection triggers. Because more

energy than required is provided to the output, the output

voltage may exceed the rated voltage before the over load

protection triggers, resulting in the breakdown of the devices

in the secondary side. In order to prevent this situation, an

over voltage protection (OVP) circuit is employed. In

general, the peak voltage of the sync signal is proportional to

the output voltage and the FSCQ0765RT uses sync signal

instead of directly monitoring the output voltage. If sync

signal exceeds 12V, an OVP is triggered resulting in a

shutdown of SMPS. In order to avoid undesired triggering of

OVP during normal operation, the peak voltage of sync

signal should be designed to be below 12V. This protection

is implemented in auto restart mode.

stby

V_o2

= V_Z+ 0.7 + 2.5

Micom

Linear

Regulator

V_O1(B+)

R_D

R_bias

R₃

R₁

D₁

C_FR_F

Picture ON

4.4 Thermal Shutdown (TSD) : The SenseFET and the

control IC are built in one package. This makes it easy for

the control IC to detect the abnormal over temperature of the

SenseFET. When the temperature exceeds approximately

150°C, the thermal shutdown triggers. This protection is

implemented in latch mode.

KA431

R₂

Figure 15. Typical feedback circuit to drop output voltage

in standby mode

5. Soft Start : The FSCQ0765RT has an internal soft start

circuit that increases PWM comparator inverting input

voltage together with the SenseFET current slowly after it

starts up. The typical soft start time is 20msec. The pulse

width to the power switching device is progressively

increased to establish the correct working conditions for

transformers, inductors, and capacitors. It also helps to

prevent transformer saturation and reduce the stress on the

secondary diode during startup. For a fast build up of the

output voltage, an offset is introduced in the soft-start

reference current.

Figure 16 shows the burst mode operation waveforms. When

the picture ON signal is disabled, Q is turned off and R

and Dz are connected to the reference pin of KA431 through

D . Before V drops to V ^stby, the voltage on the reference

pin of KA431 is higher than 2.5V, which increases the

current through the opto LED. This pulls down the feedback

voltage (V ) of FSCQ0765RT and forces FSCQ0765RT to

stop switching. If the switching is disabled longer than

1.4ms, FSCQ0765RT enters into burst operation and the

operating current is reduced from 4mA (I_OP) to 0.35mA

(I_OB). Since there is no switching, V decrease until it

6. Burst operation : In order to minimize the power

consumption in the standby mode, FSCQ0765RT employs

burst operation. Once FSCQ0765RT enters into burt mode,

FSCQ0765RT allows all output voltages and effective

switching frequency to be reduced. Figure 15 shows the

typical feedback circuit for C-TV applications. In normal

operation, the picture on signal is applied and the transistor

reaches V ^stby. As V reaches V ^stby, the current through

the opto LED decreases allowing the feedback voltage to

rise. When the feedback voltage reaches 0.4V, FSCQ0765RT

resumes switching with a predetermined peak drain current

of 0.9A. After burst switching for 1.4ms, FSCQ0765RT

stops switching and checks the feedback voltage. If the

feedback voltage is below 0.4V, FSCQ0765RT stops

switching until the feedback voltage increases to 0.4V. If the

feedback voltage is above 0.4V, FSCQ0765RT goes back to

the normal operation.

Q is turned on, which de-couples R , D and D1 from the

feedback network. Therefore, only V is regulated by the

feedback circuit in normal operation and determined by R

and R as

R₁+ R₂

--------------------

R₂

norm









V_o1

= 2.5

In standby mode, the picture on signal is disabled and the

transistor Q is turned off, which couples R , Dz and D to

the reference pin of KA431. Then, Vo2 is determined by the

zener diode breakdown voltage. Assuming that the forward

voltage drop of D is 0.7V, V in standby mode is approxi-

mately given by

FSCQ0765RT

(a)

(b)

(c)

norm

V_o2

stby

V_o2

V_FB

0.4V

Iop

I_OP(4m A)

I_OB(0.35m A)

Vds

Picture On

Picture Off

Burst Mode

0.4V

0.3V

0.4V

V_FB

V_ds

1.4ms

0.9A

1.4ms

0.9A

I_ds

(a) Mode change to Burst operation

(b) Burst operation

Figure 16. Waveforms of burst operation

FSCQ0765RT

Typical application circuit

Application

Output power

Input voltage

Output voltage (Max current)

12V (1A)

Universal input

(85-265Vac)

18V (0.5A)

C-TV

83W

125V (0.4A)

24V (0.5A)

Features

• High efficiency (>80% at 85Vac input)

• Wider load range through the extended quasi-resonant operation

• Low standby mode power consumption (<1W)

• Low component count

• Enhanced system reliability through various protection functions

• Internal soft-start (20ms)

Key Design Notes

• 24V output is designed to drop to around 8V in standby mode

1. Schematic

EER3540

D205

EGP20D

12V, 1A

RT101

5D-9

C204

1000uF

35V

C210

470pF

1kV

C102

220uF

400V

D204

EGP20D

BEAD101

R102

150kΩ

0.25W

18V, 0.5A

R101

100kΩ

0.25W

C205

1000uF

35V

C107

1nF

1kV

BD101

C209

470pF

1kV

R106 C104

1kΩ 10uF

D105

1N4937

50V

Drain

D202

EGP20J

SYNC

Vcc

IC101

FSCQ0765RT

125V, 0.4A

ZD102

18V

R104

R103

5.1Ω

0.25W

D106

D103

1N4937

L202

BEAD

1.5kΩ

C202

47uF

160V

GND FB

C201

100uF

160V

1N4148

0.25W

C207

470pF

1kV

C105

3.9nF

50V

C103

10uF

50V

R105

470Ω

0.25W

C106

47nF

50V

D203

EGP20D

24V, 0.5A

C203

1000uF

35V

C208

470pF

1kV

LF101

VR201

30kΩ

R201

1kΩ

0.25W

OPTO101

817A

ZD201

5.1V

R202

C206

150nF

50V

R203

C101

330nF

275VAC

R205

220kΩ D201

0.25W 1N4148

0.5W

1kΩ

39kΩ

R208

1kΩ

0.25W

SW201

R207

5.1kΩ

0.25W

FUSE

250V

3.0A

0.25W

C301

2.2nF

Q202

KSC945

Q201

KA431

R204

4.7kΩ

0.25W

R206

10kΩ

0.25W

FSCQ0765RT

2. Transformer Schematic Diagram

EER3540

N_p1

N_24V

N_a

N_18V

N_125V/2

N_p2

N_125V/2

N_12V

N_24V

N_125V/2

N_p1

N_12V

N _a

N_18V

3.Winding Specification

No Pin (s→f)

Wire

Turns

Winding Method

Center Winding

1 - 3

16 - 15

18 - 17

12 - 13

3 - 4

0.5^φ× 1

0.4^φ× 2

0.5^φ× 2

0.5^φ× 1

0.4^φ× 2

0.3^φ× 1

125V/2

24V

12V

15 - 14

11 - 10

7 - 6

125V/2

18V

4.Electrical Characteristics

Specification

515uH ± 5%

10uH Max

Remarks

1kHz, 1V

2^ndall short

Inductance

1 - 3

Leakage Inductance

5. Core & Bobbin

Core : EER 3540

Bobbin : EER3540

Ae : 107 mm²

FSCQ0765RT

6.Demo Circuit Part List

Part

FUSE

RT101

Value

250V / 3A

5D-9

Note

Part

C210

C301

Value

Note

Fuse

NTC

470pF / 1kV

3.3nF / 1kV

Ceramic Capacitor

AC Ceramic Capacitor

Inductor

BEAD101

BEAD201

BEAD

5uH

Resistor

R101

R102

R103

R104

R105

R106

R107

R201

R202

R203

R204

R205

R206

R207

R208

VR201

100kΩ

150kΩ

5.1Ω

0.25 W

1 W

Diode

D101

D102

D103

D104

D105

ZD101

ZD102

ZD201

D201

D202

D203

D204

D205

1N4937

1N4148

Short

1A, 600V

1.5kΩ

470Ω

1kΩ

0.15A, 50V

Open

1kΩ

1N5246

Open

18V, 1W

0.25 W

1kΩ

1N5231

1N4148

EGP20J

EGP20D

5.1V, 0.5W

0.15A, 50V

2A, 600V

2A, 200V

39kΩ

4.7kΩ

220kΩ

10kΩ

5.1kΩ

1kΩ

0.25 W

0.25 W , 1%

0.25 W

30kΩ

Bridge Diode

GSIB660

Capacitor

330n/275VAC

BD101

LF101

T101

6A, 600V

14mH

C101

C102

C103

C104

C105

C106

C107

C108

C201

C202

C203

C204

C205

C206

C207

C208

C209

Box Capacitor

Electrolytic

Line Filter

220uF / 400V

10uF / 50V

3.9nF / 50V

47nF / 50V

1nF / 1kV

Electrolytic

Transformer

Electrolytic

EER3540

Film Capacitor

Switch

SW201

ON/OFF

For MCU Signal

TO220F-5L

TO-92

Open

IC101

OPT101

Q201

FSCQ0765RT

817A

100uF / 160V

47uF / 160V

1000uF / 35V

150nF / 50V

470pF / 1kV

Electrolytic

KA431LZ

KSC945

Electrolytic

Q202

Electrolytic

Film Capacitor

Ceramic Capacitor

FSCQ0765RT

7. Layout

Figure 17. Layout Considerations for FSCQ0765RT

Figure 18. Layout Considerations for FSCQ0765RT

FSCQ0765RT

Package Dimensions

Dimensions in Millimeters

TO-220F-5L(Forming)

FSCQ0765RT

Ordering Information

Product Number

Package

TO-220F-5L(Forming)

Marking Code

BVdss

Max.

ds(ON)

FSCQ0765RTYDTU

YDTU : Forming Type

CQ0765RT

650V

1.6 Ω

FSCQ0765RT

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY

PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY

LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER

DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES

OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR

CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body,

or (b) support or sustain life, and (c) whose failure to

perform when properly used in accordance with

instructions for use provided in the labeling, can be

reasonably expected to result in a significant injury of the

user.

2. A critical component in any component of a life support

device or system whose failure to perform can be

reasonably expected to cause the failure of the life support

device or system, or to affect its safety or effectiveness.

www.fairchildsemi.com

7/7/04 0.0m 001

2004 Fairchild Semiconductor Corporation

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FSCQ0765RTYDTU产品参数

型号:	FSCQ0765RTYDTU
是否无铅：	不含铅
是否Rohs认证：	符合
生命周期：	Active
IHS 制造商：	ROCHESTER ELECTRONICS INC
零件包装代码：	TO-220F
包装说明：	,
针数：	3
Reach Compliance Code：	unknown
风险等级：	5.24
其他特性：	RESONANT CONTROL TECHNIQUE ALSO AVAILABLE
模拟集成电路 - 其他类型：	SWITCHING CONTROLLER
控制模式：	CURRENT-MODE
控制技术：	PULSE WIDTH MODULATION
最大输入电压：	23 V
最小输入电压：	10 V
标称输入电压：	18 V
JESD-30 代码：	R-PZFM-T5
JESD-609代码：	e3
湿度敏感等级：	NOT APPLICABLE
功能数量：	1
端子数量：	5
最高工作温度：	85 °C
最低工作温度：	-25 °C
最大输出电流：	15.2 A
封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR
封装形式：	FLANGE MOUNT
峰值回流温度（摄氏度）：	NOT APPLICABLE
表面贴装：	NO
切换器配置：	SINGLE
最大切换频率：	22 kHz
温度等级：	OTHER
端子面层：	MATTE TIN
端子形式：	THROUGH-HOLE
端子位置：	ZIG-ZAG
处于峰值回流温度下的最长时间：	NOT APPLICABLE
Base Number Matches：	1

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